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1.
针对InGaP/AlGaAs/lnGaAs PHEMT器件,进行了Ti/Pt/Au和Pt/Ti/Pt/Au两种栅金属结构的退火实验,通过实验研究比较,得到了更适用于增强型器件的退火工艺,利用Ti/Pt/Au结构,在320℃退火40min,使器件阈值电压正向移动大约200mV,从而成功制作了高成品率的稳定一致的增强型器件,保证了增强型器件阈值电压在零以上.  相似文献   

2.
采用磁控溅射的方法在p型GaAs衬底上沉积了Ti/Pt/Au金属薄膜,研究了退火工艺参数(温度和时间)对p-GaAs/Ti/Pt/Au欧姆接触性能的影响。结果表明:p-GaAs上制作的Ti/Pt/Au金属系统能在很短的退火时间(60 s)内形成很好的欧姆接触。过分延长退火时间,并不能改善系统的欧姆接触性能。退火温度在400~450℃时均可得到较好的欧姆接触。当退火温度为420℃,退火时间为120 s时,比接触电阻率达到最低,为1.41×10–6.cm2。  相似文献   

3.
利用金属有机化学气相淀积(MOCVD)方法生长的AlGaN/AlN/GaN/蓝宝石材料制备了AlGaN肖特基二极管.器件的肖特基接触和欧姆接触分别为Ti/Pt和Ti/Al/Ti/Au,均采用电子束蒸发的方法沉积.AlGaN表面欧姆接触的比接触电阻率为7.48×10-4Ω/cm2,器件的I-V测试表明该AlGaN肖特基二极管具有较好的整流特性.根据器件的正向,I-V特性计算得到器件的势垒高度和理想因子分别为0.57eV和4.83.将器件在300℃中温退火,器件的电学性能有所改善.  相似文献   

4.
为了得到较低的接触电阻, 研究了帽层未掺杂的InAs/AlSb异质结的Pd/Ti/Pt/Au合金化欧姆接触.利用传输线模型 (TLM) 测量了接触电阻Rc.在最佳的快速热退火条件为275℃和20s时, InAs/AlSb异质结的Pd/Ti/Pt/Au接触电阻值为0.128Ω·mm.TEM观察发现经过快速热退火后Pd已经扩散到半导体中有利于高质量欧姆接触的形成.研究表明经过Pd/Ti/Pt/Au合金化欧姆接触后Rc有明显减小, 适用于InAs/AlSb异质结的应用.  相似文献   

5.
利用MBE外延材料和接触式光学光刻方式,成功制备出1.0μm栅长GaAs基MHEMT器件,分别蒸发Pt/Ti/Pt/Au和Ti/Pt/Au作为栅电极金属.获得了优越的DC和RF性能,Pt/Ti/Pt/Au和Ti/Pt/Au MHEMT器件的gm为502(503)mS/mm,JDss为382(530)mA/mm,VT为0.1(-0.5)V,fT和fmax分别为13.4(14.8),17.0(17.5)GHz.利用单片集成增强/耗尽型GaAs基MHEMT器件制备出九阶环型振荡器,直流电压为1.2V时,振荡频率达到777.6MHz,门延迟时间为71.4ps.利用Ti/Pt/Au MHEMT器件设计并制备出了DC-100Hz单刀双掷(SPDT)关MMIC,其插入损耗、隔离度、输入输出回波损耗分别优于2.93,23.34和20dB.  相似文献   

6.
利用MBE外延材料和接触式光学光刻方式,成功制备出1.0μm栅长GaAs基MHEMT器件,分别蒸发Pt/Ti/Pt/Au和Ti/Pt/Au作为栅电极金属.获得了优越的DC和RF性能,Pt/Ti/Pt/Au和Ti/Pt/Au MHEMT器件的gm为502(503)mS/mm,JDss为382(530)mA/mm,VT为0.1(-0.5)V,fT和fmax分别为13.4(14.8),17.0(17.5)GHz.利用单片集成增强/耗尽型GaAs基MHEMT器件制备出九阶环型振荡器,直流电压为1.2V时,振荡频率达到777.6MHz,门延迟时间为71.4ps.利用Ti/Pt/Au MHEMT器件设计并制备出了DC-100Hz单刀双掷(SPDT)关MMIC,其插入损耗、隔离度、输入输出回波损耗分别优于2.93,23.34和20dB.  相似文献   

7.
于宗光  李海鸥  黄伟 《半导体技术》2014,(3):179-182,192
应用钛/铂/金(Ti/Pt/Au)金属系统在InP基HEMT制备工艺中形成了良好的欧姆接触,通过优化合金条件,获得了较低的欧姆接触电阻,并在此基础上对钛/铂/金欧姆接触形成机理进行了深入讨论。实验结果表明:在氮气气氛下进行温度300℃/30 s快速热退火后,得到欧姆接触最小电阻值为0.025Ω·mm。同时合金界面形态良好。制备出栅长1.0μm的InP基HEMT器件,测试结果表明器件具有良好的DC和RF特性,器件最大跨导(Gmmax)为672 mS/mm。饱和源漏电流IDSS为900 mA/mm,阈值电压为-0.8 V,单一的电流增益截止频率(fT)为40 GHz,最大晶振fmax为45 GHz。  相似文献   

8.
为了研究半导体光电器件p-GaAs欧姆接触的特性,利用磁控溅射在p-GaAs上生长Ti厚度在10~50 nm范围、Pt厚度在30~60 nm范围的Ti/Pt/200 nm Au电极结构。利用传输线模型测量了具有不同的Ti、Pt厚度的Ti/Pt/200 nm Au电极结构接触电阻率,研究了退火参数对欧姆接触性能的影响,同时分析了过高温度导致电极金属从边缘向内部皱缩的机理。结果表明,Ti厚度为30 nm左右时接触电阻率最低,接触电阻率随着Pt厚度的增加而增加;欧姆接触质量对退火温度更敏感,退火温度达到510 ℃时电极金属从边缘向内部皱缩。采用40 nm Ti/40 nm Pt/200 nm Au作为半导体光电器件p-GaAs电极结构,合金条件为420 ℃,30 s可以形成更好的欧姆接触。  相似文献   

9.
介绍了AlGaN/GaN HEMT器件的研制及室温下器件特性的测试.漏源欧姆接触采用Ti/Al/Pt/Au,肖特基结金属为Pt/Au.器件栅长为1μm,获得的最大跨导为120mS/mm,最大的漏源饱和电流密度为0.95A/mm.  相似文献   

10.
AlGaN/GaN HEMT器件的研制   总被引:6,自引:9,他引:6  
介绍了AlGaN/GaNHEMT器件的研制及室温下器件特性的测试.漏源欧姆接触采用Ti/Al/Pt/Au ,肖特基结金属为Pt/Au .器件栅长为1μm ,获得的最大跨导为12 0mS/mm ,最大的漏源饱和电流密度为0 95A/mm .  相似文献   

11.
High-current 0.15-mum-gate enhancement-mode high-electron mobility transistors utilizing Ir/Ti/Pt/Au gate metallization were fabricated using a new process including a high-temperature gate anneal that is required for Schottky-barrier height enhancement for the Ir-based gate contact. SiNx encapsulation was employed to prevent thermal degradation of device layer during the high-temperature gate anneal. Excellent enhancement-mode operation, with a threshold voltage of 0.1 V and IDSS of 2.1 mA/mm, was realized. Both the annealed and unannealed devices exhibited high gm,max and ID,max of 800 mS/mm and 430 mA/mm, respectively. A unity current-gain cutoff frequency fT of 151 GHz and a maximum oscillation frequency fMAX of 172 GHz were achieved. From the dc and RF characteristics, it can be deduced that there was no degradation of the gate contact and the heterostructure due to gate annealing. Furthermore, it was found that the gate diffusion during gate annealing was negligible since no increase in gm,max was observed  相似文献   

12.
An enhancement-mode InGaP/AlGaAs/InGaAs pseudomorphic high-electron mobility transistor using platinum (Pt) as the Schottky contact metal was investigated for the first time. Following the Pt/Ti/Pt/Au gate metal deposition, the devices were thermally annealed at 325 degC for gate sinking. After the annealing, the device showed a positive threshold voltage (Vth) shift from 0.17 to 0.41 V and a very low drain leakage current from 1.56 to 0.16 muA/mm. These improvements are attributed to the Schottky barrier height increase and the decrease of the gate-to-channel distance as Pt sinks into the InGaP Schottky layer during gate-sinking process. The shift in the Vth was very uniform across a 4-in wafer and was reproducible from wafer to wafer. The device also showed excellent RF power performance after the gate-sinking process  相似文献   

13.
单片集成GaAs增强/耗尽型赝配高电子迁移率晶体管   总被引:1,自引:0,他引:1  
介绍了单片集成GaAs增强/耗尽型赝配高电子迁移率晶体管(PHEMT)工艺。借助栅金属的热处理过程,形成了热稳定性良好的Pt/Ti/Pt/Au栅。AFM照片结果表明Pt金属膜表面非常平整,2nm厚度膜的粗糙度RMS仅为0.172nm。通过实验,我们还得出第一层Pt金属膜的厚度和退火后的下沉深度比大概为1:2。制作的增强型/耗尽型PHEMT的闽值电压(定义于1mA/mm)、最大跨导、最大饱和漏电流密度、电流增益截止频率分别是+0.185/-1.22V、381.2/317.5mS/mm、275/480mA/mm、38/34GHz。增强型器件在4英寸圆片上的阈值电压标准差为19mV。  相似文献   

14.
The fabrication and characterization of high-speed enhancement-mode InAlAs/InGaAs/InP high electron mobility transistors (E-HEMTs) have been performed. The E-HEMT devices were made using a buried-Pt gate technology. Following a Pt/Ti/Pt/Au gate metal deposition, the devices were annealed in a nitrogen ambient, causing the bottom Pt layer to sink toward the channel. This penetration results in a positive shift in threshold voltage. The dc and RF performance of the devices has been investigated before and after the gate annealing process. In addition, the effect of the Pt penetration was investigated by fabricating two sets of devices, one with 25 nm of Pt as the bottom layer and the other with a 5.0 nm bottom Pt layer. E-HEMTs were fabricated with gate lengths ranging from 0.3 to 1.0 μm. A maximum extrinsic transconductance (gmext) of 701 mS/mm and a threshold voltage (VT) of 167 mV was measured for 0.3 μm gate length E-HEMTs. In addition, these same devices demonstrated excellent subthreshold characteristics as well as large off-state breakdown voltages of 12.5 V. A unity current-gain cutoff frequency (f t) of 116 GHz was measured as well as a maximum frequency of oscillation (fmax) of 229 GHz for 0.3 μm gate-length E-HEMTs  相似文献   

15.
Ti/Pt metal layers are an integral part of the gate stack of many GaAs PHEMTs and InP HEMTs. These devices are known to be affected by H 2 exposure. In this study, Auger Electron Spectroscopy (AES) measurements of Ti/Pt bilayers are correlated with electrical measurements of InP HEMTs fabricated with Ti/Pt/Au gates. The FET measurements show that H2 exposure shifts the device threshold voltage through the piezoelectric effect. AES reveals the formation of titanium hydride (TiHx) in Ti/Pt bilayers after identical H2 exposures. These results indicate that the volume expansion associated with TiHx formation causes compressive stress in Ti/Pt/Au gates, leading to the piezoelectric effect. After a subsequent recovery anneal in N2, the FET measurements show that VT recovers. AES measurements confirm that the TiHx in hydrogenated Ti/Pt bilayers also decreases after further annealing in N2  相似文献   

16.
This paper investigates the feasibility of using a lanthanum oxide thin film (La_2O_3) with a high dielectric constant as a gate dielectric on GaAs pHEMTs to reduce gate leakage current and improve the gate to drain breakdown voltage relative to the conventional GaAs pHEMT. An E/D mode pHEMT in a single chip was realized by selecting the appropriate La_2O_3 thickness. The thin La_2O_3 film was characterized: its chemical composition and crystalline structure were determined by X-ray photoelectron spectroscopy and X-ray diffraction, respectively.La_2O_3 exhibited good thermal stability after post-deposition annealing at 200, 400 and 600 ℃ because of its high binding-energy (835.6 eV). Experimental results clearly demonstrated that the La_2O_3 thin film was thermally stable.The DC and RF characteristics of Pt/La_2O_3/Ti/Au gate and conventional Pt/Ti/Au gate pHEMTs were examined.The measurements indicated that the transistor with the Pt/La_2O_3/Ti/Au gate had a higher breakdown voltage and lower gate leakage current. Accordingly, the La_2O_3 thin film is a potential high-k material for use as a gate dielectric to improve electrical performance and the thermal effect in high-power applications.  相似文献   

17.
In this study, a novel metal–semiconductor gate enhancement-mode (E-mode) and a metal–insulator-metal–semiconductor (MIMS) gate depletion-mode (D-mode) AlGaAs/InGaAs pseudomorphic high electron mobility transistor (pHEMT) on a single GaAs substrate have been developed by using high dielectric constant praseodymium insulator layer. The epitaxial layers were design for an enhancement-mode pHEMT after gate recess process. To achieve E/D-mode pHEMTs on single GaAs wafer, traditional Pt/Ti/Au metals were deposited as Schottky contact for E-mode pHEMTs and Pr/Pr2O3/Ti/Au were deposited as MIMS-gate for D-mode pHEMTs. This AlGaAs/InGaAs E-mode pHEMTs exhibit a gate turn-on voltage (VON) of +1 V and a gate-to-drain breakdown voltage of ?5.6 V, and these values were +7 V and ?34 V for MIMS-gate D-mode pHEMTs, respectively. Therefore, this high-k insulator in D-mode pHEMT is beneficial for suppressing the gate leakage current. Comparing to previous E/D-mode pHEMT technology, this E-mode pHEMTs and MIMS-gate D-mode pHEMTs exhibit a highly potential for high uniformity GaAs logic circuit applications due to its single recess process.  相似文献   

18.
The performance of InGaP-based pHEMTs as a function of gate metallization is examined for Mo/Au, Ti/Au, and Pt/Au gates. DC and microwave performance of pHEMT's with 0.7-μm gate lengths is evaluated. Transconductance, threshold voltage, ft, and fmax are found to depend strongly on gate metallization. High-speed performance is achieved, with ft of 41.3 GHz and f max of 101 GHz using Mo/Au gates. The difference in performance between devices with different gate metallizations is postulated to be due to a combination of the difference in Schottky barrier heights and different gate-to-channel spacings due to penetration of the gate metal into the InGaP barrier layer  相似文献   

19.
AlGaN/GaN High Electron Mobility Transistors (HEMTs) were fabricated with Ti/Al/TiB2/Ti/Au source/drain Ohmic contacts and a variety of gate metal schemes (Pt/Au, Ni/Au, Pt/TiB2/Au or Ni/TiB2/Au) and subjected to long-term annealing at 350°C. By comparison with companion devices with conventional Ti/Al/Pt/Au Ohmic contacts and Pt/Au gate contacts, the HEMTs with boride-based Ohmic metal and either Pt/Au, Ni/Au or Ni/TiB2/Au gate metal showed superior stability of both source-drain current and transconductance after 25 days aging at 350°C.  相似文献   

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