All-digital thermal distribution measurement on field programmable gate array using ring oscillators

In this paper, a digital method for transient temperature distribution measurement of field programmable gate array (FPGA)-based systems is proposed. The smart thermal sensors used rely on correspondence between the delay and temperature in a ring oscillator. The tested temperature was converted into a time signal with a thermally-sensitive width. The output frequency is read out by a counter with a scan path, and then, transited to PC by a Universal Serial Bus (USB) interface. We capture the infrared images of the FPGA chip by infrared camera. The images were compared with the thermal map of the die constructed using an array of sensors. The tested temperature error varies by less than 1.6 °C in the range from 20 °C to 90 °C, and the maximum sampling rate is 330 Hz.     

Lifetime tests of 600-V GaN-on-Si power switches and HEMTs

We present the first systematic lifetime tests which show excellent long-term reliability for 600 V GaN-on-Si power switches.High voltage accelerated life testing in the OFF-state yields a field related mean-time-to-failure (MTTF) greater than 3 × 10⁸ h for a 600 V operating condition. High temperature accelerated testing in the ON-state gives an MTTF of about 6 × 10⁸h at a 150 °C use condition. High temperature operating life testing using hard switched boost converters at 175 °C shows no measurable device degradation after 3000 h of operation. These results show that the intrinsic reliability of the new device technology is more than adequate for commercial and industrial power electronics applications.     

Feasibility of directional solidification of silicon ingot by electromagnetic casting

Electromagnetic casting is a novel technology that combines the advantages of electromagnetic cold crucible and continuous casting. By controlling induction heating and strengthening bottom cooling, multicrystalline silicon ingot with 60 mm×60 mm in cross section was continuously and directionally solidified by this technology. The ingot shows smooth surface and consists of uniform columnar crystals with no precipitate except in the top part. The grain size of the top part is smaller due to higher impurity content and the impurities acting as nucleation sites for grain. The density of dislocations at the bottom and middle parts, about 1×10⁶ cm⁻², is much less than that at the top part.     

The effect of heat treatments on the properties of Ti/Pt heating elements for gas sensor applications

Ti/Pt as heating element for gas sensor applications was fabricated on silicon (Si) wafer substrate. The fabricated device was subjected to heat treatment at different prescribed time periods for thermal stability. The energy dispersion spectroscopy (EDS) results of the device indicated that there were no Ti traces on the Pt surface after heat treatment at 450 °C for 3 and 4 h in an argon (Ar) atmosphere. A maximum temperature coefficient of resistance (TCR) with a value of 2.88×10^?3 K^?1 was obtained for the device with 3 h heat treatment.     

CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control

This paper presents novel low-cost CMOS temperature sensor for controlling the self-refresh period of a mobile DRAM. In the proposed temperature sensor, the temperature dependency of poly resistance is used to generate a temperature-dependent bias current, and a ring oscillator driven by this bias current is employed to obtain the digital code pertaining to on-chip temperature. This method is highly area-efficient, simple and easy for IC implementation as compared to traditional temperature sensors based on bandgap reference. The proposed CMOS temperature sensor was fabricated with an 80 nm 3-metal DRAM process, which occupies extremely small silicon area of only about 0.016 mm² with under 1 μW power consumption for providing 0.7 °C effective resolution at 1 sample/s processing rate. This result indicates that as much as 73% area reduction was obtained with improved resolution as compared to the conventional temperature sensor in mobile DRAM.     

Sub-1 V,pico-watt subthreshold CMOS voltage reference circuit with dual temperature compensation

A pico-watt CMOS voltage reference is developed using an SK Hynix 0.18 µm CMOS process. The proposed architecture is resistorless and consists of MOSFET circuits operated in the subthreshold region. A dual temperature compensation technique is utilized to produce a near-zero temperature coefficient reference output voltage. Experimental results demonstrate an average reference voltage of 250.7 mV, with a temperature coefficient as low as 3.2 ppm/°C for 0 to 125 °C range, while the power consumption is 545 pW under a 420 mV power supply at 27 °C. The power supply rejection ratio and output noise without any filtering capacitor at 100 Hz are −54.5 dB and 2.88 µV/Hz^1/2, respectively. The active area of the fabricated chip is 0.00332 mm².     

A new technique in LDMOS transistors to improve the breakdown voltage and the lattice temperature

A new technique for high breakdown voltage of the LDMOS device is proposed in this paper. The main idea in the proposed technique is to insert the P⁺ silicon windows in the buried oxide at the interface of the n-drift to improve the breakdown voltage, electric field and maximum lattice temperature. The proposed structure is called as P⁺ window LDMOS (PW-LDMOS). It is shown by extending the depletion region between the P⁺ windows and the n-drift region, the breakdown voltage of PW-LDMOS increases to 405 V from 84 V of the conventional LDMOS on 1 µm silicon layer and 2 µm buried oxide layer. Also, effective values of doping, length, and depth of P⁺ window are investigated in the breakdown voltage. Moreover, a self-heating-effect is alleviated by the silicon windows in comparison with the conventional LDMOS. All the achieved results have been extracted by two-dimensional and two-carriers simulator ATLAS.     

Dependence of the optoelectronic properties of selenium-hyperdoped silicon on the annealing temperature

Selenium-hyperdoped silicon was prepared by ion implantation at 100 eV to a dose of 6×10¹⁵ Se/cm², followed by furnace annealing at 500–900 °C for 30 min. A phase transition from amorphous to crystalline was observed for the sample annealed at 600 °C. Carrier density in the Se doping layer gradually increases with the annealing temperature and a high carrier/donor ratio of 7.5% was obtained at 900 °C. The effects of annealing temperature on the rectifying behavior and external quantum efficiency of n⁺p junctions formed on Se-hyperdoped silicon were also investigated. We found that 700 °C was the optimal annealing temperature for improving the crystallinity, below-bandgap absorption, junction rectification and external quantum efficiency of Se-doped samples.     

Potentiality of trap charge effects and SiON induced interface defects in a-Si3N4/SiON based MIS structure for resistive NVM device

Potential application of amorphous silicon nitride (a-Si₃N₄)/silicon oxy-nitride (SiON) film has been demonstrated as resistive non-volatile memory (NVM) device by studying the Al/Si₃N₄/SiON/p-Si metal–insulator–semiconductor (MIS) structure. The existence of several deep trap states was revealed by the photoluminescence characterizations. The bipolar resistive switching operation of this device was investigated by current–voltage measurements whereas the trap charge effect was studied in detail by hysteresis behavior of frequency dependent capacitance–voltage characteristics. A memory window of 4.6 V was found with the interface trap density being 6.4 × 10¹¹ cm⁻² eV⁻¹. Excellent charge retention characteristics have been observed for the said MIS structure enabling it to be used as a reliable non-volatile resistive memory device.     

Surface photovoltage measurements for Cu,Ti and W determination in Si wafers

p-type (1 0 0) Cz silicon wafers were contaminated with Cu, W, and Ti in the dose range of 5×10⁹–1×10¹⁴ cm⁻² by ion implantation. Surface photovoltage measurements were used to detect the metal impurities after annealing. Fast and slow cooling have been used and calibration curves have been obtained in all cases. Higher sensitivity has been determined for slow cooling (Cu and W) or fast cooling (Ti) depending if deep levels are associated with substitutional (Cu and W) or interstitial (Ti) position.     

Enhanced electrochromic write–erase efficiency of a device with a novel viologen: 1,1′-bis(2-(1H-indol-3-yl)ethyl)-4,4′-bipyridinium diperchlorate

A novel cathodically coloring viologen electrochrome: 1,1′-bis(2-(1H-indol-3-yl)ethyl)-4,4′-bipyridinium diperchlorate (IEV), comprising of a 4,4′-bipyridyl core, sandwiched between two indole moieties, was synthesized using 3-(2-bromoethyl)-indole. An electrochromic device (ECD) was assembled using an electrolyte containing an imidazolium imide ionic liquid and characterized by a large electrical conductivity, thermal stability upto 150 °C, and an electrochemical potential stability range of ∼3.6 V. The IEV viologen was dissolved in the electrolyte and Prussian blue was used as the anodic electrochrome. The indole moieties of the IEV²⁺ salt owing to their electron donating tendency can act like bleaching agents and bleach the viologen faster (IEV⁺ → IEV²⁺) and this hypothesis was used for the improved write–erase efficiency of the device. The device switched between colorless and dark violet–blue hues under applied potentials of ±1.5 V. A large transmission modulation (52%, λ = 605 nm), a high electrochromic coloring efficiency of 533 cm² C⁻¹ at 605 nm and switching times of ∼2 s and good stability during 2000 cycles were reported herein. The electrochemical activity of the ECD improved when it was maintained at an elevated temperature of 70 °C, with no sign of thermal degradation. Furthermore, we also present the ability of this new viologen to function as an excellent redox mediator as we achieved an 86% enhancement in the power conversion efficiency of a solution processed solar cell, by its’ addition in the electrolyte. Our studies demonstrate this new viologen to be a highly versatile electroactive material which can be useful for both electrochromics and photovoltaics.     

Polypyrrole/reduced graphene oxide coated fabric electrodes for supercapacitor application

Flexible and wearable energy storage devices are strongly demanded to power smart textiles. Herein, reduced graphene oxide (RGO) and polypyrrole (PPy) were deposited on cotton fabric via thermal reduction of GO and chemical polymerization of pyrrole to prepare textile-based electrodes for supercapacitor application. The obtained PPy–RGO-fabric retained good flexibility of textile and was highly conductive, with the conductivity of 1.2 S cm⁻¹. The PPy–RGO-fabric supercapacitor showed a specific capacitance of 336 F g⁻¹ and an energy density of 21.1 Wh kg⁻¹ at a current density of 0.6 mA cm⁻². The RGO sheets served as conductor and framework under the PPy layer, which could facilitate electron transfer between RGO and PPy and restrict the swelling and shrinking of PPy, thus resulting in improved electrochemical properties respect to the PPy-fabric device.     

Reconfigurable 1×4 InP-based optical switch

An integrated 1×4 InP-based optical switch is reported. The device is quite simple and full device operation is achieved by injecting electrical currents to two electrodes. Since the operation of the switch relies on current spreading, using the carrier-induced refractive index change in InGaAsP multiple quantum wells, an area-selective zinc in-diffusion process is used to regulate the current spreading and optimize device performance. As a result, the fabricated 1×4 switch exhibits a ?14 dB crosstalk between channels over a wavelength range of 30 nm, while maintaining low electrical power consumption and allowing the switch to be operated uncooled and under d.c. current conditions.     

A MEMS-based pneumatic micro-conveyor for planar micromanipulation

This paper present a two dimensional pneumatic actuator based on silicon MEMS technology for objects micro-manipulation using tilted air jets. The device is composed of three layers stacked together, two micro-machined silicon wafers and a Pyrex glass wafer. The system is composed of a set of micro-conveyors in about 9 mm × 9 mm area. Each micro-conveyor has four nozzles and can generate tilted air-jets which allow four conveyance directions. An experiment of the conveyance of a silicon chip of 3 mm diameter and weighing approximately 2 mg was performed with pulsed air flow.     

Effective mobility in amorphous organic transistors: Influence of the width of the density of states

The temperature dependence of poly(3-hexylthiophene-2,5-diyl) (P3HT)/polystyrene (PS) blend organic transistor current/voltage (I–V) characteristics has been experimentally and theoretically studied. The planar transistors, realized by drop casting the P3HT/PS ink, exhibit high mobilities (over 5 × 10⁻³ cm² V⁻¹ s⁻¹) and good overall characteristics. A transistor model accounting for transport mechanisms in disordered organic materials was used to fit the measured characteristics. Using a single set of parameters, the measured effective mobility versus gate bias, either increasing or decreasing with the gate bias depending on temperature, is well reproduced over a wide temperature range (130–343 K). A Gaussian density of states width of 0.045 eV was determined for this P3HT/PS blend. The transistor I–V characteristics are very well described considering disordered material properties within a self-consistent transistor model.     

Structural phase-dependent resistivity of intrinsic-extrinsic co-doped transparent titanium dioxide films

The authors report a method of enhancing the conductivity of TiO₂ films by controlling their structural phases. Thin films of Nb:TiO₂ (TNO) were prepared on glass and silicon substrates by RF sputtering with varying Nb content at 200 °C. It is shown that fine control over the structural phases of TiO₂ is critical for achieving low resistivity. The resistivity values of the films doped with oxygen vacancies and Nb⁺⁵ decreased from 3.8 × 10⁻¹ to 4.1 × 10⁻³ Ω cm when the weight percent of rutile in anatase-rutile phase mixture decreases from 52.8% to 32%. Furthermore, the lowest resistivity value of 2.37 × 10⁻³ Ω cm was obtained for the doped TiO₂ films having single phase anatase structure. The physical processes responsible for the diverse electrical properties are discussed and are associated with the growth conditions. Our result indicates that highly conductive doped-TiO₂ film can be obtained by controlling the anatase phase formation via the growth temperature. The obtained results can significantly contribute to the development of transparent electrodes by RF sputtering, a suitable technique for coating large area substrates.     

Design and implementation of micro-power temperature to duty cycle converter using differential temperature sensing

The CMOS based temperature detection circuit has been developed in a standard 180 nm CMOS technology. The proposed temperature sensor senses the temperature in terms of the duty cycle in the temperature range of −30 °C to +70 °C. The circuit is divided into three parts, the sensor core, the subtractor and the pulse width modulator. The sensor core consists of two individual circuits which generates voltages proportional (PTAT) and complementary (CTAT) to the absolute temperature. The mean temperature inaccuracy (°C) of PTAT generator is −0.15 °C to +0.35 °C. Similarly, CTAT generator has mean temperature accuracy of ±1 °C. To increase thermal responsivity, the CTAT voltage is subtracted from the PTAT voltage. The resultant voltage has the thermal responsivity of 6.18 mV/°C with the temperature inaccuracy of ±1.3 °C. A simple pulse width modulator (PWM) has been used to express the temperature in terms of the duty cycle. The measured temperature inaccuracy in the duty cycle is less than ±1.5 °C obtained after performing a single point calibration. The operating voltage of the proposed architecture is 1.80±10% V, with the maximum power consumption of 7.2 μW.     

An 8 bit, 100 kS/s,switch-capacitor DAC SAR ADC for RFID applications

An 8 bit switch-capacitor DAC successive approximation analog to digital converter (SAR-ADC) for sensor-RFID application is presented in this paper. To achieve minimum chip area, maximum simplicity is imposed on capacitive DAC; replacing capacitor bank with only a one switch-capacitor circuit. The regulated dynamic current mirror (RDCM) design is introduced to provide stabilized current. This invariable current from RDCM, charging or discharging the only capacitor in circuit is controlled by pulse width modulated signal to realize switch capacitor DAC. The switch control scheme is built using basic AND gates to generate the control signals for RDCM. Only one capacitor and reduced transistor count in digital part reduces the silicon area occupied by the ADC to only 0.0098 mm². The converter, designed in GPDK 90 nm CMOS, exhibits maximum sampling frequency of 100 kHz & consumes 6.75 µW at 1 V supply. Calculated signal to noise and distortion ratio (SNDR) at 1 V supply and 100 kS/s is 48.68 dB which relates to ENOB of 7.79 bits. The peak values of differential and integral nonlinearity are found to be +0.70/−0.89 LSB and +1.40/−0.10 LSB respectively. Evaluated figure of merit (FOM) is 3.87×10²⁰, which show that the proposed ADC acquires minimal silicon area and has sufficiently low power consumption compared to its counterparts in RFID applications.     

Low-temperature nickel-induced nano-crystallization of silicon on PET by MIC,hydrogenation and mechanical stress

The effects of RF-Plasma hydrogenation and applied mechanical strain on the crystallization of silicon layers deposited on plastic substrates have been investigated where the maximum temperature remained below 170 °C for the entire process. The structural properties of the samples have been studied by optical, scanning-electron and transmission-electron microscopy where the nano-crystallinity of the silicon layers has been confirmed. The maximum average diameter of the silicon grains was 4.5 nm and occurred for an applied tensile strain of 4%. In addition, a thin-film transistor on a plastic substrate has been fabricated and found to possess an electron mobility of 2.4 cm²/V s.     

Silicon/organic hybrid heterojunction infrared photodetector operating in the telecom regime

The authors report on the fabrication of a silicon/organic heterojunction based IR photodetector. It is demonstrated that an Al/p-Si/perylene-derivative/Al heterostructure exhibits a photovoltaic effect up to 2.7 μm (0.46 eV), a value significantly lower than the bandgap of either material. Although the devices are not optimized, at room temperature a rise time of 300 ns, a responsivity of ≈0.2 mA/W with a specific detectivity of D¹ ≈ 7 × 10⁷ Jones at 1.55 μm is found. The achieved responsivity is two orders of magnitude higher compared to our previous efforts [1], [2]. It will be outlined that the photocurrent originates from an absorption mechanism involving excitation of an electron from the Si valence band into the extended LUMO state in the perylene-derivative, with possible participation of intermediate localized surface state in the organic material.The non-invasive deposition of the organic interlayer onto the Si results in compatibility with the CMOS process, making the presented approach a potential alternative to all inorganic device concepts.