High strain rate constitutive behavior of SAC105 and SAC305 leadfree solder during operation at high temperature

Industry migration to leadfree solders has resulted in a proliferation of a wide variety of solder alloy compositions. The most popular amongst these are the Sn–Ag–Cu family of alloys like SAC105 and SAC305. Electronics subjected to shock and vibration may experience strain rates of 1–100/s. Electronic product may often be exposed to high temperature during storage, operation and handling in addition to high strain rate transient dynamic loads during drop-impact, shock and vibration. Properties of leadfree solder alloys at high strain rates at low and high temperatures experienced by the solder joint during typical mechanical shock events are scarce. Previous studies have showed the effect of high strain rates and thermal aging on the mechanical properties of leadfree alloys including elastic modulus and the ultimate tensile strength. The ANAND viscoplastic constitutive model has been widely used to describe the inelastic deformation behavior of solders in electronic components. In this study, SAC105 and SAC305 leadfree alloys have been tested at strain rates of 10, 35, 50 and 75/s at various operating temperatures of 50 °C, 75 °C, 100 °C and 125 °C. Full-field strain in the specimen have been measured using high speed imaging at frame rates up to 75,000 fps in combination with digital image correlation. The cross-head velocity has been measured prior-to, during, and after deformation to ensure the constancy of cross-head velocity. Stress–strain curves have been plotted over a wide range of strain rates and temperatures. Experimental data for the pristine specimen has been fit to the ANAND's viscoplastic model.     

Computational modeling of creep-based fatigue as a means of selecting lead-free solder alloys

The primary aim of this investigation was to understand the effect of temperature fluctuations on a number of various solder materials namely SAC105, SAC305, SAC405 and Sn–36Pb–2Ag. To achieve this objective, three different classic joint assemblies (a ball joint, a test specimen joint and finger lead joint) were modeled which provided the foundation for the creep and fatigue behaviors simulation. Anand’s viscoplasticity as a constitutive equation was employed to characterize the behavior of solders numerically under the influence of thermal power cycles (80–150 °C) and thermal shock cycles (−40 to 125 °C). To extend the research outcome for industrial use, two additional research activities were carried out. One of them was to obtain lifetime-predictions of solder joints based on Coffin Manson concept. The other one focused on parameterization to obtain the ideal solder thickness under the consideration of plastic strain and economic benefit.     

Discrete phase method particle simulation of ultra-fine package assembly with SAC305-TiO2 nano-reinforced lead free solder at different weighted percentages

This paper presents a 3D numerical simulation of nano-reinforced lead (Pb)-free solder at the ultra-fine joint component for 01005 capacitor with dimension of 0.2 × 0.2 × 0.4 mm³. The nano-reinforced particles introduced in the Sn-3.0Ag-0.5Cu (SAC305) solder is titanium oxide (TiO₂) nanoparticles with approximate diameter of ≈ 20 nm at different weight percentages of 0.01, 0.05 and 0.15 wt% respectively. The 3D model developed is based on the reflow thermal profile of nano-reinforced Pb-free solder in the wetting zone temperature of 217 °C–239 °C. A two way interactions utilizing both volume of fluid method (VOF) and discrete phase method (DPM) are introduced in the current study. The study effectively shows the distribution of the nanoparticles as it is being doped in the molten solder after undergoing soldering process. Based on the findings, it was shown that good agreement can be seen between experimental data obtained using High Resolution Transmission Electron Microscope (HRTEM) system as compared to multiphase DPM based simulation. At weight percentage of SAC305 + 0.05% TiO₂ nanoparticles, the nanoparticles are well distributed. The fillet height of nano-reinforced solder also meets the minimum requirement for 01005 capacitor. Additionally, as the weight percentage of the doped nanoparticles increases, the time required for the formation of wetted solder also increases. In terms of the velocity and pressure distribution of the nano-reinforced lead (Pb)-free solder, higher weight percentage of doped nanoparticles have higher velocity distribution and lower pressure distributions.     

Enhancing the microstructure and tensile creep resistance of Sn-3.0Ag-0.5Cu solder alloy by reinforcing nano-sized ZnO particles

Sn-Ag-Cu lead-free solders are regarded as a potential substitute for Pb-Sn solder alloys. In the current study, the non-reacting, non-coarsening ZnO nano-particles (ZnO NPs) were successfully incorporated into Sn–3.0Ag–0.5Cu (SAC305) lead-free solder by mechanical mixing of ZnO powders and melting at 900 °C for 2 h. Tensile creep testing was performed for plain SAC305 solder and SAC305-0.7 wt% ZnO NPs composite solders and a Garofalo hyperbolic sine power-law relationship was created from the experimental data to predict the creep mechanism as a function of tensile stress and temperature. Based on the tensile creep results, the creep resistance of SAC305 solder alloy was improved considerably with ZnO NPs addition, although the creep lifetime was increased. From microstructure observation, reinforcing ZnO NPs into SAC305 solder substantially suppressed the enlargement of Ag₃Sn and Cu₆Sn₅ intermetallic compound (IMC) particles and decreased the spacing of the inter-particles between them, reduced the grain size of β-Sn and increased the eutectic area in the alloy matrix. The modification of microstructure, which leaded to a strong adsorption effect and high surface-free energy of ZnO NPs, could result in hindering the dislocation slipping, and thus provides standard dispersion strengthening mechanism. Moreover, the average activation energy (Q) for SAC305 and SAC305-0.7ZnO alloys were 50.5 and 53.1 kJ/mol, respectively, close to that of pipe diffusion mechanism in matrix Sn.     

High temperature ageing of microelectronics assemblies with SAC solder joints

In some applications, electronic systems are expected to operate at high ambient temperature (e.g. 150 °C). In this paper, we investigate the failure mechanism and microstructure evolution of solder-free (SAC) solder joints at a maximum temperature of 175 °C. It is found that no new failure mechanisms are triggered, and that ageing tests for solder can be accelerated at 175 °C. In particular, the growth rate of the interfacial intermetallic compound (IMC) is found to be consistent with that observed at lower temperatures.     

High cycle fatigue behaviour and generalized fatigue model development of lead-free solder alloy based on local stress approach

This paper gives an insight into high cycle fatigue (HCF) behaviour of a Pb-free solder alloy in the region between 10⁴ up to 10⁹ fatigue cycles using fatigue specimen. By means of a local stress approach, the method can be translated into solder joint fatigue evaluation in an application. The effect of temperatures (35 °C, 80 °C, 125 °C) on the fatigue property of Pb-free solder alloy is considered in this work to understand the possible fracture mechanisms and micro structural changes in a solder alloy at elevated temperature. Experiments are performed for different interaction factors under mean stresses (R = 0, − 1, − 3), stress concentration (notched, un-notched) and surface roughness. SN (stress-life) diagrams presented in this work will compare the fatigue performance of Sn_3.8Ag_0.7Cu solder alloy for different conditions. Furthermore, mathematical fatigue model based on FKM guideline (in German “Fachkuratorium Maschinenbau) is extracted out of the experiments under all these external effects. The models can be exported later for lifetime evaluation purposes on applications. The paper thereby proposes the use of FKM guideline in the field of microelectronics.     

Effect of elevated temperature on PCB responses and solder interconnect reliability under vibration loading

In this paper, vibration tests are conducted to investigate the influence of temperature on PCB responses. A set of combined tests of temperature and vibration is designed to evaluate solder interconnect reliability at 25 °C, 65 °C and 105 °C. Results indicate that temperature significantly affects PCB responses, which leads to remarkable differences in vibration loading intensity. The PCB eigenfrequency shifts from 290 Hz to 276 Hz with an increase of test temperature from 25 °C to 105 °C, during which the peak strain amplitude is almost the same.Vibration reliability of solder interconnects is greatly improved with temperature rise from 25 °C to 105 °C. Mean time to failure (MTTF) of solder joint at 65 °C and 105 °C is increased by 70% and 174% respectively compared to that of solder joint at 25 °C. Temperature dominates crack propagation path of solder joint during vibration test. Crack propagation path is changed from the area between intermetallic compound (IMC) layer and Cu pad to the bulk solder with temperature increase.     

A review of lead-free solders for electronics applications

Ever since RoHS was implemented in 2006, Sn3.0Ag0.5Cu (SAC305) has been the primary lead-free solder for attaching electronic devices to printed circuit boards (PCBs). However, due to the 3.0 wt% Silver (Ag) in SAC305, companies have been looking at less expensive solder alternatives, especially for use in inexpensive products that have short operating lives and are used in mild application conditions. This paper reviews new lead-free solder alternatives and the trends in the industry, including SnCu-based solders, SnAgCu solders with Ag content < 1.0 wt%, SnAg solders, and no-Ag low-temperature solders (e.g., SnBi-based solders). The analysis is conducted for reflow, wave, and rework conditions and for packaged and flip-chip devices.     

Improvement of thermal management of high-power GaN-based light-emitting diodes

The thermal management of high-power light-emitting-diode (LED) devices employing various die-attach materials is analyzed. Three types of die-attach materials are tested, including silver paste, Sn–3 wt.% Ag–0.5 wt.% Cu (SAC305) solder, and SAC305 solder added with a small amount of carbon nanotubes (CNTs). The analysis of thermal management is performed by comparing the temperatures of the LED chips in use and the total thermal resistances of the LED devices obtained respectively from the thermal infrared images and thermal transient analysis. Due to the high thermal conductivity of CNT, the addition of CNTs into the SAC305 solder reduces the total thermal resistance and chip temperature of the LED device, and the thermal management of the LED devices is improved accordingly.     

Effects of acrylic adhesives property and optimized bonding parameters on Sn58Bi solder joint morphology for flex-on-board assembly

Acrylic resin with a fast curable property has been used in low temperature ACFs applications. However, its poor thermo-mechanical property was a concern for solder ACFs applications. In this study, a novel thermomechanical analysis (TMA) method was introduced to measure its polymer rebound amounts due to pressures removal after a thermo-compression (TC) bonding process. Polymer resin was laminated between two silicon chips (7 1 7 mm²), and then a compressive mode TMA measurement was done on the prepared samples. Constant compressive pressures were applied until the temperature was gradually increased to target temperature, and the forces were removed at the target temperatures. The polymer rebound was measured by monitoring the z-axis dimension change after the compressive forces was removed. In addition, the effects of bonding temperatures (from 150 to 250 °C) and the bonding pressures (1, 2 and 3 MPa) on the SnBi58 (139 °C melting point) solder joints morphologies and joint resistances were evaluated to investigate acrylic resin property and find out the optimized bonding conditions for low Tg acrylic-based solder ACFs applications.     

Design and implementation of micro-power temperature to duty cycle converter using differential temperature sensing

The CMOS based temperature detection circuit has been developed in a standard 180 nm CMOS technology. The proposed temperature sensor senses the temperature in terms of the duty cycle in the temperature range of −30 °C to +70 °C. The circuit is divided into three parts, the sensor core, the subtractor and the pulse width modulator. The sensor core consists of two individual circuits which generates voltages proportional (PTAT) and complementary (CTAT) to the absolute temperature. The mean temperature inaccuracy (°C) of PTAT generator is −0.15 °C to +0.35 °C. Similarly, CTAT generator has mean temperature accuracy of ±1 °C. To increase thermal responsivity, the CTAT voltage is subtracted from the PTAT voltage. The resultant voltage has the thermal responsivity of 6.18 mV/°C with the temperature inaccuracy of ±1.3 °C. A simple pulse width modulator (PWM) has been used to express the temperature in terms of the duty cycle. The measured temperature inaccuracy in the duty cycle is less than ±1.5 °C obtained after performing a single point calibration. The operating voltage of the proposed architecture is 1.80±10% V, with the maximum power consumption of 7.2 μW.     

RoHS compliance in safety and reliability critical electronics

In some safety- and reliability-critical applications, electronic products are subjected to harsh operating conditions for a lifetime ranging over ten years. For instance, the Emerson DVC6215 remote mount sensor has operating requirements from − 52 °C to 120 °C along with the ability to withstand high rates of temperature fluctuations during manufacture and vibration up to 50G's during use. Since safety- and reliability-critical products are designed for use in industries with specialized operating conditions, there is no standardized set of operating conditions for these products. As a result, such products were exempt from the EU's Restriction of Hazardous Substances (RoHS) directive passed in 2006. However, specific deadlines have been set for exempt industries in the 2011 recast version of the RoHS directive. This paper provides a systematic lead-free transition plan in safety- and reliability-critical products. Existing lead-free solder options for harsh environmental operating conditions are evaluated along with the pros and cons in RoHS compliance.     

Effect of type of thermo-mechanical excursion on growth of interfacial intermetallic compounds in Cu/Sn-Ag-Cu solder joints

This study reports the effect of different types of thermo-mechanical excursion (TME) on growth of intermetallic compound (IMC) layer formed at the interface of Sn-3.0%Ag-0.5%Cu solder and Cu substrate. 1 mm thick solder joints were prepared by reflowing at 270 °C for either 60 or 90 s. Solder joints were then exposed to one of the following TME: (i) isothermal aging at 60 °C for 48, 96 and 144 h, (ii) thermal cycling between − 25 and 125 °C for 100, 200 and 400 cycles, and (iii) thermo-mechanical cycling between − 25 and 125 °C for 100, 200 and 400 cycles, wherein a shear strain of 10% per cycle was imposed on the joint. Finite element analysis (FEA) was performed to ascertain the effects of imposed shear strain and volumetric expansion due to the formation of IMC on the stress field in the solder joint. Irrespective of the type of TME, the thickness of the IMC layer increased with time. However, IMC thickness increased relatively more rapidly under thermo-mechanical cycling condition, indicating strain enhanced coarsening of the interfacial IMC layer. FEA showed that high stresses were generated in the IMC layer and near solder-IMC interface due to the formation of IMC layer as well as imposed external strain, which might then not only enhance the IMC growth kinetics, but also affect the morphology of the IMC layer.     

The performance and fracture mechanism of solder joints under mechanical reliability test

The drop resistance and fracture behavior of Sn–37Pb, Sn–3.0Ag–0.5Cu (SAC305), Sn–1.0Ag–0.5Cu (SAC105), and Sn–8.5Zn–0.5Ag–0.01Al–0.1 Ga (SnZn-5e) solder ball joints under the board-level drop test (BLDT) and the ball impact test (BIT) were studied. The results show that the drop reliabilities in terms of the characteristic life ratio from the Weibul plot are SnZn-5e : Sn–37Pb:SAC105:SAC305 = 3.1:2.9:2.1:1. It was observed that failure of Sn–37Pb occurred at the eutectic tin–lead phase whereas it took place at the brittle interface between the (Cu,Ni)₆Sn₅ inter-metallic compound and Ni layer in SAC305. The failure of SAC105 was found to be located within the solder matrix as well as at the interface of the inter-metallic compound. The failure of SnZn-5e depends on the morphology of the interfacial inter-metallic compound. The failure modes of Sn–37Pb and SAC305 after the BIT were similar to those after the BLDT. The maximum impact force (F_max) and the initial fracture energy (E) from the BIT can be used to evaluate the drop reliability of solder joints.     

Comparison of Extensive Thermal Cycling Effects on Microstructure Development in Micro-alloyed Sn-Ag-Cu Solder Joints

Pb-free solder alloys based on the Sn-Ag-Cu (SAC) ternary eutectic have promise for widespread adoption across assembly conditions and operating environments, but enhanced microstructural control is needed. Micro-alloying with elements such as Zn was demonstrated for promoting a preferred solidification path and joint microstructure earlier in simple (Cu/Cu) solder joints studies for different cooling rates. This beneficial behavior now has been verified in reworked ball grid array (BGA) joints, using dissimilar SAC305 (Sn-3.0Ag-0.5Cu, wt.%) solder paste. After industrial assembly, BGA components joined with Sn-3.5Ag-0.74Cu-0.21Zn solder were tested in thermal cycling (−55°C/+125°C) along with baseline SAC305 BGA joints beyond 3000 cycles with continuous failure monitoring. Weibull analysis of the results demonstrated that BGA components joined with SAC + Zn/SAC305 have less joint integrity than SAC305 joints, but their lifetime is sufficient for severe applications in consumer, defense, and avionics electronic product field environments. Failure analysis of the BGA joints revealed that cracking did not deviate from the typical top area (BGA component side) of each joint, in spite of different Ag₃Sn blade content. Thus, SAC + Zn solder has not shown any advantage over SAC305 solder in these thermal cycling trials, but other characteristics of SAC + Zn solder may make it more attractive for use across the full range of harsh conditions of avionics or defense applications.     

Storage moduli,loss moduli and damping factor of GaAs and Ga1−xMnxAs thin films using DMA 2980

The spin injector part of spintronic FET and diodes suffers from fatigue due to rising heat on the depletion layer. In this study the stiffness of Ga_1−xMn_xAs spin injector in terms of storage modulus with respect to a varying temperature, 45 °C≤T≤70 °C was determined. It was observed that the storage modulus for MDLs (Manganese Doping Levels) of 0%, 1% and 10% decreased with increase in temperature while that with MDLs of 20% and 50% increase with increase in temperature. MDLs of 20% and 50% appear not to allow for damping but MDLs ≤20% allow damping at temperature range of 45 °C≤T≤70 °C. The magnitude of storage moduli of GaAs is smaller than that for ferromagnetic Ga_1−xMn_xAs systems. The loss moduli for GaAs were found to reduce with increase in temperature. Its magnitude of reducing gradient is smaller than Ga_1−xMn_xAs systems. The two temperature extremes show a general reduction in loss moduli for different MDLs at the study temperature range. From damping factor analysis, damping factors for ferromagnetic Ga_1−xMn_xAs was found to increase with decrease in MDLs contrary to GaAs which recorded the largest damping factor at 45 °C≤T≤70 °C. Hence, MDL of 20% shows little damping followed by 50% while MDL of 0% has the most damping in an increasing trend with temperature.     

Failure and stress analysis of through-aluminum-nitride-via substrates during thermal reliability tests for high power LED applications

The objective of this study is to evaluate the reliability of through-aluminum-nitride-via (TAV) substrate by comparing those experimental results with the finite element simulation associated with measurements of aluminum nitride (AlN) strength and the thermal deformation of Cu/AlN bi-material plate. Two reliability tests for high-power LED (Light emitting diode) applications are used in this study: one is a thermal shock test from − 40 °C to 125 °C, the other is a pressure cook test. Also, the strength of AlN material is measured by using three-point bending test and point load test. The reliability results show that TAV substrates with thicker Cu films have delamination and cracks after the thermal shock test, but there are no failure being found after the pressure cook test. The determined strengths of AlN material are 350 MPa and 650 MPa from three-point bending test and point load test, respectively. The measurement of thermal deformation shows that the bi-material plate has residual-stress change after the solder reflow process, also indicating that a linear finite element model with the stress-free temperature at 80 °C can reasonably represent the stress state of the thermal shock test from − 40 °C to 125 °C without considering Cu nonlinear effect. The further results of the finite element simulation associated with strength data of AlN material have successfully described those of the reliability test.     

Sub-1 V,pico-watt subthreshold CMOS voltage reference circuit with dual temperature compensation

A pico-watt CMOS voltage reference is developed using an SK Hynix 0.18 µm CMOS process. The proposed architecture is resistorless and consists of MOSFET circuits operated in the subthreshold region. A dual temperature compensation technique is utilized to produce a near-zero temperature coefficient reference output voltage. Experimental results demonstrate an average reference voltage of 250.7 mV, with a temperature coefficient as low as 3.2 ppm/°C for 0 to 125 °C range, while the power consumption is 545 pW under a 420 mV power supply at 27 °C. The power supply rejection ratio and output noise without any filtering capacitor at 100 Hz are −54.5 dB and 2.88 µV/Hz^1/2, respectively. The active area of the fabricated chip is 0.00332 mm².     

Consideration of temperature and current stress testing on flip chip solder interconnects

This work discusses the experimental set-up and data interpretation for high temperature and current stress tests of flip chip solder joints using the four-point Kelvin measurement technique. The single solder joint resistance responses are measured at four different four-point Kelvin structure locations in a flip chip package. Various temperatures (i.e., 125–165 °C) and electric current (i.e., 0.6–1.0 A) test conditions are applied to investigate the solder joint resistance degradation behavior and its failure processes. Failure criterion of 20% and 50% joint resistance increases, corresponding to solder and interfacial voiding, are employed to evaluate the solder joint electromigration reliability. The absolute resistance value is substantially affected by the geometrical layout of the metal lines in the four-point Kelvin structure, and this is confirmed by finite element simulation.Different current flow directions and strengths yielded different joint resistance responses. The anode joint, where electrons flow from the die to the substrate, usually measured an earlier resistance increase than the cathode joint, where electrons flow in the opposite direction. The change in measured joint resistances can be related to solder and interfacial voiding in the solder joint except for ±1 A current load, where resistance drop mainly attributed to the broken substrate Cu metallization as a result of “hot-spot” phenomenon. The solder joint temperature increases above the oven ambient temperature by ～25 °C, ～40 °C and ～65 °C for 0.6 A, 0.8 A and 1.0 A stress current, respectively. It is found that two-parameter log-normal distribution gives a better lifetime data fitting than the two-parameter Weibull distribution. Regardless of failure criterion used, the anode joint test cells usually calculated a shorter solder joint mean life with a lower standard variation of 0.3–0.6, as compared to the cathode joint test cells with a higher standard variation of 0.8–1.2. For a typical flip chip solder joint construction, electromigration reliability is mainly determined by the under bump metallization consumption and dissolution, with intermetallic compound formation near the die side of an anode joint.     

High-lead flip chip bump cracking on the thin organic substrate in a module package

Flip chip bump cracking was observed after Si die attach reflow on the organic substrate of a module package. High-lead bump and eutectic SnPb cladding were used on Si die and the substrate sides, respectively. The reflow peak temperature was 260 °C for compatibility with passive components attach using lead-free solder. Flip chip bump cracking occurred at high-lead solder close to the die side. The cracking was eliminated by lowering the reflow peak temperature down to 225 °C. Main cause of the cracking at 260 °C reflow was attributed to the extensive Sn diffusion into high lead bump. This decreased the melting point of the high-lead solder around the die side, which in turn worsened the adhesion between solder and die due to the coexistence of solid and liquid. Diffusion length estimation showed both of the liquid- and solid-state diffusions of Sn. Crack gap in the solder bump was consistent with thermal expansion mismatch between Si die and organic substrate. The bump cracking was mitigated by use of 225 °C reflow, limiting Sn diffusion and providing a good integrity of high lead bumps on die side.