Fabrication of nano-sized resist patterns on flexible plastic film using thermal curing nano-imprint lithography

Due to polymer’s excellent flexibility, transparency, reliability and light weight, it is a good candidate material for substrate of devices including organic electronic devices, biomedical devices, and flexible displays (LCD and OLED). In order to build such devices on polymer, nano- to micron-sized patterning must be accomplished. Since polymer materials reacts with organic solvents or developer solutions which are inevitably used in photolithography and cannot bear high temperature (∼140 °C) process for photoresist baking, conventional photolithography cannot be used to polymer substrate. In this research, monomer based thermal curing imprinting lithography was used to make as small as 100 nm dense line and space patterns on flexible PET (polyethylene-terephthalate) film. Compared to hot embossing lithography, monomer based thermal curing imprint lithography uses monomer based imprint resin which consists of base monomer and thermal initiator. Since it is liquid phase at room temperature and polymerization can be initiated at 85 °C, which is much lower than glass temperature of polymer resin, the pattern transfer can be done at much lower temperature and pressure. Hence, patterns as small as 100 nm were successfully fabricated on flexible PET film substrate by monomer based thermal curing imprinting lithography at 85 °C and 5 atm without any noticeable degradation of PET substrate.     

Very facile fabrication of aligned organic nanowires based high-performance top-gate transistors on flexible,transparent substrate

Aligned single-crystalline organic nanowires (NWs) show promising applications in flexible and stretchable electronics, while the use of pre-existing aligned techniques and well-developed photolithography techniques are impeded by the large incompatibility with organic materials and flexible substrates. In this work, aligned copper phthalocyanine (CuPc) organic NWs were grown on flexible and transparent poly(dimethylsiloxane) (PDMS) substrate via a grating-assisted growth approach. Furthermore, a simple yet efficient etching-assisted transfer printing (ETP) method was used to achieve CuPc NW array-based flexible top-gate organic field-effect transistors (OFETs) with a high mobility up to 2.0 cm² V⁻¹ s⁻¹, a small operating voltage within ±10 V, a high on/off ratio >10⁴, and excellent bend stability with bending radius down to 3 mm. It is expected that the high-performance organic NW array-based top-gate OFETs with exceeding bend stability will have important applications in future flexible electronics.     

Flexible Chip-on-Flex (COF) and embedded Chip-in-Flex (CIF) packages by applying wafer level package (WLP) technology using anisotropic conductive films (ACFs)

Due to increasing demand for higher performance, greater flexibility, smaller size, and lighter weight in electronic devices, extensive studies on flexible electronic packages have been carried out. However, there has been little research on flexible packages by wafer level package (WLP) technology using anisotropic conductive films (ACFs) and flex substrates, an innovative packaging technology that requires fewer process steps and lower process temperature, and also provides flexible packages. This study demonstrated and evaluated the reliability of flexible packages that consisted of a flexible Chip-on-Flex (COF) assembly and embedded Chip-in-Flex (CIF) packages by applying a WLP process.The WLP process was successfully performed for the cases of void-free ACF lamination on a 50 μm thin wafer, wafer dicing without ACF delamination, and a flip-chip assembly which showed stable bump contact resistances. The fabricated COF assembly was more flexible than the conventional COF whose chip thickness is about 700 μm. To evaluate the flexibility of the COF assembly, a static bending test was performed under different bending radiuses: 35 mm, 30 mm, 25 mm, and 20 mm. Adopting optimized bonding processes of COF assembly and Flex-on-Flex (FOF) assembly, CIF packages were then successfully fabricated. The reliability of the CIF packages was evaluated via a high temperature/humidity test (85 °C/85% RH) and high temperature storage test (HTST). From the reliability test results, the CIF packages showed excellent 85 °C/85% RH reliability. Furthermore, guideline of ACF material property was suggested by Finite Element Analysis (FEA) for better HTST reliability.     

Template replication for full wafer imprint lithography

Typically, the Step and Flash Imprint Lithography (S-FIL^TM) process uses field-to-field drop dispensing of UV-curable liquids for step-and-repeat patterning. Several applications, including patterned magnetic media, photonic crystals, and wire grid polarizers, are better served by a process that allows high-throughput, full-wafer patterning of sub-100 nm structures with modest alignment. Full-wafer imprinting requires a full-wafer template; however, creation of a wafer-scale imprint template with sub-100 nm structures is not feasible with direct-writing approaches. This paper describes a practical methodology for creating wafer-scale templates suitable for full-wafer imprinting of sub-100 nm structures.The wafer-scale template is replicated from a smaller area master template using the S-FIL step-and-repeat process. The pattern is repeated to accommodate the wafer substrate targeted for a particular application. The tone of the master template is maintained by employing an SFIL/R^TM (reverse tone) pattern transfer process. To create the replicate template, the patterns are imprinted onto a fused silica wafer that has been coated with chromium and an organic transfer layer. A silicon-containing resist, Silspin^TM, is spun on to planarize the organic monomer material. Following an etch back of the Silspin, the monomer and transfer layer are patterned using the Silspin as a hard mask. The Silspin and monomer stack then serves as a masking layer for the chromium and fused silica etches. The remaining monomer and chromium are then removed to create a conformal replicate template.     

Mechanical and electrical properties of ultra-thin chips and flexible electronics assemblies during bending

Ultra-thin chips of less than 20 μm become flexible, allowing integration of silicon IC technology with highly flexible electronics such as food packaging sensor systems or healthcare and sport monitoring tags as wearable patches or even directly in clothing textile. The ultra-thin chips in these products will be bent to a very high curvature, which puts a large strain on the chips during use.In this paper a modified four-point bending method is presented, which is capable of measuring chip stress at high curvatures. The strength of several types of ultra-thin chips is evaluated, including standalone ultra-thin test chips and back-thinned 20 μm thick microcontrollers, as well as assemblies containing integrated ultra-thin microcontroller chips. The effect of chip thickness, bending direction and backside finish on strength and minimum bending radius is investigated using the modified four point bending method. The effect of bonding ultra-thin chips to flexible foils on the assembly strength and minimum bending radius is evaluated as well as the effect of bending on electrical properties of the bonded microcontroller dies.     

Electromechanical reliability of a flexible metal-grid transparent electrode prepared by electrohydrodynamic (EHD) jet printing

In this study, we investigated the electrical and mechanical characteristics of an Ag-grid flexible transparent electrode (FTE) as a flexible and even foldable transparent electrode for flexible electronic devices. The Ag-grid FTE was fabricated on a polyethylene terephthalate substrate using the electrohydrodynamic (EHD) jet printing process. We achieved a fine pattern of a line width of 4.6 μm. The Ag-grid FTE exhibited the sheet resistances of ~ 4 Ω/sq. and optical transmittance of around 80% with a pitch of 150 μm. We also used the carbon treated black metal-nanoparticles to lower the haze up to 1%. The effects of the sintering temperature on the microstructure and sheet resistance were investigated. From the sintering temperature of 150 °C, a stable necking between nano-particles began to form, and the sheet resistance substantially decreased. The mechanical flexibility and durability of the Ag-grid FTEs were investigated via bending, stretching, dynamic/static fatigue tests, and adhesion tests. The outward bending test results showed that the Ag-grid FTE can be bent up to 3 mm without failure of the electrode. The stretching test indicated that the Ag-grid FTEs can be stretched to a tensile strain of 9%; however, the Ag-grid was slightly vulnerable at the extreme bending radius in the bending cyclic fatigue tests due to severe strain accumulation. The Ag-grid FTEs exhibited a very stable static bending fatigue property during the 1000 h test as well as an excellent adhesion property. These results indicate that the Ag-grid FTE is a promising electrode scheme for bendable or foldable electronic devices.     

Study on critical dimension of printable phase defects using an EUV microscope

We constructed an extreme ultraviolet microscopy (EUVM) system for actinic mask inspection that consists of Schwarzschild optics and an X-ray zooming tube. This system was used to inspect finished extreme ultraviolet lithography (EUVL) masks and Mo/Si glass substrates. A clear EUVM image of a 300-nm-wide pattern on a 6025 glass mask was obtained. The resolution was estimated to be 50 nm or less from this pattern. Programmed phase defects on the glass substrate were also used for inspection. The EUV microscope was able to resolve a programmed pit defect with a width of 40 nm and a depth of 10 nm and also one with a width of 70 nm and a depth of 2 nm. However, a 75-nm-wide 1.5-nm-deep pit defect was not resolved. Thus, in this study, one critical dimension of a pit defect was estimated to be a depth of 2 nm.     

Electromechanical properties of printed copper ink film using a white flash light annealing process for flexible electronics

We report on a systematic study of the electromechanical properties of flexible copper (Cu) thin film for flexible electronics. Cu ink is synthesized with chemical reduction process. Cu ink film spin-coated on a polyimide substrate is annealed with white flash light, also known as intense pulsed light (IPL), which guarantees a room temperature and sub-second process in ambient conditions. IPL annealed Cu film shows the electrical resistivity of 4.8 μΩ cm and thickness of 200 nm. The electromechanical properties of IPL annealed Cu film are investigated via outer/inner bending, stretching, and adhesion tests, and it is compared with conventional electron-beam evaporated Cu film. IPL annealed Cu film shows a constant electrical resistance within a bending radius of 6 mm. The bending fatigue test shows that the Cu film can withstand 10,000 bending cycles. In the stretching test, the Cu film shows a 50% increase in resistance when a strain of 2.4% was induced. At 4% strain, the resistance increases more than 200%. Meanwhile, the electron-beam evaporated film shows a constant resistance up to a strain of 4%. Lower stretchability of IPL annealed Cu film is attributed to its inherent cracks and porous film morphologies. IPL annealing induces the local melting at the interface between the substrate and Cu film, which increases the adhesion strength of the Cu film. These results provide useful information regarding the mechanical flexibility and durability of the nanoparticle films for the development of flexible electronics.     

Fabrication of high efficiency and color stable white organic light-emitting diodes by an alignment free mask patterning

Small molecule based white organic light-emitting diodes were fabricated by using an alignment free mask patterning method. A phosphorescent red/green emitting layer was patterned by a metal mask without any alignment and a blue phosphorescent emitting layer was commonly deposited on the patterned red/green emitting layer. A white emission could be obtained due to separate emission of red/green and blue emitting layers. A maximum current efficiency of 30.7 cd/A and a current efficiency of 26.0 cd/A at 1000 cd/m² were obtained with a color coordinate of (0.39, 0.45). In addition, there was little change of emission spectrum according to luminance because of balanced red/green and blue emissions.     

Improvement of model kernel representation in process simulation by taking pattern correlation into account

In the modern photolithography simulation, the computation demand on resolution enhancement techniques (RETs) and optical proximity corrections (OPCs) is proportional to the simulation runtime of the model, which is dependant on the number of the kernels retained with the constrain of the model accuracy. Thus, it is essential to retain as few kernels as possible in the model calibration. Traditionally, the kernels are retained based upon their contribution to the aerial image, which is solely determined by the magnitudes of the eigenvalues. This method works well for arbitrary photolithography masks. However, real masks are never arbitrary and random. Instead, they have regular shapes and arrangements as governed by design rules, indicating the contributions from the retained kernels are statistically correlated to each other. By taking such correlations into account, the system representation can be improved to contain fewer kernels for a constant model accuracy. In this paper, the mathematical derivation of the pattern correlation concept is discussed and the concept is applied to a contact layer illuminated by a Quasar optical system with λ = 193 nm and NA = 0.8. Significant improvement of model kernel representation is observed, four improved kernels vs 15 original kernels, and the new methodology is justified by comparing the difference of the aerial image intensities between the full kernel representation and the retained kernels representation at sampling points.     

RF measurements to pinpoint defects in inkjet-printed,thermally and mechanically stressed coplanar waveguides

In this work 10-GHz-band RF measurement and microscopy characterizations were performed on thermally and mechanically long-term-stressed coplanar waveguides (CPW) to observe electrical and mechanical degradation in 1-mm-thick PPO/PPE polymer substrates with inkjet-printed Ag conductors. The structure contained two different CPW geometries in a total of 18 samples with 250/270 μm line widths/gaps and 670/180 μm line widths/gaps. A reliability test was carried out with three sets. In set #1 three 250 μm and three 670 μm lines were stored in room temperature conditions and used as a reference. In set #2 six samples were thermally cycled (TC) for 10,000 cycles, and in set #3 six samples were thermally cycled and bent with 6 mm and 8 mm bending diameters.Thermal stressing was done by cycling the samples in a thermal cycling test chamber operating at 0/100 °C with 15-minutes rise, fall, and dwell times, resulting in a one-hour cycle. The samples were analyzed during cycling breaks using a vector network analyzer (VNA). In addition to optical microscopy, field emission scanning electron microscopy (FESEM) and atomic force microscopy (AFM) imaging were used to mechanically characterize the structures.The results showed that the line width of 670 μm had better signal performance and better long-term reliability than the line width of 250 μm. In this study, the average limit for proper RF operation was 2500 thermal cycles with both line geometries. The wide CPW lines provided more stable characteristics than the narrow CPW lines for the whole 10,000-cycle duration of the test, combined with repeated bending with a maximum bending radius of 6 mm. A phenomenon of nanoparticle silver protruding from cracks in the print of the bent samples was observed, as well as fracturing of the silver print in the CPW lines.     

Nanoparticle-based,spray-coated silver top contacts for efficient polymer solar cells

We demonstrate a solution-processed top electrode for large area organic electronic devices. A Ag nanoparticle solution is spray-coated directly on top of an inverted bulk-heterojunction organic solar cell through a shadow mask. After sintering the Ag nanoparticle film at 150 °C, a temperature which is compatible with processes on flexible substrates, cells show performances comparable to those of reference devices with evaporated top-contacts.     

Flexible organic field-effect transistors based on electrospun conjugated polymer nanofibers with high bending stability

We report on flexible, single electrospun nanofiber field-effect transistors made by a blend of poly(3-decylthiophene) and poly(3-hexylthiophene), assessing for the first time the performances of this class of devices in terms of stability upon repeated tensile bending. Charge-carrier mobilities in the nanofiber-based device are estimated of the order of 10⁻³ cm²/(V s). Repeated cycles of bending and relaxing are performed, and the evolution of the device current–voltage characteristics is monitored up to 1000 cycles. We find that during bending the mobility is higher than that measured in planar conditions, and that after about 100 bending cycles it rapidly stabilizes. The here observed bending stability suggests a high compatibility of electrospun nanofibers with devices fabricated by roll-to-roll processes, and with bendable or wearable electronics.     

Electrical characteristics of a-IGZO transistors along the in-plane axis during outward bending

A highly flexible amorphous indium–gallium–zinc–oxide (a-IGZO) thin film transistor (TFT) was tested with respect to the in-plane axis location and device architecture in a bending system. Short channel a-IGZO TFTs were fabricated based on the conventional coplanar configuration and the islanded structure on a polyimide (PI) substrate and were then subjected to a cyclic bending of 1 × 10⁵ with varying radii smaller than a few mm. Embedding the devices at a neutral position in bending system allowed them to function well when exposed to the induced mechanical strain, regardless of the difference in the structural geometry. However, placement of the TFTs outside of the neutral surface resulted in a drastic suppression of the strain-induced electrical failure for the island configuration as the distance of the TFTs from the neutral surface increased. By contrast, the conventional structure, when placed outside the neutral surface, showed strongly accelerated device failure as the strain on the TFTs was increased. The electromechanical integrity was maintained for island-structured TFTs under a bending stress with a radius of 1 mm and a position margin of 50 μm away from the neutral surface. The brittle and rigid characteristics of TFT arrays with inorganic components are still considered problematic in terms of being put into practical use in flexible applications; nevertheless, the high flexibility achieved by this structural design and its geometrical characterization along the in-plane axis shows the great potential for a-IGZO TFTs to serve as the functional building blocks of new platform applications, such as rolling or folding displays, by suppressing the mechanical strain in the backplane.     

Effects of different electroplated gate electrodes on electrical performances of flexible organic thin film transistor and flexibility improvement

Various electroplated metal gate electrodes (Ni, Cu, and Au) on flexible polyimide (PI) substrates were applied to the fabrication of inverted staggered pentacene organic thin film transistors (OTFTs). The metal gate electrodes additively electroplated onto the patterned negative photoresist mask on the Cu(seed)/Cr(adhesion) layers sputter-deposited on the O₂-plasma-treated PI substrates were effective in obtaining good adhesion between the metal gate electrode and organic substrate. It was found that the reduction in the surface roughnesses of the electroplated metal gate and of the subsequently deposited PVP (poly-4-vinyl phenol) gate dielectric layers was a critical factor in improving the device performance. The Ni-gated OTFT exhibited the best electrical characteristics, with a field-effect mobility of ≅0.2 cm²/V-s and a current on/off ratio of ≅10³, due to the better chemical stability of the Ni electrode and the smoother surface of the PVP layer on the Ni electrode, as compared to the OTFTs with PVP/Cu or PVP/Au gates. The results of the flexibility test showed that the field-effect mobility and current on/off ratio were not changed significantly when the OTFTs were subjected to 10,000 cyclic bendings with a bending radius of 6 mm in tension mode (outward bending).     

A printed OTFT-backplane for AMOLED display

An AMOLED panel driven by an OTFT-backplane is an attractive display because OTFTs and OLEDs use organic materials with unique characteristics such as low temperature and solution processing ability, and thus are able to implement the key features of future displays. In this study we applied some printing technologies to fabricate an OTFT-backplane for AMOLEDs. Screen printing combined with photolithography with Ag ink was used for the gate electrodes and scan bus lines and contact pads. Ag metal lines with a width of 20 μm and thickness of 60 nm and resistivity of 3.0 × 10^?5 Ω cm were achieved. Inkjet printing was applied to deposit TIPS-pentacene as an organic semiconductor. The OTFT-backplane using the Ag gate electrodes and TIPS-pentacene exhibited uniform performance over 17,500 pixels on a 7 in. panel. The mobility was 0.31 ± 0.05 cm²/V s with a deviation of 17%. The AMOLED panel successfully demonstrated its ability to display patterns.     

Substrate noise isolation improvement in a single-well standard CMOS process

This work describes a fully CMOS compatible methodology, which makes available a pseudo deep n-well in single-well standard CMOS process. The proposed method is based on mask manipulation to accommodate the field implant p-type region into the n-well, and does not require any additional masks or modification in the CMOS process flow. According to the experimental results, the floating NMOS made available by the methodology shows a reduction in the threshold voltage, which implies a slight improvement in its performance, when compared with its standard NMOS counterpart. It was also experimentally demonstrated up to 3 GHz, that the guard-ring field implant/pseudo deep n-well proposed structure improves substrate noise isolation when compared to the classical p+ guard-ring, with a maximum improvement above 20 dB for low frequencies and a minimum of 4 dB at 3 GHz.     

Rigorous electromagnetic simulation of mask magnification effects on the diffracted light for EUV binary mask

Extreme ultraviolet (EUV) lithography is expected to be the main candidate in the semiconductor manufacturing starting at 32 nm. As the CD is getting smaller, the aspect ratio of the patterns on the EUV mask is becoming larger. The shadowing effect will become much more significant when keeping the same 4× mask magnification. In this work, mask magnification effects on the diffracted light were explored with rigorous coupled-wave analysis (RCWA) for the sub-32 nm node. The simulated binary mask consists of 70-nm TaBN absorber and 2.5-nm Ru capping layer. The dependences of the diffraction efficiencies on mask pitches were calculated. The impacts of the absorber shadowing were observed from the near field distribution on the EUV mask. The aerial images formed by the diffracted light from the 4× and 8× masks were further evaluated.     

Consideration of temperature and current stress testing on flip chip solder interconnects

This work discusses the experimental set-up and data interpretation for high temperature and current stress tests of flip chip solder joints using the four-point Kelvin measurement technique. The single solder joint resistance responses are measured at four different four-point Kelvin structure locations in a flip chip package. Various temperatures (i.e., 125–165 °C) and electric current (i.e., 0.6–1.0 A) test conditions are applied to investigate the solder joint resistance degradation behavior and its failure processes. Failure criterion of 20% and 50% joint resistance increases, corresponding to solder and interfacial voiding, are employed to evaluate the solder joint electromigration reliability. The absolute resistance value is substantially affected by the geometrical layout of the metal lines in the four-point Kelvin structure, and this is confirmed by finite element simulation.Different current flow directions and strengths yielded different joint resistance responses. The anode joint, where electrons flow from the die to the substrate, usually measured an earlier resistance increase than the cathode joint, where electrons flow in the opposite direction. The change in measured joint resistances can be related to solder and interfacial voiding in the solder joint except for ±1 A current load, where resistance drop mainly attributed to the broken substrate Cu metallization as a result of “hot-spot” phenomenon. The solder joint temperature increases above the oven ambient temperature by ～25 °C, ～40 °C and ～65 °C for 0.6 A, 0.8 A and 1.0 A stress current, respectively. It is found that two-parameter log-normal distribution gives a better lifetime data fitting than the two-parameter Weibull distribution. Regardless of failure criterion used, the anode joint test cells usually calculated a shorter solder joint mean life with a lower standard variation of 0.3–0.6, as compared to the cathode joint test cells with a higher standard variation of 0.8–1.2. For a typical flip chip solder joint construction, electromigration reliability is mainly determined by the under bump metallization consumption and dissolution, with intermetallic compound formation near the die side of an anode joint.     

Time domain analysis for foldable thin UWB monopole antenna

In this paper, the time domain analysis of an Ultra Wide Band antenna flexible circular monopole antenna is presented. The antenna is fabricated on liquid crystalline polymer flexible substrate with a compact geometry that makes it suitable for wearable applications under different bending conditions. The antenna is fed by coplanar waveguide transmission line and has a compact total size of 40 × 22 mm². Moreover, the antenna has good radiation efficiency (97%) over the bandwidth. The presented antenna has a good performance over the operating spectrum for straight and bending configurations. The design principals along with simulation and experimental results are presented in this contribution.