A new peak detector based on usage of second-generation current conveyors

A new precision peak detector (full-wave rectifier) of input sinusoidal signals, which employs four two second-generation current conveyors and five metal-oxide-semiconductor transistors, is presented in this paper. The circuit gives a dc output voltage that is the peak input voltage over a wide frequency range, with a very low ripple voltage and low harmonic distortion. The proposed circuits use an all-pass filter as a 90° phase shifter of the processed input signal. The results of the calculations are verified using SPICE simulations.     

New high accuracy CMOS current conveyors

In this paper, a new CMOS CCII⁺ is proposed. The circuit is characterized by high precision in voltage tracking and exhibits very low input resistance. An adaptive voltage offset cancellation methodology is introduced and then applied to the proposed circuit. As a result, a higher accuracy CCII⁺ is presented. For both circuits, the voltage offset cancellation is independent of the input current and voltage. To demonstrate the strength of the proposed architectures, fair comparisons with Liu and Yodprasit CCII realizations are held.     

Compact implementation of high-performance CMOS current mirror

A high-performance compact current mirror implementation with very low input resistance, very high output resistance, high copying accuracy, low input and output voltage supply requirements and high bandwidth is proposed. The circuit characteristics are validated with simulations in 0.5 /spl mu/m CMOS technology and with experimental results.     

一种高转换速率衬底电位选择电路的设计

本文基于0.5μm 5V DPTM CMOS工艺设计了一款用于LED驱动芯片的衬底电位选择电路。该电路采用峰值电流镜作为偏置,使其在低电压下能够正常工作,并运用源端输入带正反馈的比较器,使得电路具有一定的迟滞和高的转换速率,最后巧妙的设计了输出级,使输出结果尽可能的与芯片中的最高电压相等。仿真结果显示,比较器的转换速率为55.7V/μs,并且具有0.2V的迟滞,满足设计要求。     

A sub-2.0 V BiCMOS logic circuit with a BiCMOS charge pump

A BiCMOS logic circuit with very small input capacitance has been developed, which operates at low supply voltages. A High-beta BiCMOS (Hβ-BiCMOS) gate circuit which fully utilizes the bipolar transistor features achieves 10 times the speed of a CMOS gate circuit with the same input capacitance and operating at 3.3 V supply voltage. In order to lower the minimum supply voltage of Hβ-BiCMOS, a BiCMOS circuit configuration using a charge pump to pull up the output high level of the BiCMOS gate circuit is proposed. By introducing a BiCMOS charge pump, Hβ-BiCMOS achieves very high speed operation at sub-2.0 V supply voltage. It has also been demonstrated that only a very small number of charge pump circuits are required to drive a large number of Hβ-BiCMOS gate circuits     

采用GaN HEMT的可调窄脉冲激光器驱动电路

为实现纳秒级的输出光脉宽,使用GaN HEMT作为激光器放电回路的开关管。由于GaN HMET的栅极总电荷小,提出使用小尺寸的GaN HEMT建立驱动电路的输入级,响应控制信号,控制放电回路开关管。搭建电路驱动860 nm激光器,并进行测试。放电回路电源电压为12 V,测试结果显示,最大输出光脉宽8.8 ns对应大于8 W的峰值功率,输出最小光脉宽为4 ns。为实现更大的脉宽可调范围,设计另一款电路并测试。该电路实现输出光脉宽大于8.4 ns可调,在电源电压20 V、输入信号脉宽100 ns的条件下,输出光峰值功率可达46 W。电路尺寸分别为10 mm×6 mm和13 mm×11 mm,为实现进一步小型化,对设计的电路提出了集成方法。提出的电路结构简单、容易实现集成且成本低,为窄脉冲激光器驱动电路的设计提供了新的思路。     

高压电源管理中内部稳压器的设计

设计了一用于高压电源管理芯片中的内部稳压器电路,为系统中低压模块提供稳定的电源电压输入.电路分为基准和线性稳压器两个部分.整个电路结构为:峰值电流源为Brokaw基准供电,获得的基准电压输入后端放大器的正向端中,运用线性稳压器结构进行降压,为后级各模块提供三组不同的电压,又根据各个电源使用场合的不同,对数字电源加入关断机制,并且加强了功率电源的负载调整能力,有效地防止了后续模块的不正常工作.系统测试表明,电路能够产生三组需要的电压,并在容差范围内能够使系统正常工作.     

提高Buck型DC-DC变换器带载能力的补偿设计

针对采用斜坡补偿的峰值电流控制Buck型DC-DC变换器设计,由输入电压及工作温度的差异造成的对输出带负载能力和峰值电流严重影响的问题,提出一种新颖的可提高电路带载能力的补偿设计.通过在斜坡补偿模块中加入一个随输入电压线性变化的基准源,补偿输入电压变化对采样与斜坡补偿峰值电压的影响.同时,采用不同的工艺对反馈环中的比例...     

Electronically tunable current-mode instrumentation amplifier with high CMRR and wide bandwidth

A current-mode instrumentation amplifier consists of only two current follower differential input transconductance amplifiers is proposed in this paper. The proposed circuit of instrumentation amplifier is realized without using any passive components. Thus, the proposed circuit structure is very simple and suitable to the integrated circuit technology. The input impedance is low and output impedance is high, therefore the proposed circuit is easily cascadable. The gain of the proposed instrumentation amplifier is electronically controllable. The proposed circuit also enjoys the features of high common mode rejection ratio, wide bandwidth and low power consumption. Additionally, performance of the proposed circuit is tested under process, supply voltage and temperature variations. Furthermore, another circuit of instrumentation amplifier, which is capable of providing higher differential mode gain is also shown. The non-ideal and parasitic studies are included. HSPICE simulations are performed to validate the proposed circuits of instrumentation amplifier.     

A low-voltage low-power instrumentation amplifier based on supply current sensing technique

In this paper a new low-voltage low-power instrumentation amplifier (IA) is presented. The proposed IA is based on supply current sensing technique where Op-Amps in traditional IA based on this technique are replaced with voltage buffers (VBs). This modification results in a very simplified circuit, robust performance against mismatches and high frequency performance. To reduce the required supply voltage, a low-voltage resistor-based current mirror is used to transfer the input current to the load. The input and output signals are of voltage kind and the proposed IA shows ideal infinite input impedance and a very low output one. PSPICE simulation results, using 0.18 μm TSMC CMOS technology and supply voltage of ±0.9 V, show a 71 dB CMRR and a 85 MHz constant −3 dB bandwidth for differential-mode gain (ranging from 0 dB to 18 dB). The output impedance of the proposed circuit is 1.7 Ω and its power consumption is 770 µW. The method introduced in this paper can also be applied to traditional circuits based on Op-Amp supply current sensing technique.     

A 1.2 V current-mode true RMS-DC converter based on the floating gate MOS translinear principle

A current-mode true RMS-DC converter based on a novel synthesis of translinear loop squarer/divider and simplified current-mode low-pass filter is presented. The circuit employs floating gate MOSFETs that operate in strong inverted saturation region for electronically simulated translinear loop. The converter features very low supply voltage (1.2 V), two-quadrant input current, immunity from body effect, low circuit complexity, and wide input dynamic range. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique.     

Very Low Power, Low Voltage, High Accuracy, and High Performance Current Mirror

A novel low power and low voltage current mirror with a very low current copy error is presented and the principle of its operation is discussed.In this circuit,the gain boosting regulated cascode scheme is used to improve the output resistance,while using inverter as an amplifier.The simulation results with HSPICE in TSMC 0.18 μm CMOS technology are given,which verify the high performance of the proposed structure.Simulation results show an input resistance of 0.014 Ω and an output resistance of 3 GΩ.The current copy error is favorable as low as 0.002％ together with an input (the minimum input voltage of vin,min～ 0.24 V) and an output (the minimum output voltage of vout,min～ 0.16 V) compliances while working with the 1 V power supply and the 50 μA input current.The current copy error is near zero at the input current of 27 μA.It consumes only 76 μW and introduces a very low output offset current of 50 pA.     

Current mode single-input multi-output MOSFET-only filter

In this paper, a very simple topology of a current mode MOSFET-only filter with single-input and multi-output is proposed. It is very important to emphasize that it is possible to obtain five of the filter functions, namely low-pass (LP), band-pass (BP), high-pass (HP), band-stop (BS) and all-pass (AP) using the proposed topology without using external passive elements. The core circuit of the proposed filter employs only four MOS transistors; therefore, it occupies very small chip area. It is also possible to adjust the filter gain with the biasing voltage. In addition, the circuit exhibits a very low input impedance and also high output impedances which make it possible for cascading. The MOSFET capacitances which determine the transfer functions are all grounded, so physical capacitances can be used instead of MOSFET parasitic capacitances to operate the filter at very low frequencies. Moreover, proposed filter structure has low supply voltage as 1 V in order to be applicable to low voltage operations. Detailed simulation results, including noise and Monte Carlo analysis, are provided using 0.18 µm TSMC technology parameters to verify the feasibility of the filter circuit.     

一种集成低压低功耗电流复制电路设计

本文提出了一种集成低压低功耗电流复制电路。利用单级放大器和电压跟随器构成的负反馈回路实现对输入电压跟的跟随,利用等比例电阻实现电流的等比例复制,电路结构简单,仅由5个MOS管和2个等比例电阻构成。基于TSMC 0.18μm工艺完成电路设计,使Spectre完成电路仿真。结果表明,电路电源电压为1V时,电路静态功耗仅为1μW。在输入电流范围为0-50μA时,输出电流线性跟随输入电流,当输入电流大于3μA时,电流复制精度大于99%,电路带宽为31MHz。     

A low-powerlow-voltage slew-rate enhancement circuit for two-stage operational amplifiers

正A novel circuit is presented in order to enhance the slew rate of two-stage operational amplifiers.The enhancer utilizes the class-AB input stage to improve current efficiency,while it works on an open loop with regard to the enhanced amplifier so that it has no effect on the stability of the amplifier.During the slewing period,the enhancer detects input differential voltage of the amplifier,and produces external enhancement currents for the amplifier,driving load capacitors to charge/discharge faster.Simulation results show that,fora large input step,the enhancerreduces settling time by nearly 50%.When the circuit is employed in a sample-and-hold circuit,it greatly improves the spur-free dynamic range by 44.6 dB and the total harmonic distortion by 43.9 dB.The proposed circuit is very suitable to operate under a low voltage(1.2 V or below) with a standby current of 200μA.     

一种低失调高压大电流集成运算放大器

基于结型场效应晶体管(JFET)和双极型晶体管(BJT)兼容工艺,设计了一种低失调高压大电流集成运算放大器。电路输入级采用p沟道JFET (p-JFET)差分对共源共栅结构;中间级以BJT作为放大管,采用复合有源负载结构;输出级采用复合npn达林顿管阵列,与常规推挽输出结构相比,在输出相同电流的情况下,节省了大量芯片面积。基于Cadence Spectre软件对该运算放大器电路进行了仿真分析和优化设计,在±35 V电源供电下,最小负载电阻为6Ω时的电压增益为95 dB,输入失调电压为0.224 5 mV,输入偏置电流为31.34 pA,输入失调电流为3.3 pA,单位增益带宽为9.6 MHz,具有输出9 A峰值大电流能力。     

A very high performance compact CMOS current mirror

This paper proposes a very high performance current mirror (CM), where output current accurately copies the input current without carrying any offset component. Compact implementation of Garimella et al. CM structure has been combined with super cascode configuration to achieve the proposed very high performance CM. The proposed CM offers extremely high output resistance, very low input resistance and high degree of copying accuracy over a wide operating current range. Small signal analysis is carried out to validate the performance characteristics of the circuit. The proposed CM is simulated by Mentor Graphics Eldospice in TSMC 0.18 µm CMOS, BSIM3 and Level 53 technology, using a single supply voltage of 1.5 V. The circuit is shown to have high current copying accuracy for a range of (0–500 µA) with an error less than 0.0016 % and has no offset current at the output side. The robustness of the proposed CM against the variations in device parameters and temperature changes has been reflected in simulations by carrying Monte Carlo and temperature analysis. The simulation results show that the proposed circuit provides very high output resistance of 55.76 GΩ and a very low input resistance of 0.07 Ω.     

单片降压型DC-DC转换器的控制电路设计

基于峰值电流检测脉宽调制技术原理,设计了一种新颖的应用于单片降压型DC-DC转换器的控制电路。针对峰值电流采样和PWM比较器电路技术,提出了一种新颖的电路结构。其中,PWM比较器和逻辑及驱动电路由升压电路驱动,节省了一个电平转换电路,降低了电路功耗;PWM比较器直接对功率管和镜像管电流采样,无需使用运算放大器,简化了电路结构。采用华虹宏力BCD350GE工艺进行设计,流片测试表明,电路可实现3V到36 V宽幅输入,500 mA满载输出。在输入24 V电压,输出3.3 V电压时,纹波为2.3 mV。     

一种低压CMOS LDO稳压电源电路

提出了一种低压CMOS LDO稳压电源电路。与常规CMOS LDO稳压电源电路相比,该电路有两个主要特点:引入了低压带隙基准电路;将带隙基准电路置于串联稳压管后端。通过上述设计,提出的稳压电源电路能在输出电压较低的情况下提供较稳定的输出,同时也能提供稳定的偏置电压及具有较高PSRR的基准输出。对电路进行了仿真,并给出了仿真结果。     

一款高精度低电流的两级高电压电源调整电路

提出了一种改进的高输入电压调整电路结构,该电路结构在TSMC 0.25 μm BCD工艺平台进行验证.电路包括两个参考电压模块、两级调整电路和一个关断信号产生模块.介绍了初级电压调整和精确电压调整电路,可以产生稳定精确的输出电压,同时也提高了低输入电源电压时的输出电流能力.通过两级电源调整电路可以实现软启动功能,减小启动浪涌电压,提高启动性能.此外,关断模块产生可以可靠关闭高压模块和低压模块的两种控制信号,使得在待机模式下高压直流转换系统仅消耗极低的待机电流.该电路结构的输入电压可以在2.5～45 V宽幅范围内变化.在待机模式下,高压直流转换系统的待机电流最低仅300 nA,电源调整电路可以输出最高60 mA的负载电流.