Parylene-based implantable Pt-black coated flexible 3-D hemispherical microelectrode arrays for improved neural interfaces

In implantable medical systems, low-impedance electrode-tissue interface is important for maintaining signal quality for recording and effective charge transfer for stimulation. In this paper, we propose a novel hemispherical biocompatible and flexible microelectrode arrays (MEAs) which were fabricated by the process of micro electrical mechanical system (MEMS). Compared with conventional planar microelectrodes, the interface impedance of hemispherical microelectrodes decreased due to their increased surface area. Parylene C thin film with good biocompatibility and flexibility was chemical vapor deposited as packaging material for decreasing nerve tissue damage. Pt-black coatings were electroplated by applying current pulses in H₂PtCl₆ solution on electrode sites for the further decrease of interface impedance. Moreover, the geometrical and electrical properties of these MEAs were demonstrated by using a scanning electron microscope (SEM) and an electrochemical workstation. Experimental results showed that the interface impedance decreased by about 34% compared with conventional planar microelectrodes, and significantly decreased by 84% with Pt-black coatings on electrode sites compared with those uncoated microelectrodes.     

面向化学气相沉积生长单晶金刚石的高导热嵌入型 基片托盘设计及其高质量生长工艺研究

针对高功率密度微波等离子体化学气相沉积法生长单晶金刚石过程中,金刚石籽晶表面温度容易发生漂移的问题,提出了一种新的基片托盘结构设计方法.基片托盘中间采用通孔结构,以避免籽晶底部与钼托盘的直接接触,在基片托盘与水冷台之间、籽晶和水冷台之间添加高导热材料氮化铝片,以保证外延沉积金刚石所需的均匀温度场环境.实验结果显示,利用新型基片托盘可以连续工作48 h,并获得生长厚度达1.66 mm的单晶金刚石,经过多次反复生长可实现厚度3 mm的高质量单晶金刚石制备.新型基片托盘能有效地抑制生长过程中石墨等大颗粒煤烟沉积引起的温度漂移现象,满足不同条件下金刚石单晶的同质外延生长,抑制籽晶边沿处多晶金刚石的生成,从而保证金刚石单晶在高功率密度下长时间稳定生长,获得高质量、大尺寸的化学气相沉积单晶金刚石.     

Effects of microstructure of films on CVD diamond X-ray detectors

Although the unique properties of chemical vapor deposition (CVD) diamond films have made it a candidate material for radiation detectors, the polycrystalline nature of the films has severely limited the development of CVD diamond detectors. In this work, three CVD diamond films with different microstructure were grown by using a hot-filament chemical vapor deposition (HFCVD) technique and were fabricated as CVD diamond detectors. The electric contact is good ohmic for bias voltage up to 150 V. 5.9 keV ⁵⁵Fe X-ray was used to measure the photocurrent and the pulse height distribution (PHD). For the detector based on the best quality film, the dark-current of 16.0 nA and the net photocurrent of 15.9 nA are obtained at an electric field of 50 kV cm⁻¹. The PHD peak is well separated from the noise pedestal, indicating a high counting efficiency and a low detection limit.     

Fabrication of buried microfluidic channels with observation windows using femtosecond laser photoablation and parylene-C coating

We developed an advanced method for fabricating microfluidic structures comprising channels and inputs/outputs buried within a silicon wafer based on single level lithography. We etched trenches into a silicon substrate, covered these trenches with parylene-C, and selectively opened their bottoms using femtosecond laser photoablation, forming channels and inputs/outputs by isotropic etching of silicon by xenon difluoride vapors. We subsequently sealed the channels with a second parylene-C layer. Unlike in previously published works, this entire process is conducted at ambient temperature to allow for integration with complementary metal oxide semiconductor devices for smart readout electronics. We also demonstrated a method of chip cryo-cleaving with parylene presence that allows for monitoring of the process development. We also created an observation window for in situ visualization inside the opaque silicon substrate by forming a hole in the parylene layer at the silicon backside and with local silicon removal by xenon difluoride vapor etching. We verified the microfluidic chip performance by forming a segmented flow of a fluorescein solution in an oil stream. This proposed technique provides opportunities for forming simple microfluidic systems with buried channels at ambient temperature.     

Optimization of coating variables for hardness of industrial tools by using artificial neural networks

Thin-film coating plays a prominent role on the manufacture of many industrial devices. Coating can increase material performance due to the deposition process. This paper proposes the estimation of hardness of titanium thin-film layers as protective industrial tools by using multi layer perceptron (MLP) neural network. Based on the experimental data obtained during the process of chemical vapor deposition (CVD) and physical vapor deposition (PVD), the optimization of the coating variables for achieving the maximum hardness of titanium thin-film layers, is performed. Then, the obtained results are experimentally verified. During titanium coating, improvements of up to 16.75% of the layers hardness are accessible.     

The Nearest Uniformity Producing Profile (NUPP) optimization criterion for thin-film processing applications

A criterion for spatial uniformity control in thin-film deposition processes (e.g., chemical vapor deposition for semiconductor manufacturing) is presented, applicable to any measurable film quality (thickness, composition, microstructure, and electrical properties, among others) for all deposition systems where the substrate is rotated to improve uniformity. The approach is based on identifying the subspace of all deposition profiles on the stationary substrate that produce uniform films under rotation and then projecting a deposition profile to be controlled onto a sequence of uniformity producing basis functions spanning that subspace to determine the “Nearest Uniformity Producing Profile” (NUPP). This criterion depends only on the geometrical characteristics of the deposition system, and control and optimization methods can be developed to reduce the deviation from the NUPP giving a widely applicable film control methodology.An important contribution of the NUPP concept and underlying theory is that the latter reveals new structure in the uniformity and nonuniformity producing subspaces, providing insight into thin-film process design and control principles and an opportunity to unify these principles across a range of reactor designs. The implementation of this uniformity criterion is demonstrated using a numerical toolbox developed using the object-oriented features of MATLAB.     

Characterization of Aligned Wafer-Level Transfer of Thin and Flexible Parylene Membranes

This paper reports a wafer-level transfer technique for forming thin, flexible, and freestanding parylene membranes. Parylene thin films (~1.3 mum) have been successfully transferred from one wafer to another to form a freestanding membrane encapsulating over wide and shallow cavities (< 5 mum deep and 2000 times 2000 mum² square) with fine alignment (< 3.0 mum) and 87% yield. Transferred membranes may be a composite of parylene/metal/parylene, contain through-hole patterns of diverse size (5 times 5 ~ 2000 times 2000 mum²), have mild tension (1.14 MPa), and remain freestanding and flat through various standard post-transfer microfabrication processes such as photolithography, evaporation, and wet etching. They also provide excellent sealing against pressure of up to 20 kPa and long-term stability over repeated deflection. This paper focuses on two areas: (1) the study of issues involving optimum transfer conditions, minimum achievable gap between transferred membranes and device wafers, patterned-film and composite-layer transfer, and aligned transfer; and (2) the characterization of the post-transfer membrane properties, including stress/tension, sealing capability, effects of post-transfer processing, and long-term stability after a repeated deflection.     

衬底温度对单晶金刚石同质外延生长的 影响规律研究

文章采用微波等离子体化学气相沉积法,以单晶金刚石籽晶为衬底进行金刚石外延生长,通过拉曼光谱、扫描电子显微镜及光学显微镜等多种表征测试手段,系统地研究了衬底温度对单晶金刚石同质外延生长的影响机理.研究结果表明,衬底温度是影响同质外延单晶金刚石生长速率、生长模式和生长缺陷的重要因素:在一定温度范围内,单晶金刚石的生长速率随衬底温度的升高而增加,与此同时,金刚石的生长模式也由丘状生长转变为台阶生长.当单晶金刚石的生长厚度超过1 mm时,较高的衬底温度容易导致沉积层边缘部分产生孪晶等缺陷.拉曼光谱表征结果显示,微波等离子体化学气相法沉积的单晶金刚石质量优于传统的高温高压法.     

Si基多层Ge量子点近红外光电探测器研制

采用超高真空化学气相沉积( UHV/CVD)技术在Si衬底上外延生长了PIN结构多层Ge量子点探测器材料。 PIN探测器结构由N型Si衬底,多层Ge量子点吸收区,和原位掺杂P型Si盖层构成,电极分别制作于N-Si和P-Si上,以获得好的欧姆接触。制备的Si基Ge量子点光电探测器具有较低的暗电流密度(-1 V偏压下为7.35×10-6 A/cm2),与Si相比,探测波长延伸到1.31μm波段。     

A new technique for producing large-area as-deposited zero-stressLPCVD polysilicon films: the MultiPoly process

Polysilicon films deposited by low-pressure chemical vapor deposition (LPCVD) exhibit tensile or compressive residual stresses, depending on the deposition temperature. Polysilicon films composed of alternating tensile and compressive layers can display any overall stress value between those of the individual layers, including a state of zero overall residual stress, depending on the relative thickness of each layer. The residual stress gradient can be similarly controlled by the layer thicknesses and distribution. This has been demonstrated with a ten-layer near-zero stress (<10 MPa), near-zero stress gradient (⩽0.2 MPa/μm) polysilicon film, containing flat cantilever beams whose length-thickness ratios exceed 150. Using multilayer deposition to control the stresses and stress gradients of polysilicon films is termed the MultiPoly process     

镜面杂质与水汽吸放对露点仪影响的实验研究

显微成像露点仪在研制和测试过程中发现镜面杂质和内腔材质吸放水汽等影响测量精度的问题。针对镜面杂质对显微成像露点仪测量的影响开展了镜面图像特征的实验研究，结果表明：镜面杂质点处露珠凝结具有优先性，且反复凝结消散后镜面出现杂质沉降现象。针对水汽吸放对显微成像露点仪的影响开展了水汽释放与吸附效应的实验研究，结果表明：当温度发生变化时，显微成像露点仪感应舱内壁氧化铝材质存在释放（或吸附）水汽现象，使得显微成像露点仪测量值偏大（或偏小）。研究结果为露点仪在功能设置及镜面与腔体材料选择方面提供了参考。     

Fabrication of microfluidic networks with integrated electrodes

In this paper a method is presented for the fabrication of micro-channel networks in glass with integrated and insulated gate electrodes to control the zeta-potential at the insulator surface and therewith the electro-osmotic flow (EOF). The fabrication of the electrodes is a sequence of photolithography, etching and thin film deposition steps on a glass substrate, followed by chemical mechanical polishing (CMP) and subsequently direct thermal bonding to a second glass plate to form closed micro-channels. Plasma enhanced chemical vapor deposition (PECVD) SiO₂-layers as insulating material between the electrodes and micro-channels and different electrode materials are examined with respect to a high bonding temperature to obtain an optimal insulating result. A CMP process for the reduction of the SiO₂ topography and roughness is studied and optimized in order to obtain a surface that is smooth enough to be directly bondable to a second glass plate.     

Impact of thickness of GaN buffer layer on properties of AlN/GaN distributed Bragg reflectors grown by metalorganic chemical vapor deposition

We studied the impact of the thickness of GaN buffer layer on the properties of distributed Bragg reflector (DBR) grown by metalorganic chemical vapor deposition (MOCVD). The samples were characterized by using metallographic microscope, transmission electron microscope (TEM), atomic force microscopy (AFM), X-ray diffractometer (XRD) and spectrophotometer. The results show that the thickness of the GaN buffer layer can significantly affect the properties of the DBR structure and there is an optimal thicknes...     

PECVD-SiOxNy films for large area self-sustained grids applications

In this work we study the structural properties and mechanical stress of silicon oxynitride (SiO_xN_y) films obtained by plasma enhanced chemical vapor deposition (PECVD) technique at low temperatures (320 °C) and report the feasibility of using this material for the fabrication of large area self-sustained grids. The films were obtained at different deposition conditions, varying the gas flow ratio between the precursor gases (N₂O and SiH₄) and maintaining all the other deposition parameters constant. The films were characterized by ellipsometry, by Fourier transform infrared (FT-IR) spectroscopy and by optically levered laser technique to measure the total mechanical stress. The results demonstrate that for appropriated deposition conditions, it is possible to obtain SiO_xN_y with very low mechanical stress, a necessary condition for the fabrication of mechanically stable thick films (up to 10 μm). Since this material (SiO_xN_y) is very resistant to KOH wet chemical etching it can be utilized to fabricate, by silicon substrate bulk micromachining, very large self-sustained grids and membranes, with areas up to 1 cm² and with thickness in the 2–6 μm range. These results allied with the compatibility of the PECVD SiO_xN_y films deposition with the standard silicon based microelectronic processing technology makes this material promising for micro electro mechanical system (MEMS) fabrication.     

覆盖Si3N4层和栅氧化物氮化对晶体管的影响

研究了在各种各样的晶体管中高于最低限度的坡面外层上覆盖硅氮化物和栅氧化物被氮化的影响,同时制作出具有高、低压晶体管的硅晶片.当干燥氧化物和降低化学蒸汽的压力使之凝固的2个步骤( LPCVD )被用于厚栅氧化物时,薄栅氧化物被氮氧化改善.薄栅氧化物的厚度是4.5nm,厚栅氧化物的厚度为29nm.低压nMOS和pMOS不显示出任何驼峰,高压pMOS也一样.高压nMOS高于最低限度的驼峰取决于工艺条件.它表明没有覆盖硅氮化层的严重驼峰取决于经过LPCVD的内部涂层氧化沉淀后化学处理期间的湿度扩散.这说明,采用氮氧化物阻止水汽扩散防止驼峰的方法是有效的.     

A lateral RF MEMS capacitive switch utilizing parylene as dielectric

A novel lateral RF MEMS capacitive switch was reported in this paper. This switch employed parylene as the dielectric material, taking advantages of its low temperature deposition and conformal coating. The low resistivity single crystalline silicon served as the material of the mechanical structures. The switch was fabricated by bulk micromachining processes with only two lithographic masks and a shadow mask. The dynamical response, parylene insulation performance, and RF performances of the fabricated switch were characterized, respectively. The switching time from the open state to the close state was 105 μs at a loaded voltage of 78 V, while 15.6 μs from the close state to the open state. The isolation was better than 15 dB from 20 to 40 GHz, and the maximal isolation was 23.5 dB at 25 GHz; while the insertion loss was below 1.4 dB at 25 GHz, when bonding wires connected the ground lines. These results verify that the parylene is a good candidate material to act as sidewall dielectric to realize the lateral capacitive switch.     

Applications of OLEDs that use VUV‐CVD films

Abstract— In photo‐CVD (chemical vapor deposition) in which vacuum‐ultraviolet (VUV) excimer lamps (VUV‐CVD) are used, thin films were deposited at room temperature because VUV photons have the energy to decompose material gases. For the use of OMCTS (octamethylcyclotetrasiloxane), an organic siloxane, we can deposit a self‐flatness film for high‐pressure conditions. The reactants generated by VUV photons have excellent migration characteristics for this condition. Also, the VUV‐CVD film demonstrates low stress, comparatively hard hardness, good electrical properties, and good thermal resistance. The VUV‐CVD film is optimum for planarizing film in the over‐coating deposition step in the production of OLEDs, which requires a low‐temperature process.     

Fabrication of Flexible Neural Probes With Built-In Microfluidic Channels by Thermal Bonding of Parylene

This paper describes the fabrication technology and characterization of Parylene neural probes containing fluidic channels for delivery of small amounts of drugs into biological tissue as well as neural recording. We present a first attempt to realize such neural probes by micromolding and thermal bonding of Parylene. Compared to the common fabrication method, where a sacrificial photoresist layer is sandwiched between two Parylene layers, the major advantages of this process are, that the time consuming photoresist dissolution is omitted, and that the adhesion between the Parylene layers could be improved. The electrodes were characterized by impedance measurements, in which an impedance sufficiently low for neural recording was observed. Fluidic injection experiments with the microchannel have shown that nanoliter volumes can be injected     

基于分解协调的空间分布系统的模糊控制

为解决多控制源空间分布系统的控制问题,在以往文献提出的空间模糊控制器的基础上,提出一种基于空间分解、局部协调的空间模糊控制策略,针对多控制源设计了具有协调功能的空间模糊控制器.以三区快速加热化学气相沉积反应器系统为例,对所提出的控制方法进行了仿真验证.仿真结果表明,该方法能取得更好的空间均匀性.     

Study on TSV isolation liners for a Via Last approach with the use in 3D-WLP for MEMS

This paper discusses approaches for the isolation of deep high aspect ratio through silicon vias (TSV) with respect to a Via Last approach for micro-electro-mechanical systems (MEMS). Selected TSV samples have depths in the range of 170…270 µm and a diameter of 50 µm. The investigations comprise the deposition of different layer stacks by means of subatmospheric and plasma enhanced chemical vapour deposition (PECVD) of tetraethyl orthosilicate; Si(OC₂H₅)₄ (TEOS). Moreover, an etch-back approach and the selective deposition on SiN were also included in the investigations. With respect to the Via Last approach, the contact opening at the TSV bottom by means of a specific spacer-etching method have been addressed within this paper. Step coverage values of up to 74 % were achieved for the best of those approaches. As an alternative to the SiO₂-isolation liners a polymer coating based on the CVD of Parylene F was investigated, which yields even higher step coverage in the range of 80 % at the lower TSV sidewall for a surface film thickness of about 1000 nm. Leakage current measurements were performed and values below 0.1 nA/cm² at 10 kV/cm were determined for the Parylene F films which represents a promising result for the aspired application to Via Last MEMS-TSV.