接收机

Y2000-62329-239 0016561多径信道中异步 CDMA 系统用的多址联接干扰消除器增强 Rake 接收机=Multiple access interference(MAI)canceller enhanced Rake receiver for asyn-chronous CDMA system in multipath channels[会,英]/Chitamu,P.J.//1999 Africon,Vol.1.—239～244(PC)Y2000-62335-583 0016562采用自适应天线阵的上行链路 CDMA QPSK 接收机用的时空抵消检测器=Space—time cancellation detec-tor for up-link CDMA QPSK receivers with adaptiveantenna arrays[会,英]/Morosi,S.& Re,E.D.//     

CDMA2000 1X EV-DO迎接3G时代

作为3G技术的一种,CDMA2000 1X EV-DO是CDMA20001X技术的升级.EV-DO是英文Evolution-Data Optimized的简写.EV-DO网络可以实现高达2.4Mb/s的数据传输速率.CDMA2000 1X EV-DO技术已经在国外有了很成熟的应用.在韩国,SKT于2000年10月开始提供CDMA2000 1X业务,2002年2月提供CDMA2000 1X EV-DO业务.截至2003年底,其CDMA2000 1X的用户达到1442万,CDMA2000 1X EV-DO用户为356万.     

EV-DO十年演进线图出炉构建移动全IP网络近在咫尺

CDMA 2000 1x演进路线图 事实上,早在2000年,高通就已经简单地公布了CDMA 2000系列的演进路线,即CDMA 2000 1x、CDMA2000 1x EV-DO(0、A、B、C、D)版本以及CDMA 2000 1x EV-DV.     

TiSi2在微波低噪声SiGe HBT中的应用

通过在SiGe HBT外基区和多晶发射极上制作TiSi2,从而使器件的高频噪声系数得到进一步降低.以PD=200mW的SiGe HBT为例,采用TiSi2工艺的噪声系数典型值为F=1.6dB@1.1GHz,明显低于无TiSi2工艺SiGe HBT的2.0dB@1.1GHz,且频率越高,二者差别越大.     

多址通信

0328265CDMA:国内网络设备商的新机遇[刊,中]/武方圆//移动通信.—2003,27(7).—27-29(C)0328266CDMA2000—1X系统及网络结构变化[刊,中]/孙//移动通信.—2003,27(7).—36-37(C)本文分析了CDMA2000-1X系统由IS-95方式平滑升级的过程。以朗讯设备为例通过与IS-95相比较,阐述了网络结构的变化。     

天线与天线阵

Y2000-62073-23 0005989CDMA 多天线系统中相关干扰分析=Correlated inter-ference analysis in CDMA mult-antenna systems[会,英]/Yanikomeroglu,H.& Sousa,E.S.//1999 IEEEInternational Conference on Communications.Vol.1 of3.—23～28(HC)     

华为cdmalx网络解决方案

从1995年开始,华为公司就致力于CDMA相关技术的研究积累,1996-1998年承接了国家863项目CDMA WLL系统的开发,成功开发出CDMA原型机,掌握了CDMA的关键技术.2000年成功推出了cdma 1x移动交换系统,2001年又成功推出了基于先进的宽带分组平台的cdma lx基站.     

微波集成电路、毫米波集成电路

Y2000-62086-485 0005754CDMA 无线通信系统用硅 UTSi~R CMOS 射频集成电路=Silicon UTSi~R COMS RFIC for CDMA wirelesscommunications systems[会,英]/Rodgers,P.& Mega-hed,M.//1999 IEEE MTT-S International MicrowaveSvmposium.Vol.2.—485～488(UC)     

CDMA2000:展现新产品着眼技术演进

关于CDMA2000在中国的商用前景,记者了解到,目前中国联通在天津的CDMA2000 1x EV-DO网络已经进入试商用阶段,北京的CDMA2000 1x网络向CDMA2000 1x EV-DO升级也基本结束,但是,国家何时颁发CDMA2000牌照以及中国联通是否最终会选择EV-DO作为3G网络技术,目前还很难确定.     

Discussion on Construction of CDMA2000 1xEV-D0 Network

The research advances on 3G CDMA standards are outlined andthe network architecture and networking characteristics of CD-MA2000 1x EV-DO and CDMA2000 1x EV-DV are described.Em-phasis is put on the key technical issues that may occur when ChinaUnicom upgrades CDMA2000 1x to CDMA2000 1x EV-DO.     

A low power tunable Gm–C filter based on double CMOS inverters in 0.35?μm

In this article, an inverter based transconductor using double CMOS pair is proposed for implementation of a second order lowpass G_m?CC Filter. The proposed operational transconductance amplifier (OTA) and biquad filter are designed using standard 0.35???m CMOS technology. Simulation results demonstrate the central frequency tunability from 10?kHz to 2.8?MHz which is suitable for the wireless specifications of Bluetooth (650?kHz), CDMA 2000 (700?kHz) and Wideband CDMA (2.2?MHz) applications. The power consumption of the filter is 445?nW and 178???W at 10?kHz and 2.8?MHz from 3.3?V supply voltage, respectively. The active area occupied by the designed filter on the silicon is 215?×?720???m². The proposed approach guarantees the upper bound on THD to be ?40?dB for 300?mVpp signal swing. Employing the double CMOS pair in the inverters causes PSRR to reach 68.6?dB which is higher than similar works.     

数字可编程微波／射频集成锁相源的研制与应用

本文介绍一种数字可编程射频锁相源的设计,及其在ＩＳ－９５标准的码分多址（ＣＤＭＡ）移动通信系统中的应用,它由电荷泵型的数字频率合成器,无源三阶环路滤波器,以及压控振荡器构成。作为ＣＤＭＡ移动通信系统本振源,为其提供射频上／下变频器和中频调制／解调器的本振信号、以及基带部分的参考基准信号,具有低相噪、低工作电压、低功耗的特点。文中还给出了使用ＬＭＸ２３３２Ａ／ＬＭ２３３７双环数字频率合成器研制的锁相振荡源的实例及其测试结果,其相位噪声在偏离载频１０ｋＨｚ处,均优于－９２ｄＢｃ。     

A single-chip 900-MHz spread-spectrum wireless transceiver in1-μm CMOS. I. Architecture and transmitter design

A single-chip transceiver for frequency-hopped code division multiple access (CDMA) in the 900 MHz industrial, scientific and medical (ISM) band is implemented in 1-μm CMOS. It combines a digital frequency synthesizer, a double quadrature upconverter, an integrated oscillator, and a power amplifier with variable output. Data modulates a carrier hopping at 20 kHz with quaternary frequency-shift keying (4-FSK). At an output power level of +3 dBm, the harmonics and spurious tones lie at -52 dBc or below. When active, the transmitter drains 100 mA from 3 V     

Dual-band transmitters using digitally predistorted frequency multipliers for reconfigurable radios

Two methods for reconfigurable transmitters using frequency multipliers in conjunction with digital predistortion linearizers are developed. One method utilizes a circuit topology that can be switched between a fundamental-mode in-phase combined amplifier, and a push-push frequency doubler using input phasing. Investigation to maximize output harmonics out of regular power amplifiers (PAs) was performed, and the implementation of the device was successful for the amplifier- and doubler-mode operation. To satisfy optimal load-line conditions for the operation in both modes, a bi-tuned output-combining technique is introduced as well. Measurement results indicate that the circuit is able to transmit 28 dBm of output power at 900 MHz in the amplifier mode, and 22 dBm at 1800 MHz in the doubler mode. In combination with predistortion linearization, the reconfigurable transmitter was shown to be capable of amplifying IS-95B code-division multiple-access (CDMA) signals with an adjacent-channel power ratio (ACPR) up to -58dBc/30kHz. The second suggested method utilizes a fundamental-frequency PA followed by a varactor multiplier that can be bypassed with an RF switch. A varactor-diode doubler with a saturated conversion loss of 1.3 dB was built and tested. Using predistortion linearization techniques on both the PA and doubler, an ACPR of -53dBc/30kHz at 885-kHz offset was achieved for a CDMA signal transmitted at 1850 MHz.     

A triple-mode continuous-time /spl Sigma//spl Delta/ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS receiver

Time jitter in continuous-time /spl Sigma//spl Delta/ modulators is a known limitation on the maximum achievable signal-to-noise-ratio (SNR). Analysis of time jitter in this type of converter shows that a switched-capacitor (SC) feedback digital-to-analog converter (DAC) reduces the sensitivity to time jitter significantly. In this paper, an I and Q continuous-time fifth-order /spl Sigma//spl Delta/ modulator with 1-bit quantizer and SC feedback DAC is presented, which demonstrates the improvement in maximum achievable SNR when using an SC instead of a switched-current (SI) feedback circuit. The modulator is designed for a GSM/CDMA2000/UMTS receiver and achieves a dynamic range of 92/83/72 dB in 200/1228/3840 kHz, respectively. The intermodulation distance IM2, 3 is better than 87 dB in all modes. Both the I and Q modulator consumes a power of 3.8/4.1/4.5 mW at 1.8 V. Processed in 0.18-/spl mu/m CMOS, the 0.55-mm/sup 2/ integrated circuit includes a phase-locked loop, two oscillators, and a bandgap.     

IMT—2000CDMA宏小区蜂窝无线网络的仿真

ＩＭＴ－２０００ＣＤＭＡ宏小区蜂窝无线网络的仿真,是为评估当前在第三代移动通信系统中较具实力的Ｗ－ＣＤＭＡ和ｃｄｍａ２０００技术而开发的。仿真包括链路级和系统仿真两部分,主要分析研究、验证了评估了两种ＣＤＭＡ无线传输技术的性能以及ＣＤＭＡ无线网络的频谱效率／系统容量。     

超磁致伸缩伺服阀用伺服放大器的设计及分析

为驱动超磁致伸缩伺服阀,结合超磁致伸缩执行器驱动电源与伺服阀用伺服放大器的性能要求设计了超磁致伸缩伺服阀用伺服放大器,并建立了其电路模型,仿真分析了功率运算放大器的开环增益对其输出性能的影响.仿真结果表明,在功率运算放大器开环增益大于80 dB时,电路特性可满足设计要求.在驱动负载为额定值时,测试结果表明,样机的输出电流线性度为3％;输出电流2A时,其阶跃响应的调节时间小于0.5 ms,幅频宽可达2 kHz;在驱动频率小于1 kHz时,输出电流失真小且无相位滞后.     

Multimode $G_{m}$– $C$ Channel Selection Filter for Mobile Applications in 1-V Supply Voltage

A CMOS transconductor for multimode channel selection filter is presented. The transconductor includes a voltage-to-current converter and a current multiplier. Voltage-to-current conversion employs linear region MOS transistors, and the conversion features high linearity over a wide input swing range. The current multiplier which operates in the weak inversion region provides a wide transconductance tuning range without degrading the linearity. A third-order Butterworth low-pass filter implemented with the transconductors was designed by TSMC 0.18 mum CMOS process. The measurement results show that the filter can operate with the cutoff frequency of 135 kHz to 2.2 MHz. The tuning range and the linearity performance would be suitable for the wireless specifications of GSM, Bluetooth, cdma2000, and wide-band CDMA. In the design, the maximum power consumption at the highest cutoff frequency is 2 mW under a 1-V supply voltage.     

Potentials of smart antennas in CDMA systems and uplinkimprovements

An overview of the application of smart antennas in DS-CDMA systems, including IS-95 and IS-2000, is presented. Since CDMA systems are interference-limited, adaptive antenna arrays have great potential for improving the performance of such systems in terms of capacity, coverage, and quality of service, In this paper, we study the multiple-access interference that affects a CDMA system, and we describe how smart antennas can be implemented in an IS-2000-based mobile communications system. When smart antennas are used at the base station to transmit in narrow beams, the interference on the downlink is reduced, and C/I is improved. This, in turn, increases the system capacity on the downlink or, alternatively, the quality of service is improved. Such gains will prove very beneficial for asymmetric high-speed data applications, requiring much higher bit rates on the downlink than on the uplink. By reducing the base-station receiver's sensitivity, smart antennas can boost the capacity of the reverse link. Results are presented that outline how this reduction can be employed by the system designer on the uplink to increase capacity, reduce the mobile transmit power, or effect a tradeoff between capacity improvement and coverage or range extension under different system-loading scenarios