Soft X-ray Absorption and Photoemission Spectroscopy Study of Cobalt-Based Thermoelectric Oxides: \hbox{Ca}_3\hbox{Co}_4\hbox{O}_9, \hbox{Ca}_3\hbox{Co}_2\hbox{O}_6, and \hbox{Bi}_{2}\hbox{Sr}_{2}\hbox{Co}_2\hbox{O}_{y}

The electronic structures of Co-based potential thermoelectric (TE) oxides, including $\hbox{Ca}_3\hbox{Co}_4\hbox{O}_9$ and $\hbox{Bi}_{2}\hbox{Sr}_{2}\hbox{Co}_2\hbox{O}_{y}$ (y = 8 + δ) single crystals and polycrystalline $\hbox{Ca}_3\hbox{Co}_2\hbox{O}_6$ , have been investigated by employing soft x-ray absorption spectroscopy (XAS) and photoemission spectroscopy (PES). Co 2p XAS measurements show that Co ions are nearly trivalent ( $\hbox{Co}^{3+}$ ) in all of these Co-based TE oxides with a small mixture of $\hbox{Co}^{4+}$ ions in $\hbox{Bi}_{2}\hbox{Sr}_{2}\hbox{Co}_2\hbox{O}_{y}$ . Valence-band PES and O 1s XAS measurements show that the occupied Co 3d states are located at the top of the valence bands and that the lowest unoccupied states have the primarily Co 3d character, respectively. These findings suggest the importance of the Co 3d electronic structures in determining TE properties of these Co-based oxides.     

Electronic Structure and Thermoelectric Properties of Pseudoquaternary \hbox{Mg}_{2}\hbox{Si}_{1-x-y}\hbox{Sn}_{x}\hbox{Ge}_{y}-Based Materials

A theoretical study is presented on complex pseudoternary Bi-doped \(\hbox{Mg}_{2}\hbox{Si}_{1-x-y}\hbox{Sn}_{x}\hbox{Ge}_{y}\) materials, which have recently been revealed to reach high thermoelectric figures of merit (ZT) of ～1.4. Morphological characterization by scanning electron microscopy and energy-dispersive x-ray spectroscopy indicated that the investigated samples were multiphase and that the alloy with nominal composition \(\hbox{Mg}_{2}\hbox{Si}_{0.55}\hbox{Sn}_{0.4}\hbox{Ge}_{0.05}\) contained three phases: \(\hbox{Mg}_{2}\hbox{Si}_{0.35}\hbox{Sn}_{0.6}\hbox{Ge}_{0.05}\) (Sn-rich phase), \(\hbox{Mg}_{2}\hbox{Si}_{0.65}\hbox{Sn}_{0.3}\hbox{Ge}_{0.05}\) (Si-rich phase), and \(\hbox{Mg}_{2}\hbox{Si}_{0.15}\hbox{Sn}_{0.5}\hbox{Ge}_{0.35}\) (Ge-rich phase). The electronic structure of all these phases was calculated in the framework of the fully charge self-consistent Korringa–Kohn–Rostoker method with the coherent potential approximation (KKR-CPA) to treat chemical disorder. Electron transport coefficients such as the electrical conductivity, thermopower, and the electronic part of the thermal conductivity were studied by combining the KKR-CPA technique with Boltzmann transport theory. The two-dimensional (2D) plots (as a function of electron carrier concentration and temperature), computed for the thermopower and power factor, well support the large thermoelectric efficiency detected experimentally. Finally, employing the experimental value of the lattice thermal conductivity as an adjustable parameter, it is shown that ZT ≈ 1.4 can be reached for an optimized Bi content near T ≈ 900 K in case of the nominal composition as well as the Sn-rich phase. The question of the effect of disorder on the convergence of the conduction bands and thus the electron transport properties is addressed through detailed examination of the Fermi surfaces.     

Anisotropic Thermopower of the Kondo Insulator \hbox {CeRu}_4\hbox {Sn}_6

The intermetallic compound \(\hbox {CeRu}_4\hbox {Sn}_6\) has been tentatively classified as Kondo insulator. This class of material, especially non-cubic representatives, is not yet fully understood. Here we report thermopower measurements on single-crystalline \(\hbox {CeRu}_4\hbox {Sn}_6\) between 2 K and 650 K, along the main crystallographic directions. Large positive thermopower is observed in the directions along which the hybridization is strong and a Kondo insulating gap forms. A negative contribution to the thermopower dominates for the crystallographic \(c\) axis where hybridization is weak and metallicity prevails.     

Performance Analysis of Microwave Radio Refractivity on Radio Field Strength and Radio Horizon Distance Over Akure,Nigeria

Surface radio refractivity studies are being carried out in Akure, \((7.15^{\circ }\hbox {N}, 5.12^{\circ }\hbox {E})\) South-Western Nigeria, by in-situ measurement of atmospheric pressure, temperature, and relative humidity using Wireless Weather Station (Integrated Sensor Suit, ISS). Five years of measurement (January, 2007–December, 2011) were used to compute the surface radio refractivity and its diurnal, daily, seasonal and yearly variations are analyzed. The results were then used to compute radio horizon distance \((\hbox {R}_\mathrm{DH})\) and examine the field strength (FSV) variability. Results obtained show that the surface radio refractivity, \(\hbox {N}_\mathrm{s}\) , varies with the time of the day as well as the seasons of the year. High values of \(\hbox {N}_\mathrm{s}\) were recorded in the morning and evening hours while the values were minima around 1,500 h local time. An average value of surface radio refractivity of 364.74 N-units was obtained for this location. The annual maximum mean of FSV is 15.24 dB and the minimum is 2.20 dB. This implies that the output of a receiving antenna in Akure may generally be subject to variations not less than 2 dB in a year, but can be as high as 15 dB.     

Effect of the stoichiometric composition of the Si(111)\sqrt {21} × \sqrt {21} -(Au, Ag) surface phase on substrate conductivity

The conductivity of a silicon substrate with a Si(111) $\sqrt {21} $ × $\sqrt {21} $ -(Au, Ag) surface phase is studied. It is found that the surface conductivity of such a substrate varies depending on the ratio of the amounts of gold and silver in the given structure. An analysis of the behavior of the Si(111) $\sqrt {21} $ × $\sqrt {21} $ -(Au, Ag) surface conductivity during silver adsorption indicates the effect of a space-charge layer in the surface region of the substrate on the measurement results.     

A 97 dB 400 MHz rail to rail fully differential opamp based on split length FGMOS-MOS cell

Recently introduced MOS-FGMOS split length cell has been used to increase the DC gain of a fully differential op amp. Resultant proposed opamp structure exhibits gain of 97 dB and unity gain bandwidth of 400 MHz with power consumption of 1.2 mW. An opamp design has been verified with Cadence Spectre using a 130 nm technology at 1.2 V and has a slew rate of \(53\,\hbox {V}/\mu \hbox {s}\) with a phase margin of \(78^{\circ }\) .     

A Low-Voltage and Low-Power 3-GHz CMOS LC VCO for S-Band Wireless Applications

A fully integrated 0.18- \(\upmu \hbox {m}\) CMOS LC-tank voltage-controlled oscillator (VCO) suitable for low-voltage and low-power S-band wireless applications is proposed in this paper. In order to meet the requirement of low voltage applications, a differential configuration with two cross-coupled pairs by adopting admittance-transforming technique is employed. By using forward-body-biased metal oxide semiconductor field effect transistors, the proposed VCO can operate at 0.4 V supply voltage. Despite the low power supply near threshold voltage, the VCO achieves wide tuning range by using a voltage-boosting circuit and the standard mode PMOS varactors in the proposed oscillator architecture. The simulation results show that the proposed VCO achieves phase noise of \(-\) 120.1 dBc/Hz at 1 MHz offset and 39.3 % tuning range while consuming only \(594~\upmu \hbox {W}\) in 0.4 V supply. Figure-of-merit with tuning range of the proposed VCO is \(-\) 192.1 dB at 3 GHz.     

Analysis, design, and implementation of a high-efficiency full-wave rectifier in standard CMOS technology

In this paper we present analysis, design, and implementation of a high-efficiency active full-wave rectifier in standard CMOS technology. The rectifier takes advantage of the dynamic voltage control of its separated n-well regions, where the main rectifying PMOS elements have been implemented in order to eliminate latch-up and body effect. To minimize rectifier dropout and improve AC–DC power conversion efficiency (PCE), all the MOSFET switching elements have been pushed into deep triode region to minimize their resistance along the main current path during conduction. A prototype rectifier was implemented in the AMI 0.5-μm 3M/2P n-well CMOS process. An input sinusoid of 5 V peak at 0.5 MHz produced 4.36 V DC output across a $1\,\hbox{k}\Upomega\Vert 1\,\mu\hbox{F}$ load, resulting in a measured PCE of 84.8%.     

Thermoelectric Properties of Tetrathiotetracene Iodide Crystals: Modeling and Experiment

A more complete physical model for nanostructured crystals of tetrathiotetracene-iodide that takes into account the interaction of carriers with the neighboring one-dimensional (1D) conductive chains and also the scattering on impurities and defects is presented. For simplicity, the 2D approximation is applied. It is shown that this model describes very well the temperature dependencies of electrical conductivity in the temperature interval between 180 and 300 K, and of the Seebeck coefficient between 50 and 300 K, the highest temperature for which the measurements were reported. For lower temperatures, it is necessary to also consider the fluctuations of dielectric phase that appear before the metal–dielectric transition. It is found that the predictions made in the 1D approximation are valid only if the crystal purity is not very high, and the electrical conductivity is limited up to \({\sim }3.5\times 10^{6}\,\Omega ^{-1}\,\hbox {m}^{-1}\) and the thermoelectric figure of merit up to \(ZT\sim 4\) .     

Compact Planar Monopole Antenna with Dual Band Notched Characteristics Using T-Shaped Stub and Rectangular Mushroom Type Electromagnetic Band Gap Structure for UWB and Bluetooth Applications

In this paper, an ultra-wideband (UWB) antenna with dual band-notched characteristics is proposed. The proposed antenna also covers ISM (Industrial, Scientific, and Medical)/Bluetooth band. The antenna consists of a microstrip fed truncated U-shaped patch, T-shaped stub, rectangular mushroom type electromagnetic band gap structures (EBG), and partial ground plane. To mitigate the problem of interference due to standard narrow bands (like wireless interoperability microwave access (WiMAX) and wireless local area network (WLAN)) lie in the range of UWB, dual band notched characteristics is introduced. The WiMAX and WLAN band notched characteristics are realized by introducing a T-shaped stub and rectangular mushroom type EBG structures, respectively. The proposed antenna is printed on a 1.6 mm thick FR4 substrate with relative permittivity \((\upvarepsilon _{\mathrm{r}})\) 4.4 and the size of actual antenna is \(36 \times 40\hbox { mm}^{2}\) . The measured results shows that the proposed antenna attains a wide impedance bandwidth \((\hbox {VSWR} \le 2)\) from 2.35 to 11.6 GHz with dual band notched characteristics from 3.29 to 3.9 GHz and 5.1 to 5.85 GHz with stable radiation patterns. The time domain behaviors of the proposed antenna is also analyzed for pulse handling capability.     

Design and modeling of high-resolution multibit log-domain \Delta \Sigma modulators

Log-domain Delta-Sigma ( $\Delta \Sigma$ ) modulators are attractive for implementing analog-to-digital (A/D) converters (ADCs) targeting low-power low-voltage applications. Previously reported log-domain $\Delta \Sigma$ modulators were limited to 1-bit quantization and, hence, could not benefit from the advantages associated with multibit quantization (namely, reduced in-band quantization noise, and increased modulator stability). Unlike classical $\Delta \Sigma$ modulators, directly extending a log-domain $\Delta \Sigma$ modulator with a 1-bit quantizer to a log-domain $\Delta \Sigma$ modulator with a multibit quantizer is challenging, in terms of CMOS circuit implementation. Additionally, the realization of log-domain $\Delta \Sigma$ modulators targeting high-resolution applications necessitates minimization of distortion and noise in the log-domain loop-filter. This paper discusses the challenges of multibit quantization and digital-to-analog (D/A) conversion in the log-domain, and presents a novel multibit log-domain $\Delta \Sigma$ modulator, practical for CMOS implementation. SIMULINK models of log-domain $\Delta \Sigma$ modulator circuits are proposed, and the effects of various circuit non-idealities are investigated, including the effects of log-domain compression–expansion mismatch. Furthermore, this paper proposes novel low-distortion log-domain analog blocks suitable for high-resolution analog-to-digital (A/D) conversion applications. Circuit simulation results of a proposed third-order 3-bit class AB log-domain $\Delta \Sigma$ loop-filter demonstrate 10.4-bit signal-to-noise-and-distortion-ratio (SNDR) over a 10 kHz bandwidth with a $0.84\,V_{pp}$ differential signal input, while operating from a 0.8 V supply and consuming a total power of $35.5\,\upmu \hbox {W}.$      

A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier

We present a 2nd-order 4-bit continuous-time (CT) delta-sigma modulator (DSM) employing a 2nd-order loop filter with a single operational amplifier. This choice strongly reduces the power consumption, since operational amplifiers are the most power hungry blocks in the DSM. The DSM has been implemented in a 65 nm CMOS process, where it occupies an area of \(0.08\,\hbox {mm}^2\) . It achieves an SNDR of 64 dB over a 500 kHz signal bandwidth with an oversampling ratio of 16. The power consumption is \(76\,\upmu \hbox {W}\) from a 800 mV power supply. The DSM figure-of-merit is 59 fJ/conversion. The CT DSM is well suited for the receiver of an ultra-low-power radio.     

Ultra-Low Power Read-Decoupled SRAMs with Ultra-Low Write-Bitline Voltage Swing

We propose an ultra-low power memory design method based on the ultra-low ( \(\sim \) 0.2 V) write-bitline voltage swing to reduce the write power dissipation for read-decoupled SRAM (RD-SRAM) cells. By keeping the write bitlines at ground level (0 V) during standby and charging them to a low voltage \(V_\mathrm{L}\) ( \(\sim \) 0.2 V) during write operations, the power dissipation for the write bitlines is greatly reduced (0.2 V/ \(V_\mathrm{DD})^{ 2 }\,\times \) 100 %) due to reduced voltage swing (from \(V_\mathrm{DD }\)  = 1.2 to 0.2 V) on the write bitlines. The proposed method is applicable to both dual-voltage and single-voltage operations. We analyze the proposed ultra-low write-bitline voltage swing method and investigate its reliability based on 10K Monte-Carlo simulations. We further verify the functionality and performance of our proposed design through measurements on the fabricated prototypes based on the 65 nm CMOS process. By means of a \(256 \times 64\) bit RD-SRAM memory implementation, we show that our proposed method reduces 87 % write power dissipation when compared to a conventional design.     

A Novel 2.5–3.1 GHz Wide-Band Low-Noise Amplifier in 0.18 \upmu \hbox {m} CMOS

Aiming for the simultaneous realization of constant gain, accurate input and output impedance matching and minimum noise figure (NF) over a wide frequency range, the circuit topology and detailed design of wide broadband low noise amplifier (LNA) are presented in this paper. A novel 2.5–3.1 GHz wide-band LNA with unique characteristics has been presented. Its design and layout are done by TSMC 0.18  \(\upmu \hbox {m}\) technology. Common gate stage has been used to improve input matching. In order to enhance output matching and reduce the noise as well, a buffer stage is utilized. Mid-stages which tend to improve the gain and reverse isolation are exploited. The proposed LNA achieves a power gain of 15.9 dB, a NF of 3.5 dB with an input return loss less than \(-\) 11.6, output return loss of \(-\) 19.2 to \(-\) 19 and reverse isolation of \(-\) 38 dB. The LNA consumes 54.6 mW under a supply voltage of 2 V while having some acceptable characteristics.     

A remotely-powered, 20 Mb/s, 5.35 pJ/bit impulse-UWB WSN tag for cm-accurate-localization sensor networks

This paper presents an ultra-low-power, low-voltage sensor node for wireless sensor networks. The node scavenges RF energy out of the environment, resulting in a limited available power budget and causing an unstable supply voltage. Hence, accurate and extensive power management is needed to achieve proper functionality. The fully integrated, autonomous system is described, including the scavenging circuitry with integrated antenna, the power detection and power control circuits, the on-chip clock reference, the UWB transmitter and the digital control circuitry. The wireless sensor node is implemented in \(0.13 \,\upmu \hbox {m}\) CMOS technology. The only external components are a storage capacitor and a UWB transmit antenna. The system consumes only \(113\, \upmu \hbox {W}\) during burst mode, while only 8 nW is consumed during the scavenging operation, enabling an efficiency of 5.35 pJ/bit which is significantly better than current state-of-the-art UWB tags. Due to the use of impulse-radio UWB, also cm-accurate localization of the tag can be achieved.     

A Wide Tuning Range Voltage Controlled Oscillator with a High Tunable Active Inductor

This paper presents a wide tuning range CMOS voltage controlled oscillator (VCO) with a high-tunable active inductor circuit. In this VCO circuit, the coarse frequency is achieved by tuning the integrated active inductor circuit. The VCO circuit is designed in 0.18  \(\upmu \hbox {m}\) CMOS process and simulated with Cadence Spectra. The simulation results show the frequency tuning range from 120 MHz to 2 GHz resulting in a tuning range of 94 %. The phase noise variation is from \(-\) 80 to \(-\) 90 dBc/Hz at a 1 MHz frequency offset, and output power variation is from \(-\) 4.7 to \(+\) 11.5 dBm. The active inductor power consumption is 2.2 mW and the total power dissipation is 7 mW from a 1.8 V DC power supply. By comparing the proposed VCO circuit with the general VCO topology, the results show that this VCO architecture by using the novel, high-tunable and low power active inductor circuit, presents a better performance regarding low chip size, low power consumption, high tuning range and high output power.     

A 5 GHZ CMOS Power VCO with Novel Frequency-Modulation for RF Transmitter

A 5 GHz transformer-feedback power oscillator with novel frequency modulation (FM) up to 10 MHz is presented in this paper. The novel FM is achieved by a CMOS transistor between transformer and ground, which is designed for varying the equivalent inductance and mutual inductance of the transformer and shows no DC connection with the oscillation circuit. The major frequency tuning is realized by the variable capacitor which is controlled by a phase lock loop. The RF VCO with 210 MHz tuning range operates in class-E mode to achieve a cost-effective transmitter, which demonstrates a high DC-to-RF conversion efficiency of 39 %. A RF power of 15.1 dBm and phase noise better than \(-\) 109 dBc/Hz @ 100 kHz from the central frequency of 5.5 GHz is obtained with the biasing conditions V \(_\mathrm{ds}\) = 1.8 V and V \(_\mathrm{gs}\) = 0.65 V. The VCO also demonstrates an ultra-low voltage operation capability: with V \(_\mathrm{ds}\) = V \(_\mathrm{gs}\) = 0.6 V and DC power consumption of 9 mW, the output power is 4.5 dBm and the phase noise better than \(-\) 93 dBc/Hz @ 100 kHz. The die size of the transformer-feedback power oscillator is only \(0.4\times 0.6\) mm \(^{2}\) .     

Nanovoid Formation and Dynamics in He+-Implanted Nanocrystalline Silicon

Helium implantation in single crystal silicon is known to lead, after a proper thermal treatment, to the formation of voids with diameters ranging between 10 nm and 30 nm. Formation of voids is governed by the coalescence of vacancies created by implantation, initially trapping helium atoms. At high temperatures ( \({\ge}700^{\circ }\hbox {C}\) ), helium leaves the nanobubbles and outdiffuses, while the now empty voids grow in size and eventually change their shape to form tetrakaidecahedra (Wulff construction). In this communication, we report how He⁺ implantation in heavily boron-doped nanocrystalline silicon shows a completely different dynamics. Annealing at \(500^{\circ }\hbox {C}\) leads to the formation of large voids, located around grain boundaries, along with a large number of nanovoids with an average diameter of 2–4 nm and an estimated density of \(3\times 10^{17}\,\hbox {cm}^{-3}\) distributed throughout the grains. Annealing at higher temperature (up to \(1000^{\circ }\hbox {C}\) ) also induces a decrease of the void size with a change in their density, finally accounting to \(2\times 10^{18}\,\hbox {cm}^{-3}\) . The high temperature annealing also causes vacancy evaporation down to a depth of 80–100 nm from the outer surface. The possibility of obtaining a stable, uniform distribution of nanometer-sized voids is of major relevance as a novel tool for phonon and electron engineering in thermoelectric materials.     

The First Year Nursing Students’ Achievement and Critical Thinking in Local Wisdom Course Using Problem Based Learning Process

The purpose of this one group—pre test post test design classroom research was to examine learning achievement, critical thinking and satisfaction of first year nurse students at school of nursing during academic year 2011. In the research activity, 94 students participated in three weeks for each scenario in Local Wisdom and Health Care which composed of 4 scenarios. Problem based learning process were included the preparation of facilitators, preparation of learners, and problem/scenario based assignments. The instruments composed of 1) 135 items, 4 multiple choices test which were covered behavioral objectives and blue print of test and validated by course lecturers 2) opinion evaluation form, open ended questionnaire and 3) the critical thinking questionnaire, 80 items in five domains which are Inference, Recognition of Assumption, Deduction, Interpretation, and Evaluation of Argument with internal consistency of .73. Data were analyzed using frequency, percentage, mean, standard deviation, percentile, t test and $\chi ^{2}$ test. It was found that the highest score of learning achievement was 88.79 % while the lowest score was 70.33 %, average learning achievement score was 80.60 $(\pm 3.47)\%$ . The highest grade levels were B+ and B equally (41.49 %). Students demonstrated higher overall critical thinking $(49.62 \pm 5.78)$ after undergone problem based learning process than before the problem based learning process $(46.69 \pm 6.00)$ statistically significance $(\text{ t}\,=\,4.443, p\,<\,.05)$ . Inference and Recognition of Assumption domain after PBL process were better than their own thoughts before PBL process significantly (t = 2.288, $p\,<\,.05$ ; t = 6.287, $p\,<\,.05$ , respectively). The ability of critical thinking was found that the high, moderate and low level (percentile $>75, 25-75$ and $<25$ ) after PBL were difference from the ability before the process significantly $(\chi ^{2}=12.219, p\,<\,.05)$ .     

Study on the Effect of Mn,Zn, and Sb on Undercooling Behavior of Sn-Ag-Cu Alloys Using Differential Thermal Analysis

Differential thermal analysis (DTA) has been conducted on directionally solidified near-eutectic Sn-3.0 wt.%Ag-0.5 wt.%Cu (SAC), SAC \(+\) 0.2 wt.%Sb, SAC \(+\) 0.2 wt.%Mn, and SAC \(+\) 0.2 wt.%Zn. Laser ablation inductively coupled plasma mass spectroscopy was used to study element partitioning behavior and estimate DTA sample compositions. Mn and Zn additives reduced the undercooling of SAC from 20.4\(^\circ \hbox {C}\) to \(4.9^\circ \hbox {C}\) and \(2^\circ \hbox {C}\), respectively. Measurements were performed at cooling rate of \(10^\circ \hbox {C}\) per minute. After introducing 200 ppm \(\hbox {O}_2\) into the DTA, this undercooling reduction ceased for SAC \(+\) Mn but persisted for SAC \(+\) Zn.