现代通信电源中的电磁兼容问题研究

针对现代通信电源中广泛应用的开关电源中存在的传导干扰,提出了共模,差模噪声源模型及共模,差模噪声的预估方法,并阐述了电源滤波器插入损耗的计算方法,上述理论对电源电磁干扰滤波器的设计,选用具有直接的指导意义。     

电磁兼容暗室供电系统的电磁干扰抑制技术研究

本文讨论了电磁兼容暗室供电系统的电磁干扰抑制措施,重点阐述了共模和差模电源滤波器的工作原理及特性,分析了在不同供电条件下共模和差模电源滤波器的选择问题,为电磁兼容暗室供电系统的电源滤波器选择提供了参考依据。     

一种新的基于共模扼流圈传导干扰模态分离网络

测试传导性干扰的模态噪声,是设计电磁干扰(EMI)滤波器的前提条件。共模扼流圈能够抑制共模模态,而不影响差模电流的输出。根据共模扼流圈这一特点,设计一种由两个共模扼流圈为核心的共模/差模分离网络,实现共模电压和差模电压的同时输出。仿真结果表明,在150 kHz³0 MHz的测试频带,输入端口阻抗基本在50Ω,并且共模传递比(CMTR)、差模抑制比(DMRR)、差模传递比(DMTR)及共模抑制比(CMRR)四个结果显示了该分离网络的良好模态分离效果。     

磁性材料在EMI滤波器中的应用

磁性材料是EMI滤波器的关键材料。文章简单介绍了EMI滤波器所用磁性材料的特点,详细分析了共模滤波电感和差模滤波电感所用磁芯的基本特性,给出了共模滤波电感磁芯和差模滤波电感磁芯的温度特性。     

EMI滤波器在反激式开关电源中的研究与实现

电源技术的发展使得体积小、高效能、高可靠性“绿色电源”成为下一代电源的发展趋势。但开关电源由于本身工作特性使得电磁干扰问题相当突出,电源作为一个电子系统中重要的部件,其可靠性决定了整个系统的可靠性。EMI（Electromagnetic Interference）滤波器是由电感、电容等构成的无源双向多端口网络,能衰减共模和差模干扰。提高电子仪器、计算机和测控系统的抗干扰能力及可靠性。在研究了EMI滤波器原理基础上,提出了EMI滤波器在反激式开关电源中的设计与实现。     

磁性材料在EMI滤波器中的应用

磁性材料是EMI滤波器中关键材料。本文在简单介绍EMI滤波器所用磁性材料特点基础上,详细分析了共模滤波电感和差模滤波电感所用磁芯的基本特性,并讨论了共模滤波电感磁芯和差模滤波电感磁芯的温度特性。     

一种EMI电源滤波器的设计

系统的电磁兼容问题越来越受到关注,本文介绍了可以抑制开关电源传导电磁干扰的EMI电源滤波器的设计方法。重点分析了EMI电源滤波器的共模滤波电路、差模滤波电路以及磁性材料和滤波电容的选取原则,详细阐述了噪声的产生途径、噪声等效电路以及解决方法。     

通信开关电源的电磁兼容性

为了抑制通信开关电源受到的电磁干扰,解决其电磁兼容性问题,从开关电源的电磁干扰,电磁兼容性等的特点出发,详细分析共模/差模干扰,传导干扰和辐射干扰,并根据相应的干扰问题,提出了开关电源内部PCB布线、元器件分布要求,EMI滤波电路,典型的共模/差模干扰滤波器及其改进方法。同时从电路设计,仪器设备等方面进行改进,进而达到开关电源的工作性能最优化。     

平面耦合EMI滤波器电容和电感的确定

EMI滤波器是抑制传导电磁干扰的重要手段,但分立元件型滤波器由于其自身的缺点性能受到限制,而平面耦合型滤波器能够很好改善传统分立元件型EMI滤波器的缺点。在介绍平面耦合型滤波器结构的基础上,指出电感和电容参数是该类滤波器的最重要技术参数。通过对滤波器元件数值计算模型的建立和论证,说明共模和差模电容可以通过解析表达式计算;差模电感,即共模模块形成的漏感也可以采用解析表达式确定。但是,各线匝的电感由于与频率密切相关,无法采用对应的解析表达式确定。     

传导性电磁干扰噪声的诊断与抑制方法

传导性EMI的测试主要是通过线性阻抗稳定网络(LISN)进行的,但测得的结果是共模(CM)噪声和差模(DM)噪声的混合信号,而滤波器的设计分为共模和差模两个部分.介绍传导性电磁干扰噪声的分离技术及EMI滤波器的阻抗匹配问题.通过实例证明,传导性电磁干扰噪声分离网络能对共模和差模噪声进行有效地诊断,为正确选用抑制噪声的EMI滤波器提供依据.     

反激式开关稳压电源传导干扰研究

开关式直流稳压电源的电磁干扰不仅对电网产生干扰,导致在同一电网上供电的其它设备不能正常工作,而且严重的谐波电压电流会在开关电源内部产生电磁干扰,从而造成开关电源内部工作不稳定,使开关电源性能降低。文中以反激式开关稳压电源为研究对象,主要分析了传导测试中,差模、共模传导两种方式噪声源的产生机理,建立了开关电源传导干扰模型,采用EMI滤波器即共模滤波和差模滤波,并详细研究了加入π型滤波器、输入x电容、共模扼流圈等对开关稳压电源传导干扰的抑制效果,得出传导干扰抑制在标准限制范围的改进措施,整改后可让传导干扰强度从100μV降低到200 nV并通过认证。研究结果表明该措施对抑制开关稳压电源传导干扰是有效的。     

Analysis of a ripple-free input-current boost converter withdiscontinuous conduction characteristics

Coupled inductor techniques supply a method to reduce the power converter size and weight and achieve ripple-free current. The boost power converter is a very popular topology in industry. However, the input-current ripple hinders efforts to meet electromagnetic interference (EMI) requirements. In particular, the input current becomes discontinuous and pulsating when the conventional boost power converter operates in the discontinuous inductor-current mode. This paper describes a boost power converter which has the same discontinuous properties as the conventional boost power converter. However, the proposed boost topology has continuous or ripple-free input current when it operates with discontinuous inductor-current. The proposed topology is compared with traditional converter topologies, such as the Sepic and Cuk power converters. Simulation results are presented. The prototype is built to demonstrate the theoretical prediction. The proposed boost topology is simple, with straightforward control [the same as pulse-width modulation (PWM)]     

基于UC3844反激式开关电源的设计

设计了一种基于UC3844的反激式多路输出开关电源,采用工业上常用的DC12~18 V输入,输出2路24 V/300 mA。此开关电源充分利用高频变压器原边绕组特性,把反馈绕组与供电绕组合二为一,简化了外围硬件电路,同时充分考虑了其成本和体积大小,除消除高频杂波用的共模电感、功率电阻、输出整流二极管及滤波电解电容外,其余元器件均采用贴片,最后经实验进一步测试并验证了此开关电源稳定且可靠。     

High efficiency,high switching speed,AlGaAs/GaAs P-HEMT DC–DC converter for integrated power amplifier modules

This paper presents a high efficiency, high switching frequency DC–DC buck converter in AlGaAs/GaAs technology, targeting integrated power amplifier modules for wireless communications. The switch mode, inductor load DC–DC converter adopts an interleaved structure with negatively coupled inductors. Analysis of the effect of negative coupling on the steady state and transient response of the converter is given. The coupling factor is selected to achieve a maximum power efficiency under a given duty cycle with a minimum penalty on the current ripple performance. The DC–DC converter is implemented in 0.5 μm GaAs p-HEMT process and occupies 2 × 2.1 mm² without the output network. An 8.7 nH filter inductor is implemented in 65 μm thick top copper metal layer, and flip chip bonded to the DC–DC converter board. The integrated inductor achieves a quality factor of 26 at 150 MHz. The proposed converter converts 4.5 V input to 3.3 V output for 1 A load current under 150 MHz switching frequency with a measured power efficiency of 84%, which is one of the highest efficiencies reported to date for similar current/voltage ratings.     

自跟踪陷波器

本文提出一种自动调谐陷波器,其陷波中心频率自动跟踪市电频率或某一外加干扰频率,以抑制其干扰.陷波器的谐振电路由LC组成,而电感L是用普遍阻抗转换器(GIC)来实现,GIC的端接电阻为压控MOS管电阻,因此可以用一电压控制此电阻以改变电感值,进而控制陷波频率.这种陷波电路可用于抑制市电频率的干扰噪声并防止测量或数据采集系统中前置放大器的饱和.实验结果表明在频率从4555Hz,其陷波频率跟踪精度优于0.5Hz,而陷波深度(串模抑制比)为3040dB.     

采用倍流整流移相全桥的ZVZCS直流变换器研究

在传统的移相全桥ZVZCS直流变换器中,输出侧多采用全波整流式结构,在大电流输出条件下这种结构将增加输出滤波电感和变压器的体积以及整流管上的电压应力,不利于在低压大电流输出场合的应用。针对这种情况,文章在输出侧采用一种适宜应用在低电压大电流输出场合的倍流整流式结构,使变压器和输出滤波电感的设计得到简化,并且输出整流二极管实现了零电流自然关断,降低了功率器件的应力与开关损耗,适合于大功率场合;文中还简单讨论了软开关的实现范围和参数的设计等问题。最后,在以上分析的基础上,设计了一台输出电压为27V,输出功率为3kW的电源,利用Matlab/Simulink进行了仿真,并给出了相应的仿真结果。     

A Fully Integrated Thin‐Film Inductor and Its Application to a DC‐DC Converter

This paper presents a simple process to integrate thin‐film inductors with a bottom NiFe magnetic core. NiFe thin films with a thickness of 2 to 3 μm were deposited by sputtering. A polyimide buffer layer and shadow mask were used to relax the stress of the NiFe films. The fabricated double spiral thin‐film inductor showed an inductance of 0.49 μH and a Q factor of 4.8 at 8 MHz. The DC‐DC converter with the monolithically integrated thin‐film inductor showed comparable performances to those with sandwiched magnetic layers. We simplified the integration process by eliminating the planarization process for the top magnetic core. The efficiency of the DC‐DC converter with the monolithic thin‐film inductor was 72% when the input voltage and output voltage were 3.5 V and 6 V, respectively, at an operating frequency of 8 MHz.     

A low noise,high power efficiency supply regulator for near-field power delivery

In order to deliver near-field electromagnetic power to a biomedical device or an RFID tag efficiently, the downlink signal is preferred to be at a high voltage level. To reduce power consumption and meet low supply requirements, it is advantageous for the remote device power supply to step-down the input voltage following rectification, typically using switch-mode regulators. The output ripple of a switched capacitor converter is inversely proportional to the filtering capacitance at the output node and switching frequency. In this paper, a hybrid DC–DC converter utilizing a switched capacitor regulator in master–slave configuration with a linear regulator is presented. Linear regulator actively cancels the switching ripple, while low frequency and DC current is provided by the switched capacitor converter. The converter is designed to receive an average input voltage of 5 Vpk from the receiver coil, with an output voltage of 2 V, and 5 mA of output current. The proposed regulator is fabricated in 0.35 μm technology. The power efficiency is measured to be 67%, with a nominal peak to peak ripple of less than 2 mV at the output.     

零电流开关大功率DC/DC双全桥变换器设计

提出了一种基于双全桥结构的单向零电流开关大功率（兆瓦级）DC/DC变换器,该变换器通过采用两个全桥变换器来实现零电流开关,实现了较低的功率损耗和输出滤波电感。为了验证提出的变换器在大功率应用中的有效性,构建了小型样机并在大功率直流电网进行了实际测试。实验证明,相比传统的两种单向大功率全桥变换器,提出变换器所需的滤波电感和半导体器件的功率损耗均较少,分别仅为1.72mH和924.5kW。     

一种ADC电源方案设计与电源完整性分析

为合理利用机箱空间、减少电源芯片使用数量,提出了一种20片模数转换器(Analog-to-Digital Converter,ADC)芯片供电方案,既可减小不同频段ADC芯片因输入相同电源造成信号干扰的可能,也可减少低压差线性稳压器(Low Dropout Linear Regulator,LDO)的使用数量,充分利用电源芯片的供电能力,大大降低了模块开发成本。与传统电源方案相比,该方案中电源芯片使用数量减少一半,电源布局面积缩小60%。同时通过仿真可提前识别出其中一路LDO芯片输出的2.5 V电压在到达ADC芯片时未能达到ADC芯片输入的最小电压要求。结合静态压降公式提出3种优化方法,均可达到ADC芯片输入的最小电压要求。采用第2种优化方法,回板实测结果显示3个芯片接收到的电源电压差值为0.3 V,与仿真结果一致。