喀呖声的识别方法探讨

为避免产品EMC测试中的误判,有效识别固定频点150 kHz、500 kHz、1.4 MHz、30 MHz之外的喀呖声骚扰与连续骚扰十分重要.文章阐述了家用电器电磁骚扰发射中的连续骚扰与断续骚扰的差异、喀呖声的检测方法及判定原则.通过典型实例对喀呖声骚扰进行了频域和时域的波形及数据分析,探讨了四个固定频点之外的喀呖声骚扰识别方法——重复测量法、示波器观测法、频谱仪时域观测法.分辨方法简单有效,实验室检测人员可根据条件选取合适的方法,对喀呖声骚扰进行准确的判别.     

喀呖声分析仪测试误判分析

问题描述使用喀呖声分析仪进行断续骚扰测试时常会出现如下问题：在实时测量观察窗中明确观测到了断续骚扰信号,但经设备自带软件进行数据整理后却给出了无断续骚扰的结论。图1为喀呖声测试过程中500 k Hz通道时域图形,可明确看到骚扰信号多次超过限值：10 s内有7次骚扰脉冲幅度超过限值。且由图1的时域波形可以判断出满足喀呖声评判的两大条件：（1）幅度超过连续骚扰准峰值限值。     

喀呖声分析仪的校准

喀呖声分析是家电产品电磁兼容测试的重要内容之一，深入学习有关国际和国内标准对进一步理解喀呖声干扰和掌握测试分析方法是十分必要的。本文叙述了继续干扰和喀呖声的表现形式，对用于校准喀呖声分析仪的校准信号进行了时域、频域和幅度特性分析，在此基础上作者采用可编程多波形发生器制成了校准信号发生器，并编制了相应的软件。     

全新的数字式测试接收机

介绍了全数字式、认证级测试接收机PMM9010的原理、特点及应用.除输入端的信号预选器外,该接收机每一个电路都实现了数字化.测试范围从10 Hz～30 MHz(可扩展3 GHz或6 GHz).全兼容CISPR 16标准.仪器预置信号预选器、前置放大器、自动衰减器、四种检波器(峰值、准峰值、有效值和平均值)以及跟踪信号发生器等.测试过程符合相关标准的要求.其稳定的性能,免去了高昂的维护费用.仪器可添加4通道Click分析模块、蓝牙模块等.辅以不同的配件如LISN、电流电压注入探头和吸收钳等,可以完成所有的EMC传导、辐射测试.     

500kV 串补站隔离开关操作的电磁骚扰测量与分析

：对500kV 串补站隔离开关操作在二次回路产生电磁骚扰的测量方法和结果进行了论述,通过对骚扰信号时域和频域的分析处理,给出了骚扰的波形特征。     

家用电器的电磁兼容限制与改进要求

剖析了目前我国已颁布的家用电器产品强制性标准中对骚扰电压、骚扰功率、断续骚扰电压、谐波电流骚扰、电压波动和闪烁骚扰的限值以及抗扰度设计要求。     

提高电池供电应用系统的电源效率

开关式电源的效率可以接近100％，但在低负载电流工作下其效率则会大幅下降，甚至低于线性稳压器。采用断续导电模式（DCM)再配合多种不同的操作模式，可以提高开关式电源的效率。     

ALCOSWITCH BLUE：按钮开关

TE Connectivity推出了一款微型ALCOSWITCH BLUE系列按钮开关。该款产品设计紧凑，内建新的快动机构，开关动作快捷，其清晰的触感和有声反馈可提示是否对开关进行了正确的按压操作。     

一种适合于开关稳压器的新颖电流检测方法

针对开关稳压器中负载电流检测难以同时做到准确、同步和结构简单这一难题,结合自己多年工作经验,提出了一种新颖的开关稳压器负载电流检测的新方法。其基本原理是利用断续模式（DCM）下负载电流与同步管栅极驱动信号N_DRV的同步关系,通过检测该栅极信号来检测开关稳压器的输出负载电流。这种方法不仅使负载电流检测同步和准确,且同时克服检测电感平均电流带来的电路结构复杂及实现上的困难。该电路经过HSpice仿真验证,其仅消耗5μA的静态电流,工作状态良好。     

一种BUCK型开关稳压器负载电流检测电路

针对Buck型开关稳压器的断续工作模式(DCM),基于CSMC0.5μm CMOS工艺设计实现了一种新颖的负载电流检测电路。同传统的电感电流采样方式不同,该结构直接应用与负载电流变化几乎同步的同步管栅极驱动信号作为"电流采样"信号,实现了负载平均电流的检测。经投片验证,提出的电流检测电路工作良好,且面积仅占芯片的1.5%,同传统采样方式相比,面积减小了21%,静态时的耗电仅为原来的40%。     

PCB设计中同步开关噪声问题分析

印刷电路板设计中的同步开关噪声问题是现代高速数字电路应用的瓶颈之一。介绍了一 种在电路板上施加同步开关报文和温度应力的可靠性测试方法,该方法可以有效暴露电路 板上的同步开关噪声问题。借助噪声测试和阻抗分析手段,对一个由该方法发现的异常问 题进行了分析,通过优化去耦电容和电源平面阻抗,抑制了电路板上的同步开关噪声, 问题得到了完美解决。最后,给出了一些在PCB设计中抑制同步开关噪声的方法和建议。     

IEEE 1149.4标准实验测试结构设计和扩展研究

本文采用复杂可编程逻辑器件（CPLD）和分立器件,设计实现了IEEE 1149.4混合信号边界扫描标准实验测试结构。为了提高互连测试的故障诊断能力,文中对模拟边界模块（ABM）开关结构进行了一些修改。针对ABM单元的这些修改允许测试者可以将模拟输入信号与多个电压进行比较。当测试者在简单互连或扩展互连中遇到桥接故障,扩展的ABM开关结构使得故障更容易探测。     

Design of a Flexible Control Platform for Soft-Switching Multilevel Inverters

In modern high-power medium voltage drives, multilevel converters are increasingly used. Employing slight topological modifications, soft-switching technology can be applied to multilevel converters to reduce the switching losses. As a result, the switching frequency can be increased, thereby reducing the output filter size. However, common converter controls have to be modified. In this paper, a flexible control platform is presented that allows rapid prototyping of soft-switching topologies. An analysis of different auxiliary resonant commutated pole (ARCP) topologies shows that all switching commands can be synthesized with synchronized signals of two-level ARCP converters. Therefore, a flexible state-machine for two-level converters was developed first, which can also be used to build controls for multilevel topologies. It supports drivers with built-in intelligence as well as the control of additional switches that are required in some ARCP neutral-point-clamped (NPC) topologies. The switching commands for the state machines can be generated by standard multilevel modulation methods. Illegal switching states are filtered and multiple simultaneous commutations per phase are prevented for ARCP NPC converters. To verify the functionality, the control scheme was realized in a field programmable gate array and a completely modular test converter was developed. This test converter can be used to quickly implement all common multilevel topologies and test different modulation strategies. Experimental results are presented in this paper.     

卫星IP通信网设计技术

卫星通信网用于传输IP业务时面临一些特有的问题。论述了卫星通信特有的长延时和误码特性对各种IP业务的影响并给出了一些切实可行的解决办法;着重阐述卫星IP通信网设计时,如何进行路由协议选择、提高卫星信道利用率、广播风暴、备份信道切换路由问题以及关注IP信道质量如何衡量等问题,给出了每个问题的解决办法和一些切实可行的措施,对有些问题专门做了研究试验,提供了一些试验测试数据、曲线和有关示意图。     

The NGI ONRAMP test bed: reconfigurable WDM technology for nextgeneration regional access networks

Next generation internet optical network for regional access using multi-wavelength protocols (NGI ONRAMP) is a pre-competitive consortium sponsored by DARPA. Its mission is to develop architectures, protocols, and algorithms for wavelength division multiplexing (WDM)-based regional access networks that will effectively support the NGI. A reconfigurable WDM test bed is being built to demonstrate some of the key thrusts of the consortium, including dynamic service provisioning and optical flow switching, service protection in the optical domain, medium access control protocols, and network control and management geared for the efficient transport of Internet traffic over WDM networks. The ONRAMP test bed will consist of a feeder network connecting via access nodes to distribution networks on which the end users reside. ONRAMP network reconfiguration is enabled by access nodes that contain both optical and electronic switching components, allowing data traffic to be routed all-optically through the network or to be switched and aggregated by electronic Internet protocol (IP) routers. This paper describes the goals and basic architecture of the ONRAMP test bed, as well as the design, construction, and characterization of the network access nodes. To illustrate test bed operation, we demonstrate optical flow switching over the test bed that achieves Gb/s throughput of TCP data between end user workstations     

测试系统继电器电阻值异常的工程学分析及解决

介绍了对于测试系统接触测试项目出现异常所做的分析,最终定位问题出现在测试系统继电器的电阻值的异常,经过分析和试验,其异常的原因归结为测试系统针对特定结构的被测产品因为考虑不周而使悬空的测试线路带有超过允许范围的电荷,导致在之后的继电器开关过程中对触点造成伤害.文中提出了解决方案并通过实践验证解决方案的可行性.     

Unclamped inductive switching behaviour of high power SOI vertical DMOS transistors with lateral drain contacts

The switching dynamics of silicon-on-insulator (SOI) high power vertical double diffused MOS (VDMOS) transistors with an inductive load has been investigated by device simulation. Unlike other conventional VDMOS devices, this device has drain contacts at the top surface. In general the switching behaviour of a power device during the unclamped inductive switching (UIS) test will determine the reliability of the power device as the energy stored in the inductor during the on state is dumped directly into the device when it is turned off. In this paper we compare the switching dynamics of the SOI VDMOS transistor with standard bulk silicon VDMOS device by doing numerical simulations. It is shown here, using 2D-device simulations that the power dissipated in the SOI VDMOS device during the UIS test is smaller by approximately a factor of 2 than in the standard bulk silicon VDMOSFET. The lower dissipation is due to the presence of the silicon film/buried oxide/substrate structure (this structure forms a SOI capacitor). In the case of the SOI VDMOS transistor the energy released from the inductor during the UIS test is stored to some extent in the SOI capacitor and partly dumped directly into the device. As a result the maximum current through the SOI device is separated in time from the maximum voltage across the device, unlike in the bulk case, thereby reducing the maximum power.     

一种基于频率同步的低噪声电源适配器设计

针对电源适配器高频开关信号的噪声干扰对某些精密仪器性能(如B超机显示清晰度)的影响问题,本文提出通过适配器开关频率和系统设备工作频率同步方式解决噪声干扰的设计思路,以便携式B超机电源适配器设计实践为例,介绍了同步电路的设计方法、功率电路拓扑和辅助电源方案;同步功能通过实验验证,采用该方案的电源适配器已成功应用于某全球知名B超机产品。     

MOS门电路测试过程中功率损耗最小化

MOS逻辑门电路的功率损耗与其门电路的输出翻转成正比。在测试过程中,输出节点反转速率远高于正常使用时,很容易造成电路损坏。因此,在测试过程中减少逻辑门输出翻转速率具有重要意义。文章提出减少MOS门输出翻转速率的一些方法,有助于有效解决这一问题。该方法具有实现简单、编程方便等优点。     

寄生电感对低压增强型GaN HEMT开关行为的影响

寄生电感是影响功率管开关特性的重要因素之一,开关频率越高,寄生电感对低压增强型氮化镓高电子迁移率晶体管(GaN HEMT)的开关行为影响越深,使其无法发挥高速开关的性能优势。通过建立数学模型,理论分析了考虑各部分寄生电感后增强型GaN HEMT的开关过程,并推导了各阶段的持续时间和影响因素,然后通过建立双脉冲测试平台,对各部分寄生电感对开关特性的具体影响进行了实验验证。实验结果表明,寄生电感会使开关过程中的电流、电压出现振荡,影响开关速度和可靠性,并且各部分寄生电感对增强型GaN HEMT的开关过程影响程度不同,在实际PCB布局受到物理限制时,需要根据设计目标优化布局,合理分配各部分寄生电感以获得最优的开关性能。