A Novel SIW-Based Planar W-Band GaAs Gunn Harmonic Oscillator

Based on the substrate integrated waveguide (SIW) technology, a novel W-band low phase noise GaAs Gunn planar harmonic oscillator is developed in this paper. The technique of harmonic extraction from Gunn diodes and SIW resonant cavity structures are discussed in detail. Due to the high quality factor and planar structure of the SIW cavity resonator, the oscillator is characterized by some advantages such as low phase noise, small size, low cost and planar integration. The measured phase noise is −108.56 dBc/Hz at 1 MHz offset and the output power is more than 9 dBm at 94.78 GHz. A 300 MHz of linear tuning range with power fluctuation less than 1.5 dB is observed when the Gunn diode is biased from 4 to 5.3 V.     

一种低相位噪声CMOS晶体振荡器的设计

运用小信号等效模型和负阻分析法,对晶体振荡器的起振条件进行分析,并用Matlab进行了仿真验证。采用TSMC 0.18μm CMOS工艺,设计了一种基于Pierce三点式振荡器结构的14MHz晶体振荡电路。提出了一种新的幅度控制电路,提高了振荡器相位噪声性能,并降低了功耗。仿真结果表明,振荡器的相位噪声达到-129.5dBc/Hz@1kHz和-143.658dBc/Hz@10kHz,具有优良的低相位噪声特性。     

六毫米波段注入锁定振荡器

本文描述一种六毫米波段注入锁定振荡器.该振荡器由耿管振荡器、环行器、锁相参考源组成,耿管振荡器采用背腔式稳频和谐振帽电路结构,输出端经环行器与高稳定度锁相源连接.注锁振荡器的输出功率大于60mW,振荡频率为46.1GHz,偏离载频10kHz处,单边带(SSB)相位噪声≤-71.7dBc/Hz,杂波≤-40dB.     

基于CMOS工艺的低相位噪声LC压控振荡器

介绍了一种用于锁相环型频率合成器的单片集成LC压控振荡器。该压控振荡器在传统的电路结构基础上进行了改进,在保证调谐范围的前提下,有效地降低了相位噪声。压控振荡器使用了片上集成螺旋电感,采用中芯国际(SMIC)0.35μm 1P6M混合信号CMOS工艺。测试结果表明,该压控振荡器的可调频率为3~3.55 GHz,在3.55 GHz中心频率附近的相位噪声达到-128 dBc/Hz(600 kHz),整个压控振荡器的工作电压为3.3 V,工作电流为13 mA。     

A 20MHz Low Phase-Noise 0.35μm CMOS Crystal Oscillator

The design procedure of a CMOS process integrating Colpitts cr(ystal oscillator is described in detail by using the tools of Matlab and advanced design system (ADS). The small-signal analysis is performed both in the viewpoint of negative resistance and positive feedback. The analysis of condition for reliable start-up of oscillation and design guides for low phase noise is introduced. The measured phase noise is (172dBc/Hz@10 kHz and the power dissipation is 0.36 mW at power supply 3V.     

Phase-Noise Analysis of Injection-Locked Oscillators and Analog Frequency Dividers

In-depth investigation of the phase-noise behavior of injection-locked oscillators and analog frequency dividers is presented. An analytical formulation has been obtained, which allows a better understanding of the shape of the output phase-noise spectrum of these circuits. The simplicity of this formulation is also helpful for circuit design. Approximate expressions for the corner frequencies of the spectrum are determined, identifying the most influential magnitudes and deriving design criteria. In particular, a technique has been developed to shift the frequency of the first corner of the phase-noise spectrum, up to which the output phase noise follows the input one. The expressions for the corner frequencies can be introduced in either in-house or commercial harmonic-balance software, thus allowing an agile design, as no separate phase-noise analysis is required. The validity of the analytical techniques is verified with the conversion-matrix approach and with measurements using two field-effect-transistor-based circuits: a 4.9-GHz injection-locked oscillator and a frequency divider by 2 with 9.8-GHz input frequency.     

A 63-W W-Band Injection-Locked Pulsed Solid-State Transmitter

A high-power three-stage W-band injection-locked pulsed solid-state transmitter using four hybrid-coupled two-diode IMPATT power combiners as the final stage has been developed. Coherent peak output power of 63 W and 92.6 GHz was achieved. The transmitter was operated at 100-ns pulsewidth and 0.5-percent duty cycle. This transmitter development was directed at achieving a high-power output that would be useful for future miltimeter-wave system applications.     

Measuring Transistor Large-Signal Noise Figure for Low-Power and Low Phase-Noise Oscillator Design

This paper presents an experimental method for determining additive phase noise of an unmatched transistor in a stable 50-$Omega$ environment. The measured single-sideband phase noise is used to determine the large-signal noise figure of the device. From the Leeson–Cutler formula and a known oscillator circuit with the characterized transistor, the phase noise of the oscillator can be predicted. The method is applied to characterization of several bipolar devices around 3.4 GHz, the frequency of interest for miniature rubidium-based atomic clock voltage-controlled oscillators.      

A New X-Band Low Phase-Noise Multiple-Device Oscillator Based on the Extended-Resonance Technique

A novel multiple-device oscillator based on the extended-resonance technique is proposed. This oscillator achieves low phase noise through optimizing the circuit's group delay. Based on this technique, an X-band four-device SiGe HBT oscillator has been designed, fabricated, and tested. The measured phase noise is - 119 dBc at 100-kHz offset frequency. To the authors' best knowledge, this oscillator shows the lowest phase-noise performance among other reported X-band microwave planar hybrid free-running oscillators.     

基于背靠背PN变容管的低相位噪声LCVCO研究

研究了一种新型单片集成LC压控振荡器。该压控振荡器在传统的单端PN变容管电路结构基础上,通过对调谐电路进行改进,在保证调谐范围的前提下,有效地降低了相位噪声。压控振荡器使用高Q值螺旋电感,并采用SMIC0.18μm1P6M混合信号CMOS工艺实现。仿真结果表明,在调谐范围不变情形下,新型设计的VCO相位噪声比传统的改善了16.25dB@1kHz、8.08dB@100kHz。压控振荡器的中心频率1.8GHz,工作电压为1.8V,工作电流为3mA。     

A Low Phase-Noise Voltage-Controlled SAW Oscillator With Surface Transverse Wave Resonator for SONET Application

A surface transverse wave (STW) resonator-based oscillator was developed in response to SONET OC-48 application. To meet the low jitter objective, a high-Q STW resonator was designed and fabricated in this study. The residual phase-noise measurement techniques are used to evaluate the feedback oscillator components, such as the loop amplifier, STW resonator, and electronic phase shifter, which can play important roles in determining the oscillator's output phase-noise spectrum. The oscillator's white phase-noise floor is -170dBc/Hz for carrier-offset frequency greater than 1 MHz. The oscillator's phase-noise level is -67dBc/Hz at a 100-Hz carrier offset. Both low close-in phase-noise and low white phase-noise floor makes the oscillator meet low jitter requirement. The electronic frequency tuning range exceeds plusmn200ppm. The oscillator provides 13.5 dBm of output power and consumes 65 mA from +5-V power supply     

Varactor Controlled Gunn Oscillator at W-Band

This paper describes the experimental circuit and measured performance of varactor tuned Gunn oscillator at W-band. The power output of 12.5 dBm has been achieved when packaged GaAs Gunn diode is used. Linear frequency excursion of 150 MHz with power variation of 1 dB has been observed when varactor was given reverse bias from 0 to 20 volts. GaAs hyperabrupt varactor is used in parallel to gunn diode at a distance of odd multiple of λg/2 in waveguide channel.     

Intermodulation Distortion of FDM-FM in Injection-Locked Oscillator

When an injection-locked oscillator is used to amplify a frequency division multiplexing-frequency modulation FDM-FM signal, second- and third-order distortions are found to exist. Explicit expressions are derived that give the signal-to-distortion ratio (NPR) as a function of the locking bandwidth, frequency offset, and various modulation parameters. These formulas are believed to be valid within the limits of the assumptions made.     

一种基于注入锁定环形振荡器的时钟产生电路

提出了一种基于谐波注入锁定数控环形振荡器的时钟产生电路。采用注入锁定技术,极大地抑制了环形振荡器的相位噪声。在频率调谐环路关断的情况下,数控式振荡器可以正常工作,与需要一直工作的锁相环相比,大大节省了功耗。分析了电路的参考杂散性能。在65 nm CMOS工艺下进行流片测试,芯片的面积约为0.2 mm²。测试结果表明,设计的时钟产生电路工作在600 MHz时,1 MHz频偏处的相位噪声为-132 dBc/Hz,在1 V的电源电压下仅消耗了5 mA的电流。     

A Low Jitter Programmable Clock Multiplier Based on a Pulse Injection-Locked Oscillator With a Highly-Digital Tuning Loop

This paper introduces a pulse injection-locked oscillator (PILO) that provides low jitter clock multiplication of a clean input reference clock. A mostly-digital feedback circuit provides continuous tuning of the oscillator such that its natural frequency is locked to the injected frequency. The proposed system is demonstrated with a prototype consisting of a custom 0.13 $mu$m integrated circuit with active area of 0.4 mm$^{2}$ and core power of 28.6 mW, along with an FPGA, a discrete DAC and a simple RC filter. Using a low jitter 50 MHz reference input, the PILO prototype generates a 3.2 GHz output with integrated phase noise, reference spur, and estimated deterministic jitter of 130 fs (rms), ${-}$ 63.9 dBc, and 200$~$ fs (peak-to-peak), respectively.      

Millimeter-Wave (W-Band) Quartz Image Guide Gunn Oscillator

Dielectric image-guide Gunn oscillator using fused quartz as the guide material has been investigated at frequencies around 94 GHz. Computer-controlled CO/sub 2/ laser cutting of quartz to the designed image-guide patterns has also been achieved. A resonant disk and pin bias circuit was used to tune the oscillator to an output power of 5 mW at the oscillation frequency of 94.2 GHz. An electronic frequency tuning of 350 MHz was measured with the oscillation characteristics similar to waveguide cavity oscillators. By varying the bias circuit disk and pin parameters, the Gunn-oscillator tuning characteristics have also been recorded for the future circuit performance optimization.     

集成宽带VCO的低相噪设计

从VCO的相位噪声概念及原理分析入手,论述了集成宽带压控振荡器低相噪的设计方法和设计思路,进行了理论分析和数学模拟,并通过利用相关软件进行仿真、优化设计。获得了低相噪声的宽带振荡器,并给出了各频段集成宽带VCO最终达到的相位噪声指标。低相噪声集成VCO系列产品的成功研制极大地方便了系统设计师的电路设计,该自主研制的低相噪VCO已广泛应用于多种电子系统中,对系统关键电路的国产化、高性能化有着重要意义。     

低相位噪声微波频率源的研究

通过对微波频率源相位噪声的分析,针对一个C波段微波频率源低相位噪声的要求,对比分析了直接倍频、数字锁相以及高频鉴相之后再倍频三种方案之间的相位噪声差别。最终得出采用直接在超高频(UHF)波段对输入信号进行模拟鉴相并锁定之后再倍频才能达到所要求的相位噪声指标。对制成的样品进行了测试,取得了预期的相位噪声指标。该C波段微波频率源的相位噪声可以达到:≤-120 dBc/Hz@1 kHz,≤-125 dBc/Hz@10 kHz,≤-130dBc/Hz@100kHz,≤-140 dBc/Hz@1 MHz。直接在UHF波段进行高频鉴相的技术,通过提高鉴相频率大幅降低了微波锁相频率源的相位噪声。     

Frequency Demodulator Using an Injection-Locked Oscillator: Analysis and Design

This letter introduces a systematic procedure for the design of direct frequency demodulators based on injection locking. An oscillator is synchronized to the modulated carrier and the modulation signal is extracted from the time-variation of the current or voltage of the bias-network. The synchronized oscillator is optimized with harmonic-balance techniques specifically developed for this demodulation function. The circuit performance under modulated conditions is evaluated with envelope transient and using a modified Poincare map. The new techniques are illustrated by means of their application to a direct frequency demodulator at 1.2 GHz. The letter shows that provided accurate nonlinear analysis and design techniques are used, injection-locked oscillators constitute a good option for the implementation of direct frequency demodulators.