基本电子电路

f洲了多芯片胡.件中带裂缝电源/接地板同步开关噪声分析/帆(上海交通大学){{上海交大学报.一2002,36(12)2003020819王德东,李征 一1785-1787电源接地板上的同步开关噪声是制约高速电路发展的瓶颈,而目前同步开关噪声分析集中于规则电源接地板,与实际电路有一定差距.文中基于部分等效元方法分析多芯片组件中带裂缝的电源/接地板上的同步开关噪声;对不同尺寸位置的裂缝引起的同步开关噪声进行相应的时域模拟,得出了多芯片组件中电源/接地板上裂缝对同步开关噪声的影响.图6参6(木)TN711 2003020820模拟开关电路潜在电路分析软件算法的研究/马…     

高速多芯片组件同步开关噪声的二维特征法全波分析

高速多芯片组件(MCM)广泛用于高复杂度的系统中,而其中的同步开关噪声(Simultaneous Switching Noise)是影响系统功能的重要因素.本文采用二维电磁模型模拟MCM电源、接地板同步开关噪声;文中提出一种新的时域电磁问题的数值方法特征法,并用于求解上述问题,所得结果与FD-TD计算的结果和文献报道一致.     

PEEC结合有理缩减技术分析高速集成电路中同步开关噪声

利用部分元件等效电路 ( PEEC)方法分析高速集成电路系统中同步开关噪声 ,该方法相比其它等效电路方法及全波分析方法 ,具有简单、效率高 ,并可以和无源电路阶数缩减方法结合 ,进行大规模缩减 ,从而进一步提高计算速度。通过对电路中两种典型结构体 (电源 /接地板 ,电源板 /信号线 /接地板 )上同步开关噪声的分析 ,表明这种方法是分析高速集成电路中同步开关噪声的高效方法。     

PEEC结合有理缩减技术分析高速集成电路中同步开关噪声

利用部分元件等效电路（ＰＥＥＣ）方法分析高速集成电路系统中同步开关噪声,该方法相对其它等效电路方法及全波分析方法,具有简单、效率高,并可以和无源电路阶数缩减方法结合,进行大规模缩减,从而进一步提高计算速度。通过对电路中两种典型结构体（电源／接地板,电源板／信号线／接地板）上同步开关噪声的分析,表明这种方法是分析高速集成电路中同步开关噪声的高效方法。     

高速集成电路系统中同步开关噪声分析

文章首次利用部分元等效电路(PEEC)方法分析高速集成电路系统中同步开关噪声。该方法与其它等效电路方法及全波分析方法相比,简单、效率高,并可以和无源电路阶数缩减方法结合,进行大规模缩减,从而进一步提高计算速度。通过分析电路中两种典型结构体(电源／接地板,电源板／信号线／接地板)未加去耦电容和加上去耦电容后同步开关噪声,表明这种方法具有高效性。     

高速多芯片组件同步开关噪声的二维特征法全波分析

高速多芯片组件（ＭＣＭ）广泛用于高复杂的系统中，而其中的同步开关噪声（ＳｉｍｕｌｔａｎｅｏｕｓＳｗｉｔｃｈｉｎｇＮｏｉｓｅ）是影响系统功能的重要因素，本文采用二维电磁模型模拟ＭＣＭ电源，接地板同步开关噪声，文中提出了一种新的时域电磁问题的数值方法－特征法，并用于求解上述问题，所得结果与ＦＤ－ＴＤ计算的结果和文献报道一致。     

PCB设计中同步开关噪声问题分析

印刷电路板设计中的同步开关噪声问题是现代高速数字电路应用的瓶颈之一。介绍了一 种在电路板上施加同步开关报文和温度应力的可靠性测试方法,该方法可以有效暴露电路 板上的同步开关噪声问题。借助噪声测试和阻抗分析手段,对一个由该方法发现的异常问 题进行了分析,通过优化去耦电容和电源平面阻抗,抑制了电路板上的同步开关噪声, 问题得到了完美解决。最后,给出了一些在PCB设计中抑制同步开关噪声的方法和建议。     

改进时频域混合方法分析电源分配网络同步开关噪声

对时频域混合方法加以改进用于分析电源分配网络同步开关噪声.引入修正Gram-Schmidt正交化方法实现矩阵的正交三角分解,以解决有理函数逼近构建时域宏模型中存在的病态条件数问题;同时提出一种结构简单的等效电路模型用于HSPICE电路仿真.计算实例验证了该方法的有效性.     

介质型EBG结构对同步开关噪声抑制的有限元分析

研究了介质型电磁带隙结构对高速电路中电源/ 地平面间同步开关噪声的抑制作用。该介质型电磁带隙结构在抑制同步开关噪声的同时未破坏高速信号的电流返回路径,使高速信号的信号完整性得以保持。利用电磁场有限元方法将电源/地平面间同步开关噪声抑制的三维问题转化成二维问题进行处理,提高了计算效率。分析了介质型电磁带隙结构的介电常数对噪声抑制带宽的影响,利用了三维全波电磁场仿真软件HFSS对二维数值结 果进行仿真验证,仿真结果与数值计算结果基本吻合,验证了二维数值算法的正确性。     

一种基于互补环缝谐振器抑制SSN的新方法

针对高速PCB上抑制同步开关噪声(SSN)的问题,提出了一种将互补环缝谐振器(CSRR)刻蚀在电源平面上,抑制电源/地平面间的电场波动噪声传播的方法。采用基于有限元算法的HFSS软件对该结构进行仿真分析,结果表明:与理想参考平面和电磁带隙结构相比,刻蚀了该CSRR结构的电源分配网络具有较好的宽带全向SSN噪声抑制能力,在抑制深度为-40 dB时,其阻带覆盖从0.26 GHz到超过20 GHz以上的频率范围。     

Analysis of power/ground bounces on the conductive planes in high-speed MCMs with a novel systematic method

In this paper a novel method is proposed for analysing the power/ground bounces on the conductive planes in a high-speed multichip module (MCM) layout system; it is an integrated partial-element equivalent-circuit method with a block reduction algorithm and the recursive convolution formulation. This method has the advantage of simple parameter extraction, high efficiency and high precision. Moreover, a hierarchical modelling strategy is proposed for modelling large power/ground planes by cascading order-reduction time-domain macromodels of small power/ground planes while the power/ground bounces are directly analysed in the time domain. Examples indicate that the proposed method gives high accuracy and high efficiency for the time-domain simulation of power/ground bounces on the conductive planes in high-speed MCMs, and the modelling strategy is efficient.     

Fast analysis of bounces on power/ground planes using even-odd partition

A novel method for analyzing the bounces on structure of parallel power/ground planes by using the even-odd mode partition is presented in this paper. Based on the distributed RLCG circuit model derived from the two dimensional electromagnetic field equations of the power/ground planar structure, this method can speed up the circuit simulation of the bounces on power/ground planes by using even-odd mode partition. Furthermore, the method can be used to evaluate the effects of the terminated decoupling capacitors and the hole structures on power/ground plane. The numerical examples demonstrate that the method has both high efficiency and good precision.     

MCM多层导体板频率响应的平面电路分析方法

MCM电源分配系统设计要求全频带目标阻抗维持在较小的范围内,使得瞬变电流不会引发过大的电压噪声。本文利用平面电路分析方法建立了MCM叠层多端口等效电路,并在此基础上推导了MCM多层导体板多端口阻抗频率响应,该方法在满足趋肤效应假设前提下对于高速数字系统是行之有效的。分别利用平面电路分析方法与传输矩阵方法计算了多层导体板MCM叠层端口自阻抗与互阻抗,计算结果得到了较为一致的吻合,从而验证了该方法的合理性。     

Electromagnetic interference (EMI) reduction from printed circuit boards (PCB) using electromagnetic bandgap structures

As digital circuits become faster and more powerful, direct radiation from the power bus of their printed circuit boards (PCB) becomes a major concern for electromagnetic compatibility engineers. In such multilayer PCBs, the power and ground planes act as radiating microstrip patch antennas, where radiation is caused by fringing electric fields at board edges. In this paper, we introduce an effective method for suppressing PCB radiation from their power bus over an ultrawide range of frequencies by using metallo-dielectric electromagnetic band-gap structures. More specifically, this study focuses on the suppression of radiation from parallel-plate bus structures in high-speed PCBs caused by switching noise, such as simultaneous switching noise, also known as Delta-I noise or ground bounce. This noise consists of unwanted voltage fluctuations on the power bus of a PCB due to resonance of the parallel-plate waveguiding system created by the power bus planes. The techniques introduced here are not limited to the suppression of switching noise and can be extended to any wave propagation between the plates of the power bus. Laboratory PCB prototypes were fabricated and tested revealing appreciable suppression of radiated noise over specific frequency bands of interest, thus, testifying to the effectiveness of this concept.     

Double-Stacked EBG Structure for Wideband Suppression of Simultaneous Switching Noise in LTCC-Based SiP Applications

We propose a novel electromagnetic bandgap (EBG) structure with a significantly extended noise isolation bandwidth, called a double-stacked EBG (DS-EBG) structure, fabricated on a low-temperature co-fired ceramic (LTCC) multilayer substrate. The DS-EBG structure was devised for wideband suppression of simultaneous switching noise (SSN) coupling in system-in-package (SiP) applications. Our design approach was enabled by combining two EBG layers embedded between the power and ground planes. The two EBG layers had different bandgaps from using different cell sizes. Enhanced wideband suppression of the SSN coupling was validated using a 11.4-GHz noise stop bandwidth with 30-dB isolation in time and frequency domain measurements up to 20GHz.     

EMI mitigation with multilayer power-bus stacks and via stitchingof reference planes

General methods for reducing printed circuit board (PCB) emissions over a broad band of high frequencies are necessary to meet EMI requirements, as processors become faster and more powerful. One mechanism by which EMI can be coupled off a PCB or multichip module (MCM) structure is from high-frequency fringing electric fields on the DC power and reference planes at the substrate periphery. An approach for EMI mitigation by stitching multiple ground planes together along the periphery of multilayer PCB power-bus stacks with closely spaced vias is reported and quantified in this paper. Power-bus noise induced EMI and coupling from the board edges is the major concern herein. The EMI at 3 m for different via stitch spacing and layer thickness is modeled with the finite-difference time domain (FDTD) method. Design curves and an empirical equation are extracted from a parametric study to summarize the variation of the radiated EMI as a function of layer thickness and stitch spacing     

Modeling and analysis of power distribution networks for Gigabit applications

As the operating frequency of digital systems increases and voltage swing decreases, it becomes very important to characterize and analyze power distribution networks (PDNs) accurately. This paper presents the modeling, simulation, and characterization of the PDN in a high-speed printed circuit board (PCB) designed for chip-to-chip communication at a data rate of 3.2 Gbps. The test board consists of transmitter and receiver chips wirebonded onto plastic ball grid array (PGBA) packages on a PCB. In this paper, a hybrid method has been applied for analysis, which consists of the transmission matrix method (TMM) in the frequency domain and macromodeling method in the time domain. As an initial step, power/ground planes have been modeled using TMM. Then, the macromodel of the power/ground planes has been generated at the desired ports using macromodeling. Finally, the macromodel of the planes, transmission lines, and nonlinear drivers have been simulated in standard SPICE-based circuit simulators for computing power supply noise. In addition to noise computation, the self and transfer impedances of power/ground planes have been computed and the effect of decoupling capacitors on power supply noise has been analyzed. The methods discussed have been validated using hardware measurements.     

Numerical and experimental investigation of radiation caused by the switching noise on the partitioned DC reference planes of high speed digital PCB

Influence of the partitioning and bridging of the power/ground planes on the radiation caused by the switching noise on the dc reference planes is investigated both theoretically and experimentally. Based on the three-dimensional finite-difference time-domain modeling, the electromagnetic interference (EMI) performance of the partitioned power/ground planes is studied. Radiated emission at the 3-m distance from the tested boards is measured in a fully anechoic chamber. The measured and the numerical results agree generally well. The radiation behavior of four kinds of partitioned configuration of the power/ground planes is studied. It is found that completely isolating the noise source by the etched slits, or moats, significantly reduces the radiation level at the frequencies near resonance. However, bridges connecting two sides of the moat not only significantly degrade the ability of the EMI protection of the moat, but also excite a new low-frequency resonant mode. The effect of the geometrical parameters, such as the moat size, moat location, bridge width, and bridge position, on the radiation behavior of the printed circuit board is considered. The radiation mechanism of the EMI behavior of the partitioned dc reference planes is discussed.