非线性双极晶体管模型的研究

本文对非线性双极晶体管的模型进行了研究,非线性晶体管模型对微波CAD和无线电系统仿真都是非常关键的。本文采用等效电路模拟非线性双极晶体管,给出了等效电路模型及模型参数,并用这些参数描述了非线性双极晶体管工作过程中的直流特性和各种效应:基区宽度调制效应、电荷储存效应;正向电流增益(BF)随电流的变化以及温度的影响等。为准确地建立不同用途双极晶体管的模型提供了依据。     

符号网络函数在晶体管交流参数提取中的应用

介绍了一种用于晶体管交流模型参数提取中特性估值的新方法。它采用晶体管等效电路的Ｚ参数符号网络函数来计算晶体管交流特性，消除了常规方法中通过求节点电压方程获得我氕 耗时过程，因此大大提高了提取效率。最后给出了一个提取实例。     

SiGe HBT小信号等效电路的参数直接提取

提出了一种求解硅锗异质结双极型晶体管(SiGe HBT)小信号等效电路模型的参数直接提取方法.整个提取过程使用由小信号等效电路推导出的一系列解析表达式,不使用任何数值优化方法.参数提取结果使用ADS软件仿真验证.结果表明,该方法简单易行,较为精确.     

SiGe HBT非准静态小信号等效电路的参数提取

提出了一种硅锗异质结双极型晶体管（SiGe HBT）非准静态效应的小信号等效电路模型的参数提取方法。整个参数提取过程建立在由非准态效应的小信号等效电路推导出的一系列泰勒级数解析公式并结合参数直接法,该方法依赖于测量的S参数,不使用任何的数值优化法,参数提取结果使用CAD仿真验证。结果表明该参数提取方法简单易行,较为精确,该方法能够用到不同工艺SiGe HBT参数提取。     

高频硅基光电晶体管SPICE模型的建立及关键参数的提取

硅基光电晶体管在高频通信、自动控制、电力系统领域具有广泛的应用前景.从系统验证和仿真的角度,迫切需要建立光电晶体管的等效电路模型,该模型需要包含电学特性和光学特性.本文提出了一种高频(100MHz～1GHz)硅基光电晶体管的SPICE(Simulation Program with Integrated Circuit Emphasis)等效模型,包含器件的主要光电特性,通过TCAD(Technology Computer Aided Design)仿真建立了模型中关键电学和光学参数的提取方法.基于所建立的高频光电晶体管的SPICE模型等效电路进行仿真,所得到的仿真结果能够完整描述光电晶体管的电学特性和光学特性,并验证了模型在器件模拟与电路应用上的可行性,表明本文所提出的SPICE模型和参数提取方法,对于基于高频光电晶体管的系统仿真,具有参考价值.     

GaN HEMT器件微波噪声模型参数提取

介绍了两种可以用于GaN高电子迁移率晶体管(HEMT)器件建模的噪声模型,Pu-cel等效电路噪声模型和Pospieszalski温度噪声模型.基于Pucel等效电路噪声模型,介绍了利用器件本征噪声参数推导Pucel噪声模型参数的过程,并且给出了微波噪声模型参数的表达式.利用上述方法,针对200 μm栅宽的GaN HEMT器件,提取了噪声模型参数值,并且在ADS仿真软件平台上建立了GaN HEMT器件的Pucel等效电路噪声模型,仿真结果与实测结果在频率为4～18 GHz带宽内吻合较好,说明提出的噪声模型参数提取方法对于GaN HEMT器件噪声仿真的实用性和准确性.     

基于Z参数的微波晶体管高频噪声网络分析方法

利用Z参数噪声网络等效电路的分析方法,得到了用器件Z参数表示的微波双极晶体管噪声参数的表达式,通过对微波低噪声双极晶体管的高频参数进行测试和分析,并把器件的网络参数和物理参数相结合,来对器件的最小噪声系数进行计算和分析.     

GaN HEMTs小信号等效电路建模与参数直接提取

半导体技术飞速进步,第三代半导体氮化镓(GaN)因其优越的性能近年来受到了广泛的关注与研究.数以万计的氮化镓高电子迁移率晶体管(GaN HEMT)应用于微波和毫米波等领域,成为半导体产业研究的热点.本文在传统的氮化镓高电子迁移率晶体管(GaN HEMTs)小信号等效电路模型的基础上将所建立模型的参数数量提高到20个,提...     

基于单π模型的RF螺旋电感模型及参数提取法

提出了一种基于单π模型的RF螺旋电感等效电路模型及参数提取方法。该模型在传统单π模型基础上,增加支路间的并联RC网络来表征衬底耦合。在串联支路,增加RL网络来模拟趋肤效应和邻近效应。采用分频段的方法来合理简化等效电路。采用直接解析法来获得等效电路网络中所有的模型参数,无需任何优化。验证结果表明,在0~40 GHz范围内,模型值与仿真值吻合较好。该模型及参数提取方法不仅能简化计算量,还能更好地解释电路行为,对RFIC设计有参考价值。     

自由振动压电振子的一种复参数等效电路

将复数概念引入到等效电路元件参数中,并以自由振动压电振子的一种常用振动模——纵向长度伸缩振动模为例,给出了一种复参数等效电路,并推导了等效电路参数与压电材料参数之间相互关系。等效电路元件参数的虚部表示压电振子机械、介电、及压电损耗。给出了由复参数等效电路模型作出的阻抗圆图与由振动理论给出的阻抗圆图以及由传统模型所作出的阻抗圆图。结果表明,新的复参数模型优于传统模型,是一种精确的等效电路。     

Large signal and transient characteristics of electrochemical amplifiers

Electrochemical cells in which the concentration of an ionic species in a chamber can be varied by means of an applied electrical signal constitute low-frequency analogs of the junction transistor. The analogy is pursued here by deriving equivalent circuits for such cells under large signal dc and transient conditions. In one sense the electrochemical cell may be regarded as a "perfect" semiconductor (no recombination of charge carriers). Therefore, parallels are noted to transistor equivalent circuits, particularly the charge control model, and equivalent switching-time equations are derived. Experimental data is compared to predicted results, and an electrochemical version of the Eccles-Jordan flip-flop is presented.     

Transistor equivalent circuits

This paper surveys the history of the electric-circuit representation of the transistor over the past fifty years. During the first two decades after the transistor was announced in 1948, primary emphasis was on small-signal equivalent circuits, which could be used for linear-circuit analysis and design. In addition, parameters of many of these equivalent circuits for the bipolar junction transistor, which are described, were related to the physical construction of the device. Approximately two-thirds of the paper is devoted to this period, when the writer personally contributed to this effort. By the beginning of the third decade, transistor circuits had became more complex, and circuit analysis was carried out with the help of digital computers. Interest then shifted away from small-signal equivalent circuits to “models” for computer-aided circuit design (CACD). This transition, including the models used in the widely used CACD program SPICE, is described. MOS transistors are treated only briefly; by the time MOS transistors became commercially viable devices, emphasis then also had shifted to “models” for CACD. In conclusion, the writer notes that there is still hope for us aficionados of small-signal equivalent circuits; new types of transistors are still being characterized in this manner     

Extraction of the parameters of equivalent circuits of microwavetransistors using tree annealing

The problem of extracting a physically based equivalent circuit model for a heterostructure bipolar transistor (HBT) from S-parameter measurements is solved with a new formulation of simulated annealing. The physical model necessary for an accurate representation of the HBT leads to an extraction problem with many local minima. A satisfactory minimum can be found by conventional gradient-based techniques only with considerable expert guidance. The proposed algorithm finds equivalent circuits as good as those from conventional techniques but without human intervention. It is more efficient than conventional stochastic simulated annealing because it accumulates a probability density of good equivalent circuits which it subsequently uses to refine its statistical search for the best equivalent circuit     

Simplified Analysis of Coupled Transmission-Line Networks

A relatively simple method is presented for analyzing coupled transmission-line networks by using network graphs and graph transformations. The network graph symbolism is easy to draw and to manipulate. All the graphs consist only of inductor, capacitor, and transformer symbols, and straight lines, which represent unit elements. The method of analysis is illustrated by several two-wire-line and multiwire-line examples. Also presented are several new useful transmission-line transformations and a graph equivalent for the general coupled transmission-line network. The graph-transformation method has four principal advantages: 1) explicit open-wire-line equivalent circuits of coupled line networks can be obtained relatively easily and without knowledge of network synthesis techniques; 2) the form of equivalent circuits can often be obtained without using any algebra; 3) at each step of the analysis, a positive-real network in graph form is available; consequently, in many analysis problems several equivalent circuits for the same network are derived; and 4) multiport networks are as easily dealt with as two-port networks.     

晶体管放大器静态工作点稳定性的判定方法

面对在几个稳定静态工作点的电路中选择时,如何迅速判定各电路静态工作点稳定性能的优劣,是一个值得弄清的重要问题。本文给出了求出典型放大器偏置电路的戴维南等效电路,依此等效电路可直接看清电路工作时的物理意义,进一步判定各个放大电路静态工作点稳定性能的优劣。     

Equivalent circuit modeling of losses and dispersion in single andcoupled lines for microwave and millimeter-wave integrated circuits

Losses and dispersion in open inhomogeneous guided-wave structures such as microstrips and other planar structures at microwave and millimeter-wave frequencies and in MMICs (monolithic microwave integrated circuits) have been modeled with circuits consisting of ideal lumped elements and lossless TEM (transverse electromagnetic) lines. It is shown that, given a propagation structure for which numerical techniques to compute the propagation characteristics are available, an equivalent circuit whose terminal frequency and time-domain properties are the same as the structure can be synthesized. This is accomplished by equating the network functions of the given single or coupled line multiport with that of the model and extracting all the parameters of the equivalent circuit model by using standard parameters identification procedures. This model is valid over a desired frequency range and can be used to help design both analog and digital circuits consisting of these structures and other active and passive elements utilizing standard CAD (computer-aided design) programs. To validate the accuracy and usefulness of the models, results for a mismatched 50-Ω line in alumina and a high-impedance MMIC line stub are included     

A stuck fault model for dynamic CMOS combinational circuits

This paper utilizes the logic transistor function (LTF), that was devised to model the static CMOS combinational circuits at the transistor and logic level, to model the dynamic CMOS combinational circuits. The LTF is a Boolean representation of the circuit output in terms of its input variables and its transistor topology. The LTF is automatically generated using the path algebra technique. The faulty behavior of the circuit can be obtained from the fault-free LTF using a systematic procedure. The model assumes the following logic values (0, 1, I, M), where I, and M imply an indeterminate logical value, and a memory element, respectively. The model is found to be efficient in describing a cluster of dynamic CMOS circuits at both the fault-free and faulty modes of operation. Both single and multiple transistor stuck faults are precisely described using this model. The classical stuck-at and non classical stuck open and short faults are analyzed. A systematic procedure to produce the fault-free and faulty LTFs for different implementations of the dynamic CMOS combinational circuits is presented.     

Computer-Aided Determination of the Small-Signal Equivalent Network of a Bipolar Microwave Transistor

The actual technology for the production of transistors is now suitable for bipolar transistors in the 10-GHz range. In order to obtain amplifier circuits in this microwave range, the knowledge of the exact equivalent circuit is essential. A computer method for the determination of the equivalent network is given. The final application and accuracy are shown for a particular microwave transistor.     

Wavelet-Based Transistor Parameter Estimation

In this paper a wavelet-based parameter estimation method has been proposed for the common emitter transistor amplifier circuit and compared with the least squares method. As the maximal precision of simulation requires the modeling of electronic circuits in terms of device parameters and circuit components, the Volterra model of the common emitter amplifier circuit derived using the Ebers–Moll model and perturbation technique has been used for parameter estimation. The advantage of the proposed method is a smaller data storage requirement and accurate parameter estimation as compared to the least squares method because the wavelet method is adapted to time-frequency resolution.     

Transient analysis of junction transistors

The transient behavior of the surface barrier and diffused junction transistors may be represented by an equivalent network consisting of two diodes and a nonlinear base resistance. Expressions for the nonlinear resistance, the base-emitter voltage time response, and the collector current time response are derived and tested experimentally. The equivalent circuit allows us to predict hole storage time for direct-coupled transistor logic (DCTL) circuits.