Pseudomorphic AlGaAs/InGaAs/GaAs High Electron Mobility Transistors with Super Low Noise Performances of 0.41 dB at 18 GHz

Fully passivated low noise AlGaAs/InGaAs/GaAs pseudomorphic (PM) HEMT with wide head T-shaped gates were fabricated by dose split electron beam lithography (DSL). The dimensions of gate head and footprint were optimized by controlling the splitted pattern size, dose, and spaces of each pattern. We obtained stable T-shaped gate of 0.15 μm gate length with 1.35 μm-wide head. The maximum extrinsic transconductance was 560 mS/mm. The minimum noise figure measured at 18 GHz at V_ds = 2 V and I_ds = 17 mA was 0.41 dB with associated gain of 8.19 dB. At 12 GHz, the minimum noise figure and an associated gain were 0.26 and 10.25 dB, respectively. These noise figures are the lowest values ever reported for GaAs-based HEMTs. These results are attributed to the extremely low gate resistance of wide head T-shaped gate having a ratio of the head to footprint dimensions larger than 9.     

Electron-beam fabrication of GaAs low-noise MESFET's using a new trilayer resist technique

A LO/HI/LO resist system has been developed to produce sub-half-micrometer T-shaped cross section metal lines using e-beam lithography. The system provides T-shaped resist cavities with undercut profiles. T-shaped metal lines as narrow as 0.15 µm have been produced. GaAs MESFET's with 0.25-µm T-shaped Ti/Pt/Au gates have also been fabricated on MBE wafers using this resist technique. Measured end-to, end 0.25-µm gate resistance was 80 ω/mm, dc transconductance gmas high as 300 mS/mm was observed. At 18 GHz, a noise figure as low as 1.4 dB with an associated gain of 7.9 dB has also been measured. This is the lowest noise figure ever reported for conventional GaAs MESFET's at this frequency. These superior results are mainly attributed to the high-quality MBE material and the advanced T-gate fabrication technique employing e-beam lithography.     

Submicron T-shaped gate HEMT fabrication using deep-UV lithography

A new combination of low/high/low sensitivity tri-layer (PMMA/PMIPK/PMMA) resist system was used for deep UV lithography to-fabricate submicron T-shaped gate. Gate length as narrow as 0.2 μm is achieved. GaAs HEMTs with 0.3 μm T-shaped Ti/Pt/Au gate are fabricated using this technology. The HEMT demonstrated a 0.6 dB noise figure and 13 dB associated gain at 10 GHz. This deep UV lithography process provides a high throughput and low cost alternative to E-beam lithography for submicron T-gate fabrication     

Photo/EB hybrid exposure process for T-shaped gate superlow-noise HEMTs

A process for fabricating T-shaped gates using photo/EB hybrid exposure has been developed. This process is suitable for mass production of high performance HEMTs. A 0.2 mu m T-shaped gate HEMT exhibits very low noise figures of 0.40 and 1.1 dB at 12 and 40 GHz, respectively, and high reliability.<>     

Extremely low-noise performance of GaAs MESFETs with wide-headT-shaped gate

Fully ion-implanted low-noise GaAs MESFETs with a 0.11-μm Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeter-wave integrated circuits (MMICs). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (L_h) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold's method. A current gain cutoff frequency (f_T) and a maximum stable gain (MSG) decrease monotonously as L_h increases on account of parasitic capacitance. However, the device with L_h of 1.0 μm, which has lower gate resistance than 1.0 Ω, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMT's     

Metamorphic In0.4Al0.6As/In0.4Ga0.6As HEMTs on GaAs substrate

New In_0.4Al_0.6As/In_0.4Ga_0.6 As metamorphic (MM) high electron mobility transistors (HEMTs) have been successfully fabricated on GaAs substrate with T-shaped gate lengths varying from 0.1 to 0.25 μm. The Schottky characteristics are a forward turn-on voltage of 0.7 V and a gate breakdown voltage of -10.5 V. These new MM-HEMTs exhibit typical drain currents of 600 mA/mm and extrinsic transconductance superior to 720 mS/mm. An extrinsic current cutoff frequency f_T of 195 GHz is achieved with the 0.1-μm gate length device. These results are the first reported for In_0.4 Al_0.6As/In_0.4Ga_0.6As MM-HEMTs on GaAs substrate     

High microwave and ultra-low noise performance of fullyion-implanted GaAs MESFETs with Au/WSiN T-shaped gate

Fully ion-implanted n⁺ self-aligned GaAs MESFETs with high microwave and ultra-low-noise performance have been fabricated. T-shaped gate structures composed of Au/WSiN are employed to reduce gate resistance effectively. A very thin and high-quality channel with high carrier concentration can be formed by adopting the optimum annealing temperature for the channel, and the channel surface suffers almost no damage by using ECR plasma RIE for gate formation. GaAs MESFETs with a gate length as short as 0.35 μm demonstrated a maximum oscillation frequency of 76 GHz. At an operating frequency of 18 GHz, a minimum noise figure of 0.81 dB with an associated gain of 7.7 dB is obtained. A K_f factor of 1.4 estimated by Fukui's noise figure equation, which is comparable to those of AlGaAs/GaAs HEMTs with the same geometry, reveals that the quality of the channel is very high     

Ku波段20W GaAs功率PHEMT

报道了采用介质辅助T型栅工艺研制的GaAs功率PHEMT.在该T型栅工艺中栅长和栅帽的尺寸分别进行控制,实现了较好的工艺可控性和较高的工艺成品率.采用该工艺制作了总栅宽为19.2mm的功率PHEMT.用两枚这种芯片合成并研制的Ku波段内匹配功率管在14.0～14.5GHz频带内,输出功率大干20W,功率增益大于6dB,典型功率附加效率为31%.     

Low noise ion-implanted InP FET's

Ion-implanted one micron gate length InP FET's are described with noise figures as low as 3.5 dB at 12 GHz. This is the lowest published noise figure for InP FET's. The InP FET microwave performance data are compared with those of equivalent geometry GaAs FET's with either ion implanted or epitaxial channels. Microwave results indicate a definite gain advantage of InP FET's over these GaAs counterparts. Noise figures of both types of FET's are comparable but InP substrate improvement and implant profile optimization are suggested as a means of further reduction of the noise figure of InP FET's.     

Super low-noise HEMTs with a T-shaped WSix gate

A T-shaped quarter-micron gate structure composed of WSi_x /Ti/Pt/Au has been developed for low-noise AlGaAs/GaAs HEMTs. The gate resistance R_g was reduced to 0.3 Ω for devices with 200 μm-wide gates despite using WSi_x, and the source resistance R_s reached 0.28 Ω mm by minimising the source-gate distance using a self-alignment technique. This HEMT exhibited the lowest reported noise figure of 0.54 dB with an associated gain of 12.1 dB at 12 GHz     

采用移相掩模技术制作深亚微米“T”型栅

介绍了在GaAs器件制作中,如何提高光刻细线条加工能力、制作深亚微米"T"型栅的工艺技术。该技术采用投影光刻和负性化学放大光刻胶,制作出0.18μm的"T"型栅GaAs PHEMT器件,栅光刻工艺采用了分辨率增强移相掩模技术。根据曝光工具简单介绍了当前GaAs器件中"T"型栅主要制作方法,讨论了"T"型栅制作中所使用的移相掩模原理以及该技术应用于GaAs器件制作的优势,并介绍了工艺制作过程。给出了所制作的"T"型栅扫描电镜剖面照片,并进一步试验、讨论和分析了采用该种移相掩模版进行光刻时所遇到的主要困难及解决方向。     

High-frequency noise of InyGa1?yAs/AlxGa1?xAs MODFETs and comparison to GaAs/AlxGa1?xAs MODFETs

Noise parameter measurements for recently developed 1 ?m gate InyGa1?yAs/Al0.15Ga0.85As MODFETs have been performed at 8 GHz at room and cryogenic temperatures. Owing to the relatively small Cgs/?gm ratio in these devices compared to identical conventional GaAs/AlGaAs MODFETs, both room- and cryogenic temperature noise figures have been reduced. In addition, the light sensitivity and drift in noise figure at cryogenic temperatures observed in conventional GaAs/AlGaAs MODFETs have been sub stantially reduced.     

A new self-aligned GaAs FET with a Mo/WSixT-gate

An n+-layer and ohmic electrode self-aligned (NOSA) GaAs FET is a new self-aligned GaAs FET in which n⁺-layers and ohmic contacts in the source and the drain regions are self-aligned to a T-shaped gate formed with Mo and WSix(≈0.6) double layers. Using the NOSA FET structure, the device area can be easily reduced because no alignment margin is needed. The fabricated FET's exhibit a transconductance gmof 170 mS/mm.     

GaAs MESFET's by molecular beam epitaxy

The noise performance of "T" shaped Ti/W/Au gate GaAs Schottky-barrier field-effect transistors fabricated on channel layers grown by molecular-beam epitaxy (MBE) is reported. The nominal gate length was about 0.7 µm with a total gate width of 250 µm. Typical noise figure and the associated gain were 1.2 and 14 dB at 4 GHz, and 1.9 and 8.5 dB at 12 GHz. To out knowledge these are the best results reported to date on devices fabricated using MBE-grown GaAs. These preliminary results show the promise of MBE for high-quality GaAs FET's.     

A new low-noise AlGaAs/GaAs 2DEG FET with a surface undoped layer

A high-performance N-AlGaAs/GaAs selectively doped two-dimensional electron gas (2DEG) FET with a surface undoped layer has been designed and demonstrated. Simple analysis based on the short-channel approximation revealed that an increase in a total layer thickness between a gate electrode and 2DEG at a hetero-interface results in a higher cutoff frequency and a lower noise figure than conventional 2DEG FET's. This is because the gate capacitance can be markedly reduced without a significant decrease in the transconductance owing to a parasitic source resistance. The surface undoped layer intentionally employed in this work can permit the total layer thickness to increase, i.e., the gate capacitance to reduce, without changes in the 2DEG density and in the source resistance. This structure also gives high gate breakdown voltage because of a small neutral region in n- (AlGa)As and a low surface electron field, which possibly yields excellent performance 2DEG FET's for practical use. Fabricated (AlGa)As/ GaAs 2DEG FET's exhibited noticeable room-temperature performances of 0.95-dB noise figure with 10.3-dB associated gain at 12- and 45-GHz cutoff frequency. These are the best data ever reported for 0.5-µm gate length FET's.     

Analysis of issues in gate recess etching in the InAlAs/InGaAs HEMT manufacturing process

We have developed an InAlAs/InGaAs metamorphic high electron mobility transistor device fabrication process where the gate length can be tuned within the range of 0.13 μm–0.16 μm to suit the intended application. The core processes are a two-step electron-beam lithography process using a three-layer resist and gate recess etching process using citric acid. An electron-beam lithography process was developed to fabricate a T-shaped gate electrode with a fine gate foot and a relatively large gate head. This was realized through the use of three-layered resist and two-step electron beam exposure and development. Citric acid-based gate recess etching is a wet etching, so it is very important to secure etching uniformity and process reproducibility. The device layout was designed by considering the electrochemical reaction involved in recess etching, and a reproducible gate recess etching process was developed by finding optimized etching conditions. Using the developed gate electrode process technology, we were able to successfully manufacture various monolithic microwave integrated circuits, including low noise amplifiers that can be used in the 28 GHz to 94 GHz frequency range.     

Noise performance of low power 0.25 micron gate ion implantedD-mode GaAs MESFET for wireless applications

We report on the noise performance of low power 0.25 μm gate ion implanted D-mode GaAs MESFETs suitable for wireless personal communication applications. The 0.25 μm×200 μm D-mode MESFET has a f_t of 18 GHz and f_max of 33 GHz at a power level of 1 mW (power density of 5 mW/mm). The noise characteristics at 4 GHz for the D-mode MESFET are F_min=0.65 dB and G_assoc =13 dB at 1 mW. These results demonstrate that the GaAs D-mode MESFET is also an excellent choice for low power personal communication applications     

Gate-source-drain architecture impact on DC and RF performance of sub-100-nm elevated source/drain NMOS transistors

It has been known that using selective epitaxial growth (SEG) of silicon, to elevate source/drain regions, is beneficial to digital CMOS by reducing the junction leakage. In addition, this architecture also reduces the gate resistance by enabling a T-shape gate and allowing thicker silicides, which is beneficial for RF-CMOS regarding increased maximum oscillation frequency (f/sub max/) and lowering of the noise figure (NF). In this paper, we report the impact of the SEG-deep source/drain implant (DSDI) process sequence and Co silicide thickness on DC and RF performance of NMOS transistors. Up to a 28%-45% improvement in f/sub max/ is achievable due to a T-shaped gate and thicker Co, made possible by an elevated source/drain (/sup E/S/D) architecture. The maximum transconductance (g/sub m/) of the /sup E/S/D device reaches a value of 1100 mS/mm, which in turn gives a very high f/sub T/ of 150 GHz. The low gate sheet resistance obtained with this architecture is also very beneficial for suppressing noise figure in the low-noise amplifier (LNA) circuit demonstrated in this paper. Furthermore, it is shown by simulation that the noise performance of an RF LNA improves due to the SEG and the Co thickness in the T-shaped gate of the NMOS transistor.     

0.15 μm T-shaped gate fabrication for GaAs MODFET using phaseshift lithography

A new fabrication process of GaAs MODFETs with 0.15 micron T-shaped gate has been developed by using phase shift lithography. Sub-quarter micron footprints of T-shaped gates are defined as line patterns by PEL (pattern-edge line) method using chemically stable positive photoresist. Parasitic capacitances such as C_gs and C_gd are also reduced by the air-gap incorporated in the present process. An implemented GaAs MODFET exhibited the NF of 0.36 dB and the gain of 11.5 dB at the frequency of 12 GHz     

24—38 GHz GaAs单片低噪声放大器的研制

介绍了24～38GHz低噪声放大器MMIC的研制。分析了微波晶体管放大器的噪声特性,针对噪声系数和增益,利用软件进行电路仿真优化和电磁场分析,设计制作电路版图,在标准3 in GaAs工艺线进行工艺制作。采用电子束制作0．20μm“T”形栅,利用选择腐蚀的方法准确控制有源器件的Idss和Vp,微波测试结果为在频带内的噪声系数小于3．8dB,小信号增益大于13dB,增益平坦度小于±0．6dB,输入和输出驻波比小于2：1．微波性能与NORTHROP GRUMMAN公司的同类产品ALH140C的水平相当。