Carrier Transportation Mechanism of the $hbox{TaN}/ hbox{HfO}_{2}/hbox{IL}/hbox{Si}$ Structure With Silicon Surface Fluorine Implantation

In this paper, the current transportation mechanism of HfO₂ gate dielectrics with a TaN metal gate and silicon surface fluorine implantation is investigated. Based on the experimental results of the temperature dependence of gate leakage current and Fowler-Nordheim tunneling characteristics at 77 K, we have extracted the current transport mechanisms and energy band diagrams for TaN/HfO₂/IL/Si structures with fluorine incorporation, respectively. In particular, we have obtained the following physical quantities: 1) fluorinated and as-deposited interfacial layer (IL)/Si barrier heights (or conduction band offsets) at 3.2 and 2.7 eV; 2) TaN/fluorinated and as-deposited HfO₂ barrier heights at 2.6 and 1.9 eV; and 3) effective trapping levels at 1.25 eV (under both gate and substrate injections) below the HfOF conduction band and at 1.04 eV (under gate injection) and 1.11 eV (under substrate injection) below the HfO₂ conduction band, which contributes to Frenkel-Poole conduction.     

Current transport in metal/hafnium oxide/silicon structure

Based on the experimental results of the temperature dependence of gate leakage current and Fowler-Nordheim tunneling characteristics at 77 K, we have extracted the energy band diagrams and current transport mechanisms for metal/HfO₂/Si structures. In particular, we have obtained the following quantities that will be useful for modeling and simulation: i) HfO₂/Si conduction band offset (or barrier height): 1.13 ± 0.13 eV; ii) Pt/HfO₂ barrier height: ~ 2.48 eV; iii) Al/HfO₂ barrier height: ~ 1.28 eV; iv) electron effective mass in HfO₂: 0.1 m_o, where m_o is the free electron mass and v) a trap level at 1.5 ± 0.1 eV below the HfO₂ conduction band which contributes to Frenkel-Poole conduction     

Full-Band Tunneling in High-κ Oxide MOS Structures

In this paper, we investigate the tunneling properties of ZrO₂ and HfO₂ high-k oxides, by applying quantum mechanical methods that include the full-band structure of Si and oxide materials. Semiempirical sp³s*d tight-binding parameters have been determined to reproduce ab-initio band dispersions. Transmission coefficients and tunneling currents have been calculated for Si/ZrO₂/Si and Si/HfO₂/Si MOS structures, showing a very low gate leakage current in comparison to SiO₂-based structures with the same equivalent oxide thickness. The complex band structures of ZrO₂ and HfO₂ have been calculated and used to develop an energy-dependent effective tunneling mass model. We show that effective mass calculations based on this model yield tunneling currents in close agreement with full-band results.     

AlGaN/GaN MOS-HEMT With $hbox{HfO}_{2}$ Dielectric and $hbox{Al}_{2}hbox{O}_{3}$ Interfacial Passivation Layer Grown by Atomic Layer Deposition

We have developed a novel AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor using a stack gate HfO₂/Al₂O₃ structure grown by atomic layer deposition. The stack gate consists of a thin HfO₂ (30-A) gate dielectric and a thin Al₂O₃ (20- A) interfacial passivation layer (IPL). For the 50-A stack gate, no measurable C-V hysteresis and a smaller threshold voltage shift were observed, indicating that a high-quality interface can be achieved using a Al₂O₃ IPL on an AlGaN substrate. Good surface passivation effects of the Al₂O₃ IPL have also been confirmed by pulsed gate measurements. Devices with 1- mum gate lengths exhibit a cutoff frequency (fT) of 12 GHz and a maximum frequency of oscillation (f _MAX) of 34 GHz, as well as a maximum drain current of 800 mA/mm and a peak transconductance of 150 mS/mm, whereas the gate leakage current is at least six orders of magnitude lower than that of the reference high-electron mobility transistors at a positive gate bias.     

Fluorine Passivation in Gate Stacks of Poly-Si/TaN/HfO2 (and HfSiON/HfO2)/Si Through Gate Ion Implantation

Fluorine passivation in poly-Si/TaN/HfO₂/p-Si and poly-Si/TaN/HfSiON/HfO₂/p-Si gate stacks with varying TaN thickness through gate ion implantation has been studied. It has been found that when TaN thickness was less than 15 nm, mobility and subthreshold swing improved significantly in HfO₂ nMOSFETs; while there was little performance improvement in HfSiON/HfO₂ nMOSFETs due to the blocking of F atoms by the HfSiON layer in gate dielectrics, as has been proved by the electron energy loss spectroscopy mapping     

High-Performance Metal-Induced Laterally Crystallized Polycrystalline Silicon P-Channel Thin-Film Transistor With $hbox{TaN/HfO}_{2}$ Gate Stack Structure

In this letter, high-performance low-temperature poly-Si p-channel thin-film transistor with metal-induced lateral- crystallization (MILC) channel layer and TaN/HfO₂ gate stack is demonstrated for the first time. The devices of low threshold voltage V_TH ~ 0.095 V, excellent subthreshold swing S.S. ~83 mV/dec, and high field-effect mobility mu_FE ~ 240 cm²/V ldr s are achieved without any defect passivation methods. These significant improvements are due to the MILC channel film and the very high gate-capacitance density provided by HfO₂ gate dielectric with the effective oxide thickness of 5.12 nm.     

Tunneling Effective Mass of Electrons in Lightly N-Doped $hbox{SiO}_{x} hbox{N}_{y}$ Gate Insulators

In this paper, we study the dependence of the tunneling effective mass of electrons on gate dielectric nitrogen concentration and thickness in MOSFETs with lightly doped silicon oxynitride $(hbox{SiO}_{x}hbox{N}_{y})$ gates. The direct tunneling current is modeled by applying a SchrÖdinger–Poisson solver with one-side-open boundary condition. The dependences of the effective mass on nitrogen concentration and dielectric thickness are extracted by fitting the computation results for the gate leakage current to the experimental data that we measured for samples with different thicknesses and nitrogen concentrations. Nitrogen concentration and thickness of samples are determined using X-ray photoemission spectroscopy. The obtained results show a strong dependence of the effective mass on the sample thicknesses and nitrogen concentration. The electron effective mass is found to increase as the thickness decreases, and the higher nitrogen concentration causes a reduction in effective mass.      

Modeling of Tunnelling Currents in Hf-Based Gate Stacks as a Function of Temperature and Extraction of Material Parameters

In this paper, we show that through electrical characterization and detailed quantum simulations of the capacitance-voltage and current-voltage (I-V) characteristics, it is possible to extract a series of material parameters of alternative gate dielectrics. We have focused on HfO₂ and HfSi_XO_YN_Z gate stacks and have extracted information on the nature of localized states in the dielectric responsible for a trap-assisted tunneling (TAT) current component and for the temperature behavior of the I-V characteristics. Simulations are based on a one-dimensional Poisson-Schroumldinger solver capable to provide the pure tunneling current and TAT component. Energy and capture cross section of traps responsible for TAT current have been extracted     

Improved Electrical Properties of Ge p-MOSFET With $ hbox{HfO}_{2}$ Gate Dielectric by Using $hbox{TaO}_{x} hbox{N}_{y}$ Interlayer

The electrical characteristics of germanium p-metal-oxide-semiconductor (p-MOS) capacitor and p-MOS field-effect transistor (FET) with a stack gate dielectric of HfO₂/TaOxNy are investigated. Experimental results show that MOS devices exhibit much lower gate leakage current than MOS devices with only HfO₂ as gate dielectric, good interface properties, good transistor characteristics, and about 1.7-fold hole-mobility enhancement as compared with conventional Si p-MOSFETs. These demonstrate that forming an ultrathin passivation layer of TaOxNy on germanium surface prior to deposition of high-k dielectrics can effectively suppress the growth of unstable GeOx, thus reducing interface states and increasing carrier mobility in the inversion channel of Ge-based transistors.     

Determination of Work Functions in the $hbox{Ta}_{1 - x}hbox{Al}_{x}hbox{N}_{y}/hbox{HfO}_{2}$ Advanced Gate Stack Using Combinatorial Methodology

Combinatorial methodology enables the generation of comprehensive and consistent data sets, compared with the ldquoone-composition-at-a-timerdquo approach. We demonstrate, for the first time, the combinatorial methodology applied to the work function (Phi_m) extraction for Ta_1-xAl_xN_y alloys as metal gates on HfO₂, for complementary metal-oxide-semiconductor applications, by automated measurement of over 2000 capacitor devices. Scanning X-ray microdiffraction indicates that a solid solution exists for the Ta_1-xAl_xN_y libraries for 0.05 les x les 0.50. The equivalent oxide thickness maps offer a snapshot of gate stack thermal stability, which show that Ta_1-xAl_xN_y alloys are stable up to 950^degC . The Phi_m of the Ta_1-xAl_xN_y libraries can be tuned as a function of gate metal composition over a wide (0.05 les x les 0.50) composition range, as well as by annealing. We suggest that Ta_0.9Al_0.1N_1.24 gate metal electrodes may be useful for p-channel metal-oxide-semiconductor applications.     

Characteristics of Self-Aligned Gate-First Ge p- and n-Channel MOSFETs Using CVD HfO2 Gate Dielectric and Si Surface Passivation

The electrical properties of p- and n-MOS devices fabricated on germanium with metal-organic chemical-vapor-deposition HfO₂ as gate dielectric and silicon passivation (SP) as surface treatment are extensively investigated. Surface treatment prior to high-K deposition is critical to achieve small gate leakage currents as well as small equivalent oxide thicknesses. The SP provides improved interface quality compared to the treatment of surface nitridation, particularly for the gate stacks on p-type substrate. Both Ge p- and n-MOSFETs with HfO₂ gate dielectrics are demonstrated with SP. The measured hole mobility is 82% higher than that of the universal SiO₂/Si system at high electric field (~0.6 MV/cm), and about 61% improvement in peak electron mobility of Ge n-channel MOSFET over the CVD HfO₂ /Si system was achieved. Finally, bias temperature-instability (BTI) degradation of Ge MOSFETs is characterized in comparison with the silicon control devices. Less negative BTI degradation is observed in the Ge SP p-MOSFET than the silicon control devices due to the larger valence-band offset, while larger positive BTI degradation in the Ge SP n-MOSFET than the silicon control is characterized probably due to the low-processing temperature during the device fabrication     

The Effect of an Yttrium Interlayer on a Ni Germanided Metal Gate Workfunction in SiO2/HfO2

In this letter, the tuning of a nickel fully germanided metal gate effective workfunction via a hyperthin yttrium (Y) interlayer at the bottom of the metal electrode was demonstrated on both SiO₂ and HfO₂. By varying the Y interlayer thickness from 0 to 9.6 nm, a full range of workfunction tuning from 5.11 to 3.65 eV has been achieved on NiGeY/SiO₂ stacks. It was also found that the chemical potential of the material that is adjacent to the gate electrode/gate insulator plays an important role in the determination of the effective workfunction. This work-function tuning window was observed to decrease to a range of 5.08-4.25 eV on NiGeY/HfO₂ stacks.     

High Mobility Strained Ge pMOSFETs With High-κ/Metal Gate

Compressively strained Ge long channel ring-type pMOSFETs with high-kappa Si/SiO₂/HfO₂/TiN gate stacks are fabricated on Si_0.2Ge_0.8 virtual substrates. Effective oxide thickness is approximately 1.4 nm with low gate leakage current. A peak hole mobility of 640 cm²/ Vldrs and up to a four times enhancement over the Si/SiO₂ universal curve are observed. Parasitic conduction within the Si-cap layers degrades the mobility at large vertical fields, although up to a 2.5 times enhancement over universal remains at a field of 0.9 MV/cm.     

Structural and electrical properties of HfO2 with topnitrogen incorporated layer

A novel technique to control the nitrogen profile in HfO₂ gate dielectric was developed using a reactive sputtering method. The incorporation of nitrogen in the upper layer of HfO₂ was achieved by sputter depositing a thin Hf_xN_y layer on HfO₂, followed by reoxidation. This technique resulted in an improved output characteristics compared to the control sample. Leakage current density was significantly reduced by two orders of magnitude. The thermal stability in terms of structural and electrical properties was also enhanced, indicating that the nitrogen-doped process is effective in preventing oxygen diffusion through HfO₂. Boron penetration immunity was also improved by nitrogen-incorporation. It is concluded that the nitrogen-incorporation process is a promising technique to obtain high-k dielectric with thin equivalent oxide thickness and good interfacial quality     

Polarity dependent gate tunneling currents in dual-gate CMOSFETs

Polarity dependence of the gate tunneling current in dual-gate CMOSFETs is studied over a gate oxide range of 2-6 nm. It is shown that, when measured in accumulation, the I_g versus V_g characteristics for the p⁺/pMOSFET are essentially identical to those for the n⁺/nMOSFET; however, when measured in inversion, the p⁺/pMOSFET exhibits much lower gate current for the same |V_g|. This polarity dependence is explained by the difference in the supply of the tunneling electrons. The carrier transport processes in p⁺/pMOSFET biased in inversion are discussed in detail. Three tunneling processes are considered: (1) valence band hole tunneling from the Si substrate; (2) valence band electron tunneling from the p⁺-polysilicon gate; and (3) conduction band electron tunneling from the p⁺-polysilicon gate. The results indicate that all three contribute to the gate tunneling current in an inverted p⁺/pMOSFET, with one of them dominating in a certain voltage range     

Transient Charging and Discharging Behaviors of Border Traps in the Dual-Layer HfO2/SiO2 High- κ Gate Stack Observed by Using Low-Frequency Charge Pumping Method

Transient charging and discharging of border traps in the dual-layer HfO₂/SiO₂ high-kappa gate stack have been extensively studied by the low-frequency charge pumping method with various input pulse waveforms. It has been demonstrated that the exchange of charge carriers mainly occurs through the direct tunneling between the Si conduction band states and border traps in the HfO₂ high-kappa dielectric within the transient charging and discharging stages in one pulse cycle. Moreover, the transient charging and discharging behaviors could be observed in the time scale of 10^-8- 10^-4 s and well described by the charge trapping/detrapping model with dispersive capture/emission time constants used in static positive bias stress. Finally, the frequency and voltage dependencies of the border trap area density could also be transformed into the spatial and energetic distribution of border traps as a smoothed 3-D mesh profiling     

Electrical Properties of Low-Temperature-Compatible P-Channel Polycrystalline-Silicon TFTs Using High-$kappa$ Gate Dielectrics

In this paper, we describe a systematic study of the electrical properties of low-temperature-compatible p-channel polycrystalline-silicon thin-film transistors (poly-Si TFTs) using HfO₂ and HfSiO_x, high-k gate dielectrics. Because of their larger gate capacitance density, the TFTs containing the high-k gate dielectrics exhibited superior device performance in terms of higher I_on/I_off current ratios, lower subthreshold swings (SSs), and lower threshold voltages (V_th), relative to conventional deposited-SiO₂, albeit with slightly higher OFF-state currents. The TFTs incorporating HfSiO_x, as the gate dielectric had ca. 1.73 times the mobility (mu_FE) relative to that of the deposited-SiO₂ TFTs; in contrast, the HfO₂ TFTs exhibited inferior mobility. We investigated the mechanism for the mobility degradation in these HfO₂ TFTs. The immunity of the HfSiO_x, TFTs was better than that of the HfO₂ TFTs-in terms of their V_th shift, SS degradation, mu_FE degradation, and drive current deterioration-against negative bias temperature instability stressing. Thus, we believe that HfSiO_x, rather than HfO₂, is a potential candidate for use as a gate-dielectric material in future high-performance poly-Si TFTs.     

$hbox{HfO}_{2}$–III-Nitride RF Switch With Capacitively Coupled Contacts

We report on the first metal-oxide-semiconductor AlGaN/GaN radio-frequency (RF) switch with capacitively coupled contacts using a HfO₂ layer as the gate dielectric and surface passivation layer. The new insulating-gate RF switch has a lower leakage current and can handle higher RF powers than AlGaN/GaN HFET switches.     

Large enhancement of interband tunneling current densities of over105 A/cm2 inIn0.53Ga0.47As-based surface tunnel transistors

In_0.53Ga_0.47As-based Surface Tunnel Transistors (STT's), which control an interband tunneling current between an n-type channel and a p-type drain by an insulated gate, are investigated with the goal of increasing the tunneling current-density for high-speed operation. The fabricated devices enhanced an interband tunneling current density by a factor of 10² compared to the conventional GaAs-STT's due to a smaller bandgap energy and a lighter electron effective mass, and exhibited a clear gate-controlled negative differential resistance (NDR) characteristics with maximum tunneling current densities of over 10⁵ A/cm². The cutoff frequency (F_T) and maximum oscillation frequency (f_max ) of a fabricated device with a 1.0-μm gate length were estimated to be 7.9 GHz and 20 GHz, respectively, in the NDR region