Memristor interpretations based on constitutive relations

The attractive memristor is interpreted based on its constitutive relation. The memory property of the memristor is explained, along with the explanation on its three fingerprints: (1) Pinched hysteresis loop; (2) Hysteresis lobe area decreases as frequency increases; (3) Pinched hysteresis loop shrinks to a single-valued function at infinite frequency. Where the magnetic flux is in Strukov’s memristor is also introduced. Resistive elements including the memristor are taken as an example to argue that the constitutive relation determines the electrical property of a circuit element and diagram method is used to distinguish different elements in the resistive element series.     

忆阻器的建模及高精度忆阻值读写电路的设计

使用现有电路元件设计了一种荷控忆阻器的理论模型。由于把忆阻器应用于存储器、神经网络、信号处理等领域均涉及到忆阻器的读写操作,并且目前忆阻器大多是数字量0和1的操作,没有模拟量的操作。所以利用了荷控忆阻器的电荷特性,给出一种描述如何读取忆阻器的模拟忆阻值的方法。利用了荷控忆阻器的频率特性,设计了一个反馈式忆阻值写电路,该电路能够在忆阻器的阻态范围内进行任意模拟量的写操作。仿真结果验证了设计的正确性。     

非对称忆阻诱导的吸引子非对称演化与机理研究

紧磁滞回线是评测物理器件或数学模型是否为忆阻的关键依据,其对称特性也是忆阻的重要特征之一。该文提出一种有源非对称忆阻二极管桥模拟器,它通过改变二极管桥中并联二极管的数量可实现紧磁滞回线非对称度的控制。首先,验证了该非对称忆阻模拟器的指纹特征,并着重探讨了激励频率和对称度控制参数对紧磁滞回线非对称度的影响。进一步地,将该非对称忆阻模拟器耦合到Sallen-Key高通滤波器,构建了一种无感忆阻蔡氏电路;建立了相应的无量纲系统,并揭示了系统吸引子的非对称演化现象。结合平衡点稳定性分析、分岔分析和多吸引子状态初值空间分布,阐明了吸引子非对称演化的产生机理。结果表明,受非对称忆阻的影响,无感忆阻蔡氏电路的两个不稳定鞍焦点失去平衡,导致了非对称共存分岔、多稳定模态等行为的产生。最后,由硬件电路实验验证了理论分析与数值仿真的正确性。     

一种新型双忆阻混沌系统动力学及其电路实现研究

在经典的蔡氏混沌电路基础上,引入三次非线性磁控忆阻模型,利用一个磁控忆阻模型和一个荷控忆阻模型,外加一个负电导替换变形蔡氏电路中的蔡氏二极管,设计了一个五阶混沌电路,用常规的方法研究系统的基本动力学特性。通过数值仿真结果表明电路在参数变化情况下能产生Hopf分岔和反倍周期分岔两种分岔行为,并能产生双涡卷、单涡卷、极限环、同宿轨等不同轨道,出现了双单摆运动。观察混沌吸引子推广到功率与能量信号,观察到蝴蝶翅膀重叠的奇异吸引子。通过改变初始值,能产生共存吸引子和周期极限环共存现象。为了验证电路的混沌行为,将对设计的电路进行了PSpice仿真,电路仿真结果验证了理论分析的正确性。     

二端变类器实现忆阻元件

忆阻元件是由蔡少棠先生根据对称原理推测出的第四种基本电路元件。变类器是线性二端口类型变换器的统称。它的作用是把电路元件从一种类型转变为另一种类型。本文根据忆阻元件的一般特性,介绍了利用二端变类器实现忆阻元件的状态方程,并利用第1型R—M变类器和第Ⅱ型R—M变类器和电阻元件结合,给出了可以表征忆阻元件特性的电路原理模型图。     

蔡氏混沌电路在Multisim软件中的设计与仿真

经典的蔡氏电路是一个简单混沌电路,能够产生丰富的混沌现象,然而该电路的系统参数基本上是固定的,不同混沌电路之间的电路不具备通用性。基于此,本文提出在Multisim仿真软件上通过模块化的设计方法重构蔡氏混沌电路,利用常见的运算放大器、电阻、电容电子元件组成混沌系统的线性部分,着重介绍了如何利用多个二极管实、运放等实现复杂绝对值非线性函数,并给出蔡氏混沌电路相应的硬件仿真结果。     

A new DDCC based memristor emulator circuit and its applications

Memristor is a new passive circuit element. The interaction of the memristor with other circuit elements is important for designers. In this paper, new memristor emulator circuit is designed using DDCC (differential difference current conveyor) based on CMOS. It is realized that the proposed emulator causes less complexity compared to other designed emulator circuits. Compatibility of memristor with CMOSs and its operation ability at high frequencies are very important for circuit design based on memristor. The emulator based on CMOS can manage to provide these two fundamental properties successfully. In order to test the proposed emulator, it is connected to memristor with both ways, serial and parallel, than MC circuit is analyzed and results are shown at the end of the paper.     

忆阻元件的研究进展

忆阻元件是一种联系电荷和磁链之间关系的新的无源电路元件,可以称其为第四类基本电路元件。本文首先介绍了忆阻元件的概念、基本模型及其数学表示方法,然后介绍了目前国内外的研究现状。国内研究主要集中于忆阻元件的数学模性、特性及与其它元件组成的简单电路的性能;国外的研究主要集中于忆阻元件在各方面的潜在应用以及由忆阻概念进一步推测忆容和忆感元件及其系统。     

Memristive retinomorphic grid architecture removing noise and preserving edge

In this paper, special memristor circuit and memristive retina network structure for analogue image processing have been presented. The new developments on memristor element have opened various possibilities due to its being in nano-scale and having nonlinear behavior. The proposed memristor emulator consists of only one Operational Transconductance Amplifier (OTA) and two MOS transistors which are operated in sub-threshold region. The memristor fuse structure is obtained by connecting two proposed memristor emulators. In the second section of our paper, we proposed a circuit block which is composed of 16 × 16 pixels retinomorphic memristive grid to maintain a smoothed and edges preserved image. All simulation results for both proposed memristor circuits and retinomorphic grid are obtained as expected.     

A new memristor emulator and its application in digital modulation

Since its inception many proposals and attempts have been reported on using the memristor in digital signal processing (DSP) circuits. Memristor-based DSP applications are mainly focusing on improving the performance of memories and in realizing synapses in neural networks. In most of the reported applications the verification of the proposed DSP circuits is made using mathematical-based memristor models. In this paper a new circuit for practical emulation of the memristor and its applications in memristor-based digital modulation is experimentally investigated.     

基于双曲正切忆阻器的Duffing系统中簇发、共存分析及其DSP实现

忆阻器作为第4种基本电路元件由蔡少棠首次提出,它的提出为混沌电路的设计和工程应用提供了新思路。该文通过在Homles型Duffing系统中引入一个双曲正切忆阻模型,得到了一个新忆阻Duffing非自治系统。利用转换相图、相图、Lyapunov指数等,揭示了该系统具有振荡尖峰数目可控簇发、非完全对称双边簇发、非完全对称的簇发共存、多种周期混沌共存等新颖动力学行为。并通过分岔图及平衡点分析,研究了其簇发产生机理。采用Multisim电路仿真与数字信号处理平台(DSP)对系统进行了硬件实现,与理论分析基本一致的实验结果证明该系统是可行的且是物理可实现的。     

电流激励蔡氏电路混沌的解析预测

考虑到蔡氏电路受周围电路的影响,故将受周围影响的蔡氏电路做了等效处理,并将其等效为电流激励蔡氏电路。这里首次用解析的方法对三阶非线性微分方程能够产生混沌的参数范围进行预测,利用该方法得出电流激励蔡氏电路产生混沌的必要参数条件。通过数值仿真证明了该等效电路具有极其丰富的混沌动力学行为,仿真结果与解析预测结果有较好的吻合性。     

Macromodeling of the memristor using piecewise volterra series

The memristor, as the fourth basic passive circuit element, was first demonstrated using a TiO₂ layer sandwiched between two platinum electrodes forming a crossbar architecture by researchers at the Hewlett-Packard laboratories in 2008. The memristor is the nonlinear passive nano electronic device and holds great promise for a wide range of potential applications, because of its unique nonvolatile characteristic and memory effect. In this paper, the piecewise Volterra series macromodeling method was proposed for memristor, taking account of the nonlinear and memory effect. First several thresholds were set in the input signal amplitude according to the memristor characteristics, and the input signal was decomposed into several sub-signals using these thresholds. Then each sub-signal was processed separately by piecewise Volterra Kernels, and finally recombined together to produce the output. The experimental results and performance data demonstrate that the proposed method is efficient and precise.     

一种基于多态忆阻器的电压型神经网络电路

提出了一种基于多态忆阻器的神经网络电路硬件实现方法。采用2⁸ bit的惠普忆阻模型来构建存储权重的双忆阻稳定结构,结合了低功耗轨到轨运放技术以及寄存器技术,设计了模值与极性分离的绝对值电路,以及以忆阻器为核心、可进行正负浮点数运算的权值网络矩阵电路。通过Verilog-A编写激活单元,实现了多层忆阻神经网络。该电路采用并行输入和模拟信号处理方式,控制简单,无需中间数据缓存。实验结果表明,该方法有效提升了以忆阻器为核心的人工神经网络的稳定性和运行效率。     

基于二极管的限幅蔡氏电路实验研究

根据经典蔡氏电路的数学模型,获得系统各个变量之间的运算关系,利用运算放大器、电阻、电容及二极管等元器件,完成非线性限幅函数的电路设计,实现无电感元件的等效蔡氏电路硬件实验图。结果表明,通过调试电路中电阻值,可以直接从示波器观测到蔡氏电路的三个运动变量,包括周期、单涡卷、双涡卷等运动行为的时序图和相位图。搭建的电路结构简单,学生实验时调试容易,并且由于电路中不含电感元件,实验过程中混沌吸引子的稳定性也明显得到了提高。     

Floating memristor emulator with subthreshold region

Memristor which is recently discovered and known as missing circuit element is an important for memory, nonlinear and neuromorphic circuit designs. Modeling of memristor devices is essential for memristor based circuit design. In this paper, compact memristor which has high memristance value is introduced. The simulations are completed in LTspice program and expected results are obtained applying sinusoidal. Two memristor emulators are connected in serial, in parallel and promising results presented. The simulation results of applying positive pulse train to both of terminals of memristor are showed. The simulations of the proposed emulator showed the expected memristor characteristics.     

A bridge technique for memristor state programming

ABSTRACT

In order to effectively use a memristor in analog circuits, its memristance should be adjusted to a desired value between its limits. Since the maximum and minimum required memristance typically varies considerably between different types of memristors, it is almost impossible to tune the resistance of each memristor based on a reference resistor. Which is mostly done using some programmer circuits. Moreover, those programming strategies involving pulses are time-consuming and they impose high hardware headroom. In this paper, a novel CMOS circuit is presented for programming memristors. A Wheatstone bridge circuit is used to measure the current memristance, while the programming current is flowing through the device. Using such an approach reading the state and its adjustment are done simultaneously, which reduces the programming latency. In the proposed method, instead of tuning the memristance, the state of the memristor will be set to the desired value, which is proportional to a control voltage. The low programming latency, six-bit accuracy, and use of a simple circuit for programming, are the main advantages of our solution. The proposed circuit is designed and laid out in 0.35 µm CMOS technology and takes 0.0273mm². Furthermore, the proposed approach is applied to a memristor emulator to demonstrate its correct operation in real applications.     

Synchronization and chaos in coupled memristor-based FitzHugh-Nagumo circuits with memristor synapse

The memristor has drawn a significant interest in the fields of neuromorphic circuits because the nanoscale memristor is a strong candidate to become the critical element of novel ultra-high density low-power non-volatile memories. In the present paper, we focus on networks of FitzHugh-Nagumo neuron circuits employing memristor. First, we build the memristor-based circuit of FitzHugh-Nagumo model. The details of the chaotic phenomena of the memristor-based FitzHugh-Nagumo circuit under external stimuli have been found with use of computer simulations, i.e., we have numerically calculated waveform diagrams, phase portraits, Lyapunov exponents and bifurcation diagram. And we also confirm these results of theoretical analyses and numerical calculations by circuit simulation experiments of the actual analog circuit realization using Multisim modeling. Then the synchronization of coupled memristor-based chaotic neurons with memristor synapse is discussed, and synchronization mechanism is also found. Finally, we have also derived the sufficient conditions of chaotic synchronization in unidirectional coupled neuron circuits and bidirectional coupled neuron circuits respectively, which are that the parameter of memristor synapse must meet certain conditions. These results of theoretical analyses have been confirmed by numerical simulation.     

Review and comparative study of I-V characteristics of different memristor models with sinusoidal input

ABSTRACT

Memory-resistor (Memristor) has drawn considerable attention of the researchers in the last decade due to its remarkable properties. After the first concept of memristor, proposed by Leon Chua in 1971, almost no research work was conducted in this field for a long time. However, since the revolutionary discovery of the physical structure of memristor and its model of the HP lab in 2008, a tremendous amount of research work has been going on. Researchers are focusing on improving the models for the analysis of the memristor. Different researchers have come up with their model to improve the existing ones. These models can be linear, nonlinear or exponential. To overcome the boundary problem, many window functions have been proposed. Different models have their explanations of voltage-current relationship and state variable derivatives. This paper presents a detailed review and a comparative study of the existing memristor models based on their I-V characteristic curve. Original experimental I–V curve from the HP lab has been used as the reference for comparison.     

整数阶电路基本定理到分数阶电路推广及分析

近几十年来,对分数阶电路的研究逐渐深入,但对其中电路定理的分析较少,因此针对分数阶电路需要进一步探究其规律,将一些经典的电路定理推广到分数阶电路中,使得在以后的分析过程中能直接使用。本文在整数阶电路定理的基础上,运用基尔霍夫定律在分数阶电路中证明了叠加定理、替代定理、等效电源定理和互易定理,并进行了应用分析。