Thin reduced graphene oxide interlayer with a conjugated block copolymer for high performance non-volatile ferroelectric polymer memory

Polymer ferroelectric-gate field effect transistors (Fe-FETs) employing ferroelectric polymer thin films as gate insulators are highly attractive as a next-generation non-volatile memory. For minimizing gate leakage current of a device which arises from electrically defective ferroelectric polymer layer in particular at low operation voltage, the materials design of interlayers between the ferroelectric insulator and gate electrode is essential. Here, we introduce a new solution-processed interlayer of conductive reduced graphene oxides (rGOs) modified with a conjugated block copolymer, poly(styrene-block-paraphenylene) (PS-b-PPP). A FeFET with a solution-processed p-type oligomeric semiconducting channel and ferroelectric poly(vinylidene fluoride-co-trifluoroethylene) (PVDF-TrFE) insulator exhibited characteristic source–drain current hysteresis arising from ferroelectric polarization switching of a PVDF-TrFE insulator. Our PS-b-PPP modified rGOs (PMrGOs) with conductive moieties embedded in insulating polymer matrix not only significantly reduced the gate leakage current but also efficiently lowered operation voltage of the device. In consequence, the device showed large memory gate voltage window and high ON/OFF source–drain current ratio with excellent data retention and read/write cycle endurance. Furthermore, our PMrGOs interlayers were successfully employed to FeFETs fabricated on mechanically flexible substrates with promising non-volatile memory performance under repetitive bending deformation.     

相变材料Ge2Sb2Te5的性质及其面向新型数据存储的应用

信息时代产生的海量数据驱动着计算机存储架构的革新,高性能的非易失性存储器和存算一体的神经形态计算成为存储体系的发展方向。首先,介绍了相变材料Ge2Sb2Te5的阻变性质的机理与应用,详细阐述了相变存储器的发展以及神经形态计算的实现。然后,讨论了基于Ge2Sb2Te5铁电性质的存储器、基于Ge2Sb2Te5介电性质的光子存储单元和基于Ge2Sb2Te5应变作用的高迁移率晶体管。最后,讨论了Ge2Sb2Te5和n型硅等材料的异质结结构在器件中的应用。基于Ge2Sb2Te5材料多种特性的新型存储器件必将在未来存算一体的数据处理中扮演重要的角色。     

Enhanced organic ferroelectric field effect transistor characteristics with strained poly(vinylidene fluoride-trifluoroethylene) dielectric

Poly(vinylidene fluoride-trifluoroethylene) (70–30 mol%) was used as the functional dielectric layer in organic ferroelectric field effect transistors (FeFET) for non-volatile memory applications. Thin P(VDF-TrFE) film samples spin-coated on metallized plastic substrates were stretch-annealed to attain a topographically flat-grain structure and greatly reduce the surface roughness and current leakage of semi-crystalline copolymer film, while enhancing the preferred β-phase of the ferroelectric films. Resultant ferroelectric properties (P_R = |10| μC/cm², E_C = |50| MV/m) for samples simultaneously stretched (50–70% strain) and heated below the Curie transition (70 ^oC) were comparable to those resulting from high temperature annealing (>140 ^oC). The observed enhancements by heating and stretching were studied by vibration spectroscopy and showed mutual complementary effects of both processes. Organic FeFET fabricated by thermal evaporating pentacene on the smooth P(VDF-TrFE) films showed substantial improvement of semiconductor grain growth and enhanced electrical characteristics with promising non-volatile memory functionality.     

Why is nonvolatile ferroelectric memory field-effect transistorstill elusive?

In principle, a memory field-effect transistor (FET) based on the metal-ferroelectric-semiconductor gate stack could be the building block of an ideal memory technology that offers random access, high speed, low power, high density and nonvolatility. In practice, however, so far none of the reported ferroelectric memory transistors has achieved a memory retention time of more than a few days, a far cry from the ten-year retention requirement for a nonvolatile memory device. This work will examine two major causes of the short retention (assuming no significant mobile ionic charge motion in the ferroelectric film): 1) depolarization field and 2) finite gate leakage current. A possible solution to the memory retention problem will be suggested, which involves the growth of single-crystal, single domain ferroelectric on Si. The use of the ferroelectric memory transistor as a capacitor-less DRAM cell will also be proposed     

铁电场效应晶体管

介绍了铁电场效应晶体管 (FFET)的基本结构、存储机制、制作方法 ,综述其结构设计的改进、铁电薄膜在 FFET中应用的进展情况 ,探讨围绕铁电薄膜材料、过渡层、结构设计、不同成膜方法及工艺对 FFET存储特性的影响 ,对 FFET的研究现状和存在的一些问题进行评述     

Designing Multi‐Level Resistance States in Graphene Ferroelectric Transistors

Conventional memory elements code information in the Boolean “0” and “1” form. Devices that exceed bistability in their resistance are useful as memory for future data storage due to their enhanced memory capacity, and are also a necessity for contemporary applications such as neuromorphic computing. Here, with the aid of an experimentally validated device model, design rules are outlined and more than two stable resistance states in a graphene ferroelectric field‐effect transistor are experimentally demonstrated. The design methodology can be extrapolated for on‐demand introduction of multiple resistance states in ferroelectric transistors for applications both in data storage and neuromorphic computing.     

Nanoimprint of ordered ferro/piezoelectric P(VDF-TrFE) nanostructures

The next generation of portable computing and communication devices tremendously depend on the technologies that enable the rapid manipulation, caching and high-density non-volatile data storage. The recent development of organic electronics requires high-quality organic memory compatible with other devices, which will eventually lead to the realization of all organic electronic systems. The challenge of the organic electronics application is to find less degradative ways of fabricating ferroelectric polymer nanostructures. In this work, we applied the nanoimprint technique to fabricate ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer line and dot nanostructures and compared the ferroelectric properties and domain formation in these two nanostructures.     

Low Voltage and Ferroelectric 2D Electron Devices Using Lead‐Free BaxSr1‐xTiO3 and MoS2 Channel

Coupling between non‐toxic lead‐free high‐k materials and 2D semiconductors is achieved to develop low voltage field effect transistors (FETs) and ferroelectric non‐volatile memory transistors as well. In fact, low voltage switching ferroelectric memory devices are extremely rare in 2D electronics. Now, both low voltage operation and ferroelectric memory function have been successfully demonstrated in 2D‐like thin MoS₂ channel FET with lead‐free high‐k dielectric Ba_xSr_1‐xTiO₃ (BST) oxides. When the BST surface is coated with a 5.5‐nm‐ultrathin poly(methyl methacrylate) (PMMA)‐brush for improved roughness, the MoS₂ FET with BST (x = 0.5) dielectric results in an extremely low voltage operation at 0.5 V. Moreover, the BST with an increased Ba composition (x = 0.8) induces quite good ferroelectric memory properties despite the existence of the ultrathin PMMA layer, well switching the MoS₂ FET channel states in a non‐volatile manner with a ±3 V low voltage pulse. Since the employed high‐k dielectric and ferroelectric oxides are lead‐free in particular, the approaches for applying high‐k BST gate oxide for 2D MoS₂ FET are not only novel but also practical towards future low voltage nanoelectronics and green technology.     

Basic operation of novel ferroelectric CMOS circuits

A nonvolatile ferroelectric complementary metal-oxide-semiconductor (CMOS) circuit with both logic and memory functions is proposed as a new application of ferroelectric field effect transistors. The logic and memory operations of a NOT-logic ferroelectric CMOS device is demonstrated. Nondestructive readings of high and low output voltage levels of the device were performed. Data retention was measured up to 10⁵ s (1.2 days).     

Ferroelectric random access memory based on one-transistor–one-capacitor structure for flexible electronics

We have demonstrated a low temperature process for a ferroelectric non-volatile random access memory cell based on a one-transistor–one-capacitor (1T1C) structure for application in flexible electronics. The n-channel thin film transistors (TFTs) and ferroelectric capacitors (FeCaps) are fabricated using cadmium sulfide (CdS) as the semiconductor and poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer as the ferroelectric material, respectively. The maximum processing temperature for the TFTs is 100 °C and 120 °C for the FeCaps. The TFT shows excellent access control of the FeCap in the 1T1C memory cell, and the stored polarization signals are undisturbed when the TFT is off. The fabricated 1T1C memory cell was also evaluated in a FRAM circuit. The memory window on the bit line was demonstrated as 2.3 V, based on the 1T1C memory cell with a TFT having dimensions of 80 μm/5 μm (W/L) and a FeCap with an area of 0.2 × 10^?3 cm² using a bit line capacitor of 1 nF pre-charged at 17.2 V. The 1T1C memory cell is fabricated using photolithographic processes, allowing the integration with other circuit components for flexible electronics systems.     

Electrically reprogrammable ROM using N-channel memory transistors with floating gate

An electrically reprogrammable read-only-memory (REPROM) device, providing the fully decoded and on-board-writable functions, is described. The device consists of novel N-channel memory transistors with floating gate, non-volatile memory transistors, which enable electrically reprogramming operation. The memory transistor has been through more than 10⁷ rewrite cycles with no gain facto (β) decrease. The memory device has been processed by the flat-MOS and the Si-gate technologies. It has a 2048 bit memory capacity, organized as 256 words of 8 bits. The polycrystalline silicon floating gate is covered with vapor-deposited silicon nitride. This allows selective write and erase operation, giving the memory device a new bit-level reprogrammable function.     

Organic field-effect transistors and memory elements using deoxyribonucleic acid (DNA) gate dielectric

Deoxyribonucleic acid (DNA) bio-polymers derived from fish waste products are employed as gate dielectric in n-type methanofullerene as well as p-type pentacene based organic field-effect transistors working at low voltage levels and low gate leakage currents. Based on the large hysteresis in the transfer characteristics, operation of the transistor as a non-volatile memory element is shown. Practically hysteresis free operation of DNA based transistors is obtained at low voltage levels by adding an additional aluminium oxide blocking layer between the organic semiconductor and the DNA gate dielectric.     

铁电存储器在FPGA中应用的初步研究

提出了一种全新的基于铁电存储器FeRAM编程的非挥发FPGA思想(概念)，它主要是针对基于SRAM的FPGA的掉电挥发性问题提出的。文章在采用传统2T—2C结构的铁电存储单元的基础上完成数据的编程操作，并进一步对上述单元进行了电路和时序上的调整设计，提出了在FPGA工作环境下虽破坏性读出但无需回写的铁电存储单元。通过对文中提及的两种单元电路的仿真模拟，实现了编程数据的摔电保护、上电恢复的非挥发功能，初步验证了基于FeRAM编程的非挥发FPGA思想的正确性和可行性。     

有机非挥发存储器件:浮栅结构有机薄膜晶体管

提出了一种浮栅结构的新型有机薄膜晶体管(FG-OTFT)器件,并阐述了这种器件的工作机理.该器件通过控制浮 置栅上的电荷来控制 FG-OTFT 器件的阈值电压的大小,而器件不同的阈值电压便可用来存储“0”和“1”两个状态,故这种器 件可以被用作有机非挥发存储器.我们通过计算机数值模拟的方法对这种器件进行了研究.研究表明...     

Piezoelectricity enhancement of P(VDF/TrFE) by X-ray irradiation

Organic electronics is becoming more and more important because the low level of fabrication and deposition complexity even at large scale makes it a good candidate for future low cost technological product development. P(VDF-TrFE) is a co-polymer of special interest due its ferroelectric property enabling usage in re-programmable non-volatile organic memory and magnetoelectric sensors. Piezo force microscopy (PFM) provides access to the technologically relevant ferroelectric polarisability and its remanent polarization via imaging of the piezoelectric property. Here we use PFM to show that piezoelectric response of a P(VDF-TrFE) film can be enhanced by up to 260 % after soft X-ray irradiation. This enhancement correlates with morphological change of part of the film, from amorphous to crystalline. An optimal irradiation dose is found above which the film gets eroded and the piezoelectric response gets lowered.     

A new multitime programmable non-volatile memory cell using high voltage NMOS

A new multitime programmable (MTP) non-volatile memory (NVM) cell using high voltage NMOS is proposed. A PMOS transistor is used for programming, erasing, and reading, and a high voltage NMOS is used for selecting the memory cell. The memory cell has fewer number of transistors and terminals compared with the typical conventional memory cell. This reduces the area consumption and simplifies the implementation of memory's external circuit. In addition, the subthreshold swing (SS) of the memory cell is improved for larger coupling ratio. Experimental investigation on transfer characteristics, endurance, retention, and threshold voltage V_TH shift and leakage current of the high voltage NMOS of the memory cell are presented. The experimental endurance behaviour of the proposed memory cell is superior to the conventional memory cell.     

Low-voltage organic ferroelectric field effect transistors using Langmuir–Schaefer films of poly(vinylidene fluoride-trifluororethylene)

Langmuir–Schaefer transfer was used to fabricate ultrathin films of ferroelectric copolymer, poly(vinylidene fluoride-trifluoroethylene) (70–30 mol%), for non-volatile memory application at low operating voltage. Increasing the number of transferred monolayers up to 10 led to improved film crystallinity in the “in-plane” direction, which reduced surface roughness of the semicrystalline film. Treatment of the substrate surface by plasma results in different film coverage which was subsequently found to be governed by interaction of the deposited film and surface condition. Localized ferroelectric switching was substantially attained using piezo-force tip at 10 V on 10-monolayer films. Integrating this film as a dielectric layer into organic capacitor and field effect transistor yields a reasonably good leakage current (<10^?7 A/cm²) with hysteresis in capacitance and drain current with ON/OFF ratio of 10³ for organic ferroelectric memory application at significantly reduced operating voltage of |15| V.     

Memory performance and retention of an all-organic ferroelectric-like memory transistor

We have built a nonvolatile memory field-effect transistor (FET)-based on organic compounds. The gate-insulating polymer features ferroelectric-like characteristics when spun from solution into an amorphous phase. Thus, the memory transistor is built using techniques developed for organic transistors without requiring high temperature annealing steps. The memory exhibits channel resistance modulations and retention times close in performance to inorganic ferroelectric FETs (FEFETs), yet at a fraction of the cost.     

Ferroelectricity-modulated resistive switching in Pt/Si:HfO2/HfO2-x/Pt memory

It is investigated for the effect of a ferroelectric Si:HfO₂ thin film on the resistive switching in a stacked Pt/Si:HfO₂/highly-oxygen-deficient HfO_2-x/Pt structure. Improved resistance performance was observed. It was concluded that the observed resistive switching behavior was related to the modulation of the width and height of a depletion barrier in the HfO_2-x layer, which was caused by the Si:HfO₂ ferroelectric polarization field effect. Reliable switching reproducibility and long data retention were observed in these memory cells, suggesting their great potential in non-volatile memories applications with full compatibility and simplicity.     

The Electrode-Ferroelectric Interface as the Primary Constraint on Endurance and Retention in HZO-Based Ferroelectric Capacitors

Ferroelectric hafnium-zirconium oxide is one of the most relevant CMOS-compatible materials for next-generation, non-volatile memory devices. Nevertheless, performance reliability remains an issue. With TiN electrodes (the most reported electrode material), Hf-Zr-based ferroelectric capacitors struggle to provide reliable retention due to electrode-ferroelectric interface interactions. Although Hf-Zr-based ferroelectric capacitors are fabricated with other electrodes, the focus is predominantly directed toward obtaining a large ferroelectric response. The impact of the electrodes on data retention for these ferroelectrics remains underreported and greater insight is needed to improve device reliability. Here, a comprehensive set of electrodes are evaluated with emphasis on the core ferroelectric memory reliability metrics of endurance, retention, and imprint. Metal-ferroelectric-metal capacitors comprised of a Hf_0.5Zr_0.5O₂ layer deposited between different combinations of nitride (TiN, TiAlN, and NbN), pure metal (W), and oxide (MoO₂, RuO₂, and IrO₂) top and bottom electrodes are fabricated for the investigation. From the electrical, physical, and structural analysis, the low reactivity of the electrode with the ferroelectric is found to be key for improved reliability of the ferroelectric capacitor. This understanding of interface properties provides necessary insight for the broad implementation of Hf-Zr-based ferroelectrics in memory technology and, overall, boosts the development of next-generation memories.