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1.
We present a modified pattern technique for fabrication of nanometer structures in the Si/SiGe heterosystem. A special multilayer-resist system is developed for pattern transfer by electron-beam lithography and anisotropic SF6/O2 dry etching. Photoluminescence measurements are carried out on homogeneously etched samples to determine the influence of the RIE process on the optical properties. Etching induced damages are reduced by a low-temperature post-annealing step. Additionally, surface contaminations are investigated using laser desorption mass spectrometry. SiGe wires with lateral widths from 4 μm down to 25 nm have been fabricated, but photoluminescence has been observed for structures down to 600 nm lateral width, only. Further improvement has been obtained by sidewall-passivation of the nanostructures with a low temperature plasma enhanced-chemical-vapour-deposited oxide. Up to now, clear excitonic emission is detected for wires as small as 250 nm.  相似文献   

2.
Twenty-nanometer-thick Si cap layer/74-nm-thick Si0.72Ge0.28 epilayer/Si heterostructural sample was implanted by 25 keV H+ ion to a dose of 1 × 1016 cm−2 and subsequently annealed in ultra-high vacuum ambient at the temperature of 800 °C for 30 min. Rutherford backscattering/ion channeling (RBS/C), Raman spectra, high resolution X-ray diffraction (HRXRD) and atomic force microscopy (AFM) were used to characterize the structural characteristic of Si/SiGe/Si heterostructure. Investigations by RBS/C demonstrate that the Si0.72Ge0.28 layer show good crystal quality (21.1% of channel minimum yield). The relaxation degree of partially relaxed Si0.72Ge0.28 layer was around 74%, which was obtained by HRXRD. The computation process of the relaxation degree of strain in SiGe layer according to HRXRD rocking curve was also thoroughly introduced. Raman analysis revealed that stress, σ and strain, ε in the thin strained-Si layer were around 1.2 Gpa and 0.52%, respectively. In addition, the small surface roughness in the formed strained-Si/relaxed Si0.72Ge0.28 layer/Si heterostructural sample was observed via AFM image.  相似文献   

3.
This work presents characterization of implanted and annealed double layer planar heterostructure HgCdTe for p-on-n photovoltaic devices. Our observation is that compositional redistribution in the structure during implantation/ annealing process differs from that expected from classical composition gradient driven interdiffusion and impacts the placement of the electrical junction with respect to the metallurgical heterointerface, which in turn affects quantum efficiency and RoA. The observed anomalous interdiffusion results in much wider cap layers with reduced composition difference between base and cap layer composition. The compositional redistribution can, however, be controlled by varying the material structure parameters and the implant/anneal conditions. Examples are presented for dose and implanted species variation. A model is proposed based on the fast diffusion in the irradiation induced damage region of the ion implantation. In addition, we demonstrate spatial uniformity obtained on molecular beam epitaxy (MBE) material of the compositional and implanted species profile. This reflects spatial uniformity of the ion implantation/annealing Processes and of the MBE material characteristics.  相似文献   

4.
Relaxed SiGe-on-insulator (SGOI) is a suitable material to fabricate strained Si structures. Separation-by-implantation-of-oxygen (SIMOX) is a competing method to synthesize SGOI materials. In this work, SiGe/Si samples were implanted with 3×1017 cm−2 oxygen ions at 60 kV, followed by high-temperature annealing. Oxygen segregation and Ge diffusion during the annealing process were investigated using Rutherford backscattering spectroscopy/channeling (RBS/C), high-resolution x-ray diffraction (HRXRD), and high-resolution transmission electron microscopy (HRTEM). Our results show that the sample structure strongly depends on the thermal history and Ge diffuses mainly at the beginning stage of the high-temperature process. The process can be improved by introducing an annealing step at a medium temperature before high-temperature annealing, and sharper interfaces and good crystal quality can be obtained. Our results indicate that the SIMOX process for silicon-on-insulator (SOI) fabrication can be adopted to produce SGOI.  相似文献   

5.
Electrical properties of epitaxial single-crystalline Si/SiGe axial heterostructure nanowires (NWs) on Si〈1 1 1〉 substrate were measured by contacting individual NWs with a micro-manipulator inside an scanning electron microscope. The NWs were grown by incorporating compositionally graded Si1−xGex segments of a few nm thicknesses in the Si NWs by molecular beam epitaxy. The I-V characteristics of the Si/SiGe heterostructure NWs showed Ohmic behavior. However, the resistivity of a typical heterostructure NW was found to be significantly low for the carrier concentration extracted from the simulated band diagram. Similarly grown pure Si and Ge NWs showed the same behavior as well, although the I-V curve of a typical Si NW was rectifying in nature instead of Ohmic. It was argued that this enhanced electrical conductivities of the NWs come from the current conduction through their surface states and the Ge or Si/SiGe NWs are more strongly influenced by the surface than the Si ones.  相似文献   

6.
We have investigated the effect of substrate biasing on the subthreshold characteristics and noise levels of Si/Si/sub 1-x/Ge/sub x/ (x=0,0.15,0.3) heterostructure MOSFETs. A detailed analysis of the dependence of threshold voltage, off-state current, and low-frequency noise level on the substrate-source (V/sub bs/) biasing showed that SiGe heterostructure MOSFETs offer a significant speed advantage, an extended subthreshold operation region, a reduced noise level, and reduced bulk potential sensitivity compared to Si bulk devices. These experimental results demonstrate that SiGe heterostructure MOSFETs render a promising extension to the CMOS technologies at the low-power limit of operation, eventually making the micropower implementation of radio frequency (RF) functions feasible.  相似文献   

7.
An ultrahigh vacuum chemical vapor deposition (UHV/CVD) system is introduced.SiGe alloys and SiGe/Si multiple quantum wells (MQWs) have been grown by cold-wall UHV/CVD using disilane(Si2H6) and germane (GeH4) as the reactant gases on Si(100) substrates.The growth rate and Ge contents in SiGe alloys are studied at different temperature and different gas flow.The growth rate of SiGe alloy is decreased with the increase of GeH4 flow at high temperature.X-ray diffraction measurement shows that SiGe/Si MQWs have good crystallinity,sharp interface and uniformity.No dislocation is found in the observation of transmission electron microscopy(TEM) of SiGe/Si MQWs.The average deviation of the thickness and the fraction of Ge in single SiGe alloy sample are 3.31% and 2.01%, respectively.  相似文献   

8.
An analytical model of drain current of Si/SiGe heterostructure p-channel MOSFETs is presented. A simple polynomial approximation is used to model the sheet carrier concentration (p/sub s//sup H/) in the two-dimensional hole gas at the Si/SiGe interface. The interdependence of p/sub s//sup H/ and the hole concentration at the Si/SiO/sub 2/ interface (p/sub s//sup S/) is taken into account in the model, which considers current flow at both the Si/SiGe and the Si/SiO/sub 2/ interfaces. This model is applicable to compressively strained SiGe buried-channel heterostructure PMOSFETs as well as tensile-strained surface-channel PMOSFETs. The model has been implemented in SABER, a circuit simulator. The results from the model show an excellent agreement with the experimental data.  相似文献   

9.
A study on the dry thermal oxidation of a graded SiGe layer was performed. To reduce the Ge pileup effect during the thermal oxidation, the SiGe layer was deposited with much lower Ge content near the free surface than near the SiGe/Si heterointerface. After dry thermal oxidation at 900°C, the Ge composition in the pileup layer was significantly reduced and strain relaxation by defect formation was prevented due to the graded Ge distribution. To homogenize the Ge distribution between the pileup layer and remaining SiGe layer, the oxidized layers were postannealed. The homogenization is significantly enhanced by strain-induced diffusion, and it was confirmed by uphill diffusion of Ge. This result can propose an alternative oxidation method of strained SiGe/Si heterostructures.  相似文献   

10.
The retention characteristics of electrons and holes in hafnium oxide with post-deposition annealing in a N2 or 02 ambient were investigated by Kelvin probe force microscopy. The KFM results show that compared with the N2 PDA process, the O2 PDA process can lead to a significant retention improvement. Vertical charge leakage and lateral charge spreading both played an important role in the charge loss mechanisms. The retention improvement is attributed to the deeper trap energy. For electrons, the trap energy of the HOS structure annealed in a N2 or 02 ambient were determined to be about 0.44 and 0.49 eV, respectively. For holes, these are about 0.34 and 0.36 eV, respectively. Finally, the electrical characteristics of the memory devices are demonstrated from the experiment, which agreed with our characterization results. The qualitative and quantitative determination of the charge retention properties, the possible charge decay mechanism and trap energy reported in this work can be very useful for the characterization of hafnium charge storage devices.  相似文献   

11.
Thermally Stimulated Current (TSC) measurements have been made on deep states in ion implanted silicon. The nature of the resulting curves and the relationship of the peak to valley transition currents clearly preclude the conventional analysis based on independent emission to the valence band. The results have been analyzed with a model based on coupled levels with interlevel transitions and the fit yields reasonable energy levels and exponential pre-factors. The measurements were made by using shallow n+ guard ring diodes implanted with a low dose (3×1013 ions/cm2) of 1 MeV B+ ions and annealed at 350‡C for one hour. The energy was selected so that the end of the ion track would be in the depletion region of the diodes.  相似文献   

12.
以Si2H6和GeH4作为源气体,用UHV/CVD方法在Si(100)衬底上生长了Sil-xGex合金材料和Si1-xGex/Si多量子阱结构.用原子力显微镜、X光双晶衍射和透射电子显微镜对样品的表面形貌、均匀性、晶格质量、界面质量等进行了研究.结果表明样品的表面平整光滑,平均粗糙度为1.2nm;整个外延片各处的晶体质量都比较好,各处生长速率平均偏差为3.31%,合金组分x值的平均偏差为2.01%;Si1-xGex/Si多量子阱材料的X光双晶衍射曲线中不仅存在多级卫星峰,而且在卫星峰之间观察到了Pendellosung条纹,表明晶格质量和界面质量都很好;Si1-xGex/Si多量子阱材料的TEM照片中观察不到位错的存在.  相似文献   

13.
本文中, 使用开尔文探针显微镜,研究了不同退火气氛(氧气或氮气)情况下氧化铪材料的电子和空穴的电荷保持特性。与氮气退火器件相比,氧气退火可以使保持性能变好。横向扩散和纵向泄露在电荷泄露机制中都起了重要的作用。 并且,保持性能的改善与陷阱能级深度有关。氮气和氧气退火情况下,氧化铪存储结构的的电子分别为0.44 eV, 0.49 eV,空穴能级分别为0.34 eV, 0.36 eV。 最后得到,不同退火气氛存储器件的电学性能也与KFM结果一致。对于氧化铪作为存储层的存储器件而言,对存储特性的定性和定量分析,陷阱能级,还有泄漏机制研究是十分有意义的。  相似文献   

14.
UHV/CVD生长SiGe/Si异质结构材料   总被引:6,自引:5,他引:6  
以 Si2 H6 和 Ge H4 作为源气体 ,用 UHV/CVD方法在 Si( 1 0 0 )衬底上生长了 Si1- x Gex 合金材料和 Si1- x Gex/Si多量子阱结构 .用原子力显微镜、X光双晶衍射和透射电子显微镜对样品的表面形貌、均匀性、晶格质量、界面质量等进行了研究 .结果表明样品的表面平整光滑 ,平均粗糙度为 1 .2 nm;整个外延片各处的晶体质量都比较好 ,各处生长速率平均偏差为 3.31 % ,合金组分 x值的平均偏差为 2 .0 1 % ;Si1- x Gex/Si多量子阱材料的 X光双晶衍射曲线中不仅存在多级卫星峰 ,而且在卫星峰之间观察到了 Pendellosung条纹 ,表明晶格质量和界面质量都很好 ;Si  相似文献   

15.
在a-Si:H和a-SiCx:H中共注稀土铒和氧。300℃和400℃热退火后,测得了来自发光中心Er3+内层4f电子跃迁的1.54μm光致发光。400℃是较好的退火温度。随着碳含量的增加,发光强度逐渐减弱,这可能是由于碳的引入减弱了间隙氧退火时的迁移能力所致。  相似文献   

16.
Ti/Si和Ti/O/Si界面相互作用的研究   总被引:1,自引:0,他引:1  
本文利用XPS、UPS和AES等分析技术,对不同清洁处理的Ti/Si(111)界面进行了研究.在超高真空(~4 × 10~(-10)mbar)中,高纯Ti(99.99%)淀积在Si(111)表面上.Ti/S界面产生相互作用.Ti2p和Si2p芯能级产生化学位移,利用电子组态变化的观点解释了所观测到的化学位移.具有氧玷污的Ti 蒸发源,淀积在Si(111)表面上,没有观察到界面相互作用.如果在Si(111)表面存在极薄的氧化层,则在界面处首先形成 Ti的氧化物.文中讨论了氧玷污对界面互作用的影响.  相似文献   

17.
Ragaie  H.F. 《Electronics letters》1980,16(14):565-566
Direct current/voltage relationships for m.o.s. capacitors are measured as function of oxide doping. Uniform P+ doping is obtained by means of multiple ion implantation. A close relationship between oxide defects, conduction and memory switching is then emphasised.  相似文献   

18.
对单台面SiGeHBT在E-B结反偏应力下直流特性的可靠性进行了研究。研究结果表明,随应力时间的增加,开启电压增加,直流电流增益下降,特别是在低E-B正偏电压时下降明显;而交流电流增益退化缓慢。  相似文献   

19.
The results of a study of the spectral and temporal characteristics of the photoluminescence (PL) from multilayer structures with self-assembled Ge(Si) islands grown on silicon and “silicon-on-insulator” substrates in relation to temperature and the excitation-light wavelength are presented. A substantial increase in island-related PL intensity is observed for structures with Ge(Si) islands grown on silicon substrates upon an increase in temperature from 4 to 70 K. This increase is due to the diffusion of nonequilibrium carriers from the silicon substrate into the active layer with the islands. In this case, a slow component with a characteristic time of ~100 ns appears in the PL rise kinetics. At the same time, no slow component in the PL rise kinetics and no rise in the PL intensity with increasing temperature are observed for structures grown on “silicon-on-insulator” substrates, in which the active layer with the islands is insulated from the silicon substrate. It is found that absorption of the excitation light in the islands and SiGe wetting layers mainly contributes to the excitation of the PL signal from the islands under sub-bandgap optical pump conditions.  相似文献   

20.
从模拟和实验两方面研究了SiGe/Si HBT发射结中pn结界面和SiGe/Si界面的相对位置对器件的电流增益和频率特性的影响.发现两界面偏离时器件性能会变差.尤其是当pn结位于SiGe/Si界面之前仅几十?就足以产生相当高的电子寄生势垒,严重恶化器件的性能.据此分析了基区B杂质的偏析和外扩对器件的影响以及SiGe/Si隔离层的作用.  相似文献   

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