一种基于区间时序逻辑模型检测的入侵检测算法

Model checking based on linear temporal logic reduces the false negative rate of misuse detection. However, linear temporal logic formulae cannot be used to describe concurrent attacks and piecewise attacks. So there is still a high rate of false negatives in detecting these complex attack patterns. To solve this problem, we use interval temporal logic formulae to describe concurrent attacks and piecewise attacks. On this basis, we formalize a novel algorithm for intrusion detection based on model checking interval temporal logic. Compared with the method based on model checking linear temporal logic, the new algorithm can find unknown succinct attacks. The simulation results show that the new method can effectively reduce the false negative rate of concurrent attacks and piecewise attacks.     

基于情境演算的时序Agent语言TAOPLID的语义

文章对经典情境演算进行适当改造,使之能描述含时间变元的行动.在此基础上,对意向驱动式面向agent程序设计语言AOPLID进行时序扩充,使之能表达并处理带时间参数的并发行动.最后,给出了基于情景演算理论的离线方式下的时序AOPLID程序语义以及时序AOPLID程序实例.     

An improved Montgomery's algorithm for high-speed RSA public-keycryptosystem

We revise Montgomery's algorithm such that modular multiplication can be executed two times faster. Each iteration in our algorithm requires only one addition, while that in Montgomery's requires two additions. We then propose a cellular array to implement modular exponentiation for the Rivest-Shamir-Adleman cryptosystem. It has approximately 2n cells, where n is the word length. The cell contains one full-adder and some controlling logic. The time to calculate a modular exponentiation is about 2n² clock cycles. The proposed architecture has a data rate of 100 kb/s for 512-b words and a 100 MHz clock     

Fuzzy behavior integration and action fusion for robotic excavation

This paper discusses control behavior integration and bucket action fusion for excavation control of a robotic front-end-loader type machine. To utilize the experience and expertise from skilled human operators, a fuzzy-logic based control approach is developed. A hierarchical excavation control architecture decomposes excavation goals to tasks, then tasks to behaviors, and finally behaviors to actions. The excavation actions are primitive and can be executed directly by an excavation machine. Finite state machines are used to specify the coordination and integration of behaviors for task execution and actions for behavior implementation. A simple strategy for action fusion is proposed based on fuzzy logic reasoning and the COA defuzzification method. Finally, laboratory experiments are conducted using a PUMA 560 robot arm and a Zebra force/torque sensor in a simulated rock excavation environment. Experimental results indicate that the proposed approach in this paper has led to more efficient task execution than previous approaches     

Modular and rapid testing of SOCs with unwrapped logic blocks

Extensive research has been carried out for test planning of core-based system-on-a-chip devices. Most of the prior work assumes that all of the embedded cores are wrapped for test purpose. However, some designs may contain user-defined logic or cores that cannot be wrapped due to area constraints or timing violations. This paper discusses how these unwrapped logic blocks can be tested rapidly by adapting the TestRail architecture, which uses only the test control mechanism and the test instructions available through the IEEE 1500 standard for embedded core test. A new test scheduling algorithm, which facilitates a concurrent test of both unwrapped logic blocks and IEEE 1500-wrapped cores, is proposed, and experiments show that it outperforms a previous approach when the available number of tester channels and/or the number of unwrapped logic blocks are small.     

确保时态一致性的实时并发控制协议

实时控制系统通常需要维护大量的时态数据对象,这些时态数据对象是现实世界不断变化的物理环境的逻辑表示.应用事务通过对时态数据对象的访问来产生最终的控制活动.在实际应用中,实时控制系统不仅需要确保事务能在规定的期限内完成,也需要保证事务存取的是时态一致性的数据对象.传统的实时并发控制协议强调事务截止期的满足,而忽略了事务对其所存取数据对象有时态一致性需求.本文首先给出了数据和事务时态一致性的形式化定义,在此基础上,提出了一种新的能确保时态一致性的实时并发控制协议:时态一致性高优先级两段锁协议(TCHP-2PL).为了实现更好的实时性能,我们对TCHP-2PL进行了改进,通过引入相似性概念,提出了TCHP-2PL的改进版本:STCHP-2PL.性能测试结果显示,STCHP-2PL在确保时态一致性的同时仍能保证很好的实时性能.     

Reaction based robot control

A formalized approach to reaction based control of robots equipped with sensors is presented. In the case of reaction based control a goal that is to be achieved and a single layer of actions (called reactions), that are executed when sensors detect appropriate conditions, are distinguished. Unlike the pure behavioural approach, where the partitioning of the system is intuitive, a formal method was followed. First the sensor reading space was partitioned into sub-spaces, and a reaction was associated with each of these sub-spaces. If during the realization of the goal the sensor readings “enter” a sub-space associated with a certain action, then the realization of the global goal is interrupted and the action is executed. As the sensor reading space, robot reactions and the global goal can be described formally, a formal specification of the robotic controller was obtained. It was later used as the basis for coding the software of controllers tailored to the execution of specific tasks.     

Integration of Coordination Architecture and Behavior Fuzzy Learning in Quadruped Walking Robots

This paper presents the design and implementation of a coordination architecture for quadruped walking robots to learn and execute soccer-playing behaviors. A typical hybrid architecture combing reactive behaviors with deliberative reasoning is developed. The reactive behaviors directly map spatial information extracted from sensors into actions. The deliberative reasoning represents temporal constraints of a robot's strategy in terms of finite state machines. In order to achieve real-time and robust control performance in reactive behaviors, fuzzy logic controllers (FLCs) are used to encode the behaviors, and a two-stage learning scheme is adopted to make these FLCs adaptive to complex situations. The experimental results are provided to show the suitability of the architecture and effectiveness of the proposed learning scheme.     

在半导体制造业导入高级规划与排程系统

半导体制造系统的回流、资源高度共享等特征使得仅采用ERP系统已无法满足对生产规划与排程的种种需求.高级规划与排程(APS)系统的出现是为了强化ERP中以传统MRP规划逻辑为主的生产规划与排程功能,以协助规划人员对物料与产能做同步且最有效益的生产规划.APS系统利用先进的信息科技及规划技术,再考虑企业资源限制条件与生产现场的控制与派工法则,规划可行的物料需求计划与生产排程计划,具有同步规划、即时规划、最优规划等特点.对APS功能特色、APS导入时与ERP的衔接问题以及导入后各部门的运作进行了介绍及分析.     

Modular Verification of Computer Communication Protocols

Programs that implement computer communications protocols can exhibit extremely complicated behavior, and neither informal reasoning nor testing is reliable enough to establish their correctness. In this paper we discuss the application of modular program verification techniques to protocols. This approach is more reliable than informal reasoning, but has an advantage over formal reasoning based on finite-state models, the complexity of the proof need not grow unmanageably as the size of the program increases. Certain tools of concurrent program verification that are especially useful for protocols are presented, history variables that record sequences of input and output values, temporal logic for expressing properties that must hold in a future system state such as eventual receipt of a message), and module specification and composition rules. The use of these techniques is illustrated by verifying two data transfer protocols from the literature: the alternating bit protocol and a protocol proposed by Stenning.     

A Cost-efficient Input Vector Monitoring Concurrent On-line BIST Scheme Based on Multilevel Decoding Logic

Input vector monitoring concurrent on-line BIST based on multilevel decoding logic is an attractive approach to reduce hardware overhead. In this paper, a novel optimization scheme is proposed for further reducing the hardware overhead of the decoding structure, which refers to improved decoding, input reduction, and simulated annealing inputs swapping approaches. Furthermore, utilizing similar multilevel decoding logic as the responses verifier, a novel cost-efficient input vector monitoring concurrent on-line BIST scheme is presented. The proposed scheme is applicable to the concurrent on-line testing for the CUT, the detail of which can not be obtained, such as hard IP cores. Experimental results indicate that the proposed optimization approaches can significantly reduce the hardware overhead of the decoding structure, and the proposed scheme costs lower hardware than other existing schemes.     

Improving Software Performance with Configurable Logic

We examine the energy and performance benefits that can be obtained by re-mapping frequently executed loops from a microprocessor to reconfigurable logic. We present a design flow that finds critical software loops automatically and manually re-implements these inconfigurable logic by implementing them in SA-C, a C language variation supportinga dataflow computation model and designed to specify and map DSP applicationsonto reconfigurable logic. We apply this design flow on several examples fromthe MediaBench benchmark suite and report the energy and performance improvements.     

Robust Multimodal Registration Using Local Phase-Coherence Representations

Automatic registration of multimodal images has proven to be a difficult task. Most existing techniques have difficulty dealing with situations involving highly non-homogeneous image contrast and a small initial overlapping region between the images. This paper presents a robust multi-resolution method for regis tering multimodal images using local phase-coherence representations. The proposed method finds the transformation that minimizes the error residual between the local phase-coherence representations of the two multimodal images. The error residual can be minimized using a combination of efficient globally exhaustive optimization techniques and subpixel-level local optimization techniques to further improve robustness in situations with small initial overlap. The proposed method has been tested on various medical images acquired using different modalities and evaluated based on its registration accuracy. The results show that the proposed method is capable of achieving better accuracy than existing multimodal registration techniques when handling situations where image non-homogeneity and small overlapping regions exist.     

A scheduling approach for design activities in concurrentengineering

This paper presents an optimization scheduling approach for concurrent design projects, in which activities may be executed in more than one operating mode and renewable as well as nonrenewable resources exist. Research on the development of a scheduling approach for concurrent scheduling is expected to shorten development lead time, minimize cost, and eliminate unnecessary redesign periods. In this paper, an integrated criterion function is proposed to ensure optimal concurrent scheduling and effective utilization of resources along with fluent delivery of information. In the criterion function, some key factors such as time order, resources, lead time and overlapping time of activities, which can make concurrent activities execute successfully, are taken into account adequately. Besides, two cruxes in concurrent engineering-role allocation, prerelease, and feedback revision process are discussed in detail. The example is part of a certain product development process, and the scheduling results demonstrate that the proposed algorithm is feasible     

Prototype stopping rules in software development projects

Custom software development projects under product specification uncertainty can be subject to wide variations in performance (duration, cost, and quality) depending on how the uncertainty is resolved. A prototyping strategy has been chosen in many cases to mitigate specification risk and improve performance. The study reported here sought to illuminate the case where duration was the highest priority project constraint, a feature that has often called for a concurrent development process. Unlike concurrent engineering, however, the process in this paper was a sequential, three-phase approach including an optional, up-front prototyping phase, a nominal-duration construction phase, and a variable length rework phase that grew with the arrival of specification modifications. The source of uncertainty was the modification arrival time; the management control point was the amount of time spent engaged in prototyping activities. Results showed that in situations where the modification arrival rate was sufficiently faster during prototyping than during construction, a minimal-duration choice was available. The model also returned the solution to perform no prototyping in cases where arrival rates were nearly equivalent between phases, or when the rework cost associated with modifications was consistently low.     

Design-Space Exploration for Block-Processing Based Temporal Partitioning of Run-Time Reconfigurable Systems

The reconfiguration capability of modern FPGA devices can be utilized to execute an application by partitioning it into multiple segments such that each segment is executed one after the other on the device. This division of an application into multiple reconfigurable segments is called temporal partitioning. We present an automated temporal partitioning technique for acyclic behavior level task graphs. To be effective, any behavior-level partitioning method should ensure that each temporal partition meets the underlying resource constraints. For this, a knowledge of the implementation cost of each task on the hardware should be known. Since multiple implementations of a task that differ in area and delay are possible, we perform design-space exploration to choose the best implementation of a task from among the available implementations.To overcome the high reconfiguration overhead of the current day FPGA devices, we propose integration of the temporal partitioning and design space exploration methodology with block-processing. Block-processing is used to process multiple blocks of data on each temporal partition so as to amortize the reconfiguration time. We focus on applications that can be represented as task graphs that have to be executed many times over a large set of input data. We have integrated block-processing in the temporal partitioning framework so that it also influences the design point selection for each task. However, this does not exclude usage of our system for designs for which block-processing is not possible. For both block-processing and non block-processing designs our algorithm selects the best possible design point to minimize the execution time of the design.We present an ILP-based methodology for the integrated temporal partitioning, design space exploration and block-processing technique that is solved to optimality for small sized design problems and in an iterative constraint satisfaction approach for large sized design problems. We demonstrate with extensive experimental results for the Discrete Cosine Transform (DCT) and random graphs the validity of our approach.     

Deterministic Wideband Modeling of Satellite Propagation Channel With Buildings Blockage

The article presents an example of satellite propagation modeling, applying the radio channel transfer function analysis as described and experimentally verified in scientific literature. The simulation of a satellite radio channel is executed by employing "ray tracing" and the uniform geometric theory of diffraction-based method for an assumed urban and suburban environment and different polarizations. Derived results regarding the channel transfer function are analyzed via a simulation of the wideband propagation measurement system and the Fourier transform procedures. It has been concluded that, contrary to ground cell radio system situations, where two-ray models usually suffice, a more detailed calculation should be considered for wideband satellite radio systems. Moreover, it is shown that the conclusions derived for the path loss and the delay spread depend not only on the specific propagation scenario, but also on the building permittivity.     

Temporal modelling of first-person actions using hand-centric verb and object streams

Analysis of first-person (egocentric) videos involving human actions could help in the solutions of many problems. These videos include a large number of fine-grained action categories with hand–object interactions. In this paper, a compositional verb–noun model including two complementary temporal streams is proposed with various fusion strategies to recognize egocentric actions. The first step is based on construction of verb and object video models as decomposition of actions with a special attention on hands. Particularly, the verb video model that is the spatial–temporal encoding of hand actions and the object video model that is the object scores with hand–object layout are represented as two separate pathways. The second step is the fusion stage to identify action category, where distinct verb and object models are combined to give their action judgments. We propose fusion strategies with recurrent steps collecting verb and object label judgments along a temporal video sequence. We evaluate recognition performances for individual verb and object models; and we present extensive experimental evaluations for action recognition over recurrent-based fusion approaches on the EGTEA Gaze+ dataset.     

Automatic Processor Customization for Zero-Overhead Online Software Verification

The PSL-to-Verilog (P2V) compiler can translate a set of assertions about a block-structured software program into a hardware design to be executed concurrently with the program. The assertions validate the correctness of the software program without altering the program's temporal behavior in any way, a result never previously achieved by any online model-checking system. Additionally, the techniques and implementations described apply to any general purpose program and the absence of execution overhead renders the system ideal for the verification and debugging of real-time systems. Assertions are expressed in a simple subset of the property specification language (PSL), an IEEE standard originally intended for the behavioral specification of hardware designs. The target execution system is the eMIPS processor, a dynamically self-extensible processor realized with a field-programmable gate array (FPGA). The system can concurrently execute and check multiple programs at a time. Assertions are compiled into eMIPS Extensions, which are loaded by the operating system software into a portion of the FPGA, and discarded once the program terminates. If an assertion is violated, the program receives an exception, otherwise, it executes fully unaware of its verifier. The software program is not modified in any way. It can be compiled separately with full optimizations and executes with or without the corresponding hardware checker. The P2V compiler, implemented in Python, generates code for the implementation of the eMIPS processor running on the Xilinx ML401 development board. It is currently used to verify software properties in areas such as testing, debugging, intrusion detection, and the behavioral verification of concurrent and real-time programs.      

Simultaneous ultrasound and MRI system for breast biopsy: compatibility assessment and demonstration in a dual modality phantom

Simultaneous capturing of ultrasound (US) and magnetic resonance (MR) images allows fusion of information obtained from both modalities. We propose an MR-compatible US system where MR images are acquired in a known orientation with respect to the US imaging plane and concurrent real-time imaging can be achieved. Compatibility of the two imaging devices is a major issue in the physical setup. Tests were performed to quantify the radio frequency (RF) noise introduced in MR and US images, with the US system used in conjunction with MRI scanner of different field strengths (0.5 T and 3 T). Furthermore, simultaneous imaging was performed on a dual modality breast phantom in the 0.5 T open bore and 3 T close bore MRI systems to aid needle-guided breast biopsy. Fiducial based passive tracking and electromagnetic based active tracking were used in 3 T and 0.5 T, respectively, to establish the location and orientation of the US probe inside the magnet bore. Our results indicate that simultaneous US and MR imaging are feasible with properly-designed shielding, resulting in negligible broadband noise and minimal periodic RF noise in both modalities. US can be used for real time display of the needle trajectory, while MRI can be used to confirm needle placement.