4 Gbit/s GaAs MESFET laser-driver IC

A high-speed laser-driver IC has been fabricated using etched-gate enhancement/depletion-mode MESFET technology. It has been demonstrated that the device is capable of driving 25? load with 80 mA modulation current at up to 4 Gbit/s NRZ data rate.     

5 Gbit/s laser-driver GaAs IC

A design of a 5 Gbit/s laser-driver GaAs IC employing a novel 50 Ω impedance matched output driver is presented. Eye diagrams with good eye openings, clean waveforms and output reflection coefficients of less than -8 dB for frequencies up to 10 GHz are demonstrated over a 10-36 mA output current tuning range     

Gigabit optical transmitter GaAs MESFET IC

A GaAs optical transmitter IC consisting of input buffers, a D-type flip-flop, an NRZ/RZ code convertor and a light source current driver has been developed for use in fibre-optic communication systems, employing D-MESFET SCFL by the Pt buried gate FET process. 1.1 Gbit/s modulation of an LD in RZ format with 20 mA peak drive current has been demonstrated.     

44 Gbit/s GaAs MESFET selector IC

A novel 2:1 selector circuit is described. To achieve high-speed operation, a parallel feedback circuit and inductor peaking were added to a conventional selector circuit. Furthermore, wide bandwidth buffers are carefully designed to cover the operation frequency of this selector circuit. The selector IC, fabricated with 0.1 μm class GaAs MESFETs, operated at up to 44 Gbit/s     

Optimum design of a 4-Gbit/s GaAs MESFET optical preamplifier

An analysis for determining the optimum MESFET gate width to optimize the sensitivity of a high-speed optical preamplifier is presented. A full MESFET model is employed including correlated gate and drain noise sources. The design of an optimum sensitivity monolithic shunt feedback amplifier, including stability requirements, is investigated. The results show that the optimum gate width for minimizing input equivalent noise is significantly larger than earlier simplfied predictions. A sensitivity improvement of 1.2 dB is demonstrated for a 4-Gbit/s MESFET optical amplifier, and results showing the dependence of optimum FET width on photodetector capacitance are described.     

2.5 Gb/s laser-driver GaAS IC

A laser-diode driver GaAs IC incorporating an optional NRZ/RZ (non-return-to-zero/return-to-zero) conversion facility, having ECL (emitter-coupled logic) and SCFL (source-coupled FET logic)-compatible inputs and providing a 0-60-mA adjustable output current into a 50-Ω/5-V termination at bit rates up to 2 Gb/s NRZ and maintaining a clear eye opening of 50 mA at 2.5 Gb/s NRZ bit rate has been designed, using a commercial 1-μm gate-length (F_τ=12 GHz) GaAs MESFET foundry service. The high maximum output current is obtained by implementing the output driver as a cascode differential amplifier. The logic circuitry implemented using a novel, DCAL (diode-clamped active-load) SCFL family, which is based on gate-width scaling rather than on absolute values, so that the on-chip logic voltage swing is less sensitive to process variations than conventional SCFL. A 60% improvement in noise margin is also obtained. To verify laser driving performance a back-to-back optical-fiber transmission experiment was performed, giving good optical eye diagrams at 2.5 Gb/s. The electrooptical interplay between laser-diode driver and laser-diode has been demonstrated using SPICE simulations     

1.13-Gbit/lightwave transmission system

A new high capacity lightwave transmission system has been developed using GaAs semicustom logic arrays and a DFB single-mode laser, and is presently in production. The architecture of this product is designed for in-service upgrade of a 565-Mbit/s product. This paper reviews the technical characteristics and design considerations of the Rockwell LTS-21130 lightwave transmission system.     

A GaAs MESFET IC for optical multiprocessor networks

A GaAs, enhanced/depletion mode, self-aligned, refractory-gate, MESFET chip process and circuit family have been developed for the integration of fiber-optic data link functions (e.g. photodetection, amplification, clock recovery, and deserialization) on a single chip. These authors describe the process and present results on integrating a complete optical receiver, including the photodiode and clock recovery circuits, on one chip. The chip functions use over 2000 devices, and perform at 1-GB/s, while dissipating less than 300 mW of heat. This chip is the most complex high-performance optoelectronic integrated circuit reported to date     

AlGaAs/GaAs MESFET IC with Ni buried gate technology

Ni buried gate technology for threshold voltage control using a Ni-GaAs reaction by a heat treatment is developed and successfully applied to AlGaAs/GaAs heterostructure MESFET IC's. Switching delay time of 36.7 ps with the power-delay product of 10 fJ (1-V supply voltage) was obtained at 83 K for a ring oscillator with 1.5-µm gate FET's. This technology, together with the saturated resistor loads, promises to simplify the process for AlGaAs/GaAs MESFET LSI's by not requiring active-layer etching.     

自对准钨栅GaAs MESFET IC工艺

为了制备耐高温肖特基势垒,已采用RF或DC磁控溅射法在n~+n型GaAs衬底上溅射淀积钨(W)膜。这种膜具有良好的力学及电学性质。膜的可蚀性及肖特基势垒的热稳定性能够满足自对准栅IC的要求。新颖的自对准结构及用W栅制成的自对准离子注入GaAs MESFET初步特性能说明W栅工艺适用于GaAs IC。     

Compact 10-Gbit/s optical transmitter and receiver circuit packs

Compact wideband 10-Gbit/s optical transmitter and receiver circuit packs are realized using high speed analog and digital GaAs IC's as well as a highly thermally conductive board and appropriately designed small function block modules that employ multichip packaging and resonant cavity mode damping. To achieve a compact receiver, the receiver circuit employs a clamp and peak-detector IC in the high speed analog equalizer amplifier to obtain a constant output direct current level for any mark density imbalance in the number of ones and zeros in the signal and a variable phase-shifter IC in the timing circuit. Realized circuit pack size is 200×280×15.24 mm and the power consumption of each pack is about 25 W     

A field demonstration of 1.7 Gb/s coherent lightwave regenerators

Four 1.7-Gb/s frequency-shift keying (FSK) coherent regenerators that were successfully operated in a typical field environment using installed fiber cables connected between Roaring Creek and Sunbury, PA (a distance of 35 km) are discussed. Each regenerator is housed in a standard AT&T repeater shelf and consists of five separate plug-in subsystem modules including a polarization diversity receiver, a FSK transmitter, and a cold-start automatic frequency control (AFC) circuit. During one month of continuous operation, the received optical powers for 10^-9 bit error rate (BER) were between -38 and -40 dBm. An error rate below 6×10^-15 (less than one error per day) was achieved at received optical powers of -33~-35 dBm     

40-Gb/s high-power modulator driver IC for lightwave communicationsystems

A monolithic integrated modulator driver with a data decision function for high-speed optical fiber links is presented. The integrated circuit (IC) was manufactured in a 0.2-μm gate length AlGaAs/InGaAs high electron mobility transistor technology with an f_T of 68 GHz. The modulator driver IC features differential configuration and operates up to 40 Gb/s with a clock phase margin of 210° and an output voltage swing of 2.9 V_p-p at each output. The maximum slew rate of the output signal is 200 mV/ps. The power dissipation of the circuit is 1.6 W using a single supply voltage of -5 V     

10-Gb/s strained MQW DFB-LD transmitter module and superlattice APDreceiver module using GaAs MESFET IC's

This paper describes the design and performance of a 10-Gb/s laser diode (LD) transmitter and avalanche photodiode (APD) receiver, both of which are based on GaAs MESFET IC's. The LD transmitter consists of a strained MQW distributed-feedback LD and one chip LD driver IC. The module output power is +4.6 dBm at 10 Gb/s. The APD receiver consists of an InGaAsP/InAl/As superlattice-APD and an IC-preamplifier with the 10-Gb/s receiver sensitivity of -27.4 dBm. As for the LD transmitter, we discuss the optimum impedance-matching design from the viewpoint of high-speed interconnection between LD and driver IC's. As for the APD receiver, the key issue is input impedance design of preamplifier IC, considering noise and bandwidth characteristics. Total performance of the transmitter and receiver is verified by a 10-Gb/s transmission experiment and a penalty-free 10-Gb/s fiber-optic link over 80 km of conventional single-mode fiber is successfully achieved     

Differential precoder IC modules for 20-and 40-Gbit/s opticalduobinary transmission systems

This paper reports on 20- and 40-Gbit/s differential precoder modules for optical duobinary transmission systems. These precoder modules overcome the speed limit of a conventional precoder by parallel processing. The proposed precoders handle two or four parallel signals before multiplexing with data rates of one-half or one-quarter the transmission bit rate, and the final preceded signal is obtained by multiplexing the precoder output bit by bit, production-level 0.2-μm gate-length GaAs MESFET's were used to fabricate the precoders. The precoders are mounted in an RF package. They successfully performed 20- and 40-Gbit/s precoding for the first time, and the 20-Gbit/s precoder achieved a maximum precoding rate of 22 Gbit/s, which is 76% faster than that of the conventional circuit using the same MESFETs. The 40-Gbit/s precoder performs 40-Gbit/s precoding when combined with a 40-Gbit/s multiplexer unit. Twenty-Gbit/s optical duobinary transmitter and receiver circuits using the 20-Gbit/s precoder module successfully generate fully encoded optical duobinary signal at this rate for the first time. These circuits show a receiver sensitivity of -28.6 dBm for a bit error rate of 1×10^-9     

An 80-Gbit/s multiplexer IC using InAlAs/InGaAs/InP HEMTs

This paper describes the design and performance of an 80-Gbit/s 2:1 selector-type multiplexer IC fabricated with InAlAs/InGaAs/InP HEMTs. By using a double-layer interconnection process with a low-dielectric insulator, microstrip lines were designed to make impedance-matched, high-speed intercell connection of critical signal paths. The record operating data rate was measured on a 3-in wafer. In spite of the bandwidth limitation on the measurement setup, clear eye patterns were successfully observed for the first time. The obtained circuit speed improvement from the previous result of 64 Gbit/s owes much to this high-speed interconnection design     

40-Gbit/s OEIC on GaAs substrate through metamorphic buffer technology

An optoelectronic integrated circuit operating in the 1.55-/spl mu/m wavelength range was realized on GaAs substrate through metamorphic technology. High indium content layers, metamorphically grown on a GaAs substrate, were used to fabricate the optoelectronic integrated circuits (OEICs) with -3 dB bandwidth of 40 GHz and 210 V/W of calculated responsivity. The analog OEIC photoreceiver consists of a 12-/spl mu/m, top-illuminated p-i-n photodiode, and a traveling wave amplifier (TWA). This receiver shows 6 GHz wider bandwidth than a hybrid photoreceiver, which was built using comparable, but stand-alone metamorphic p-i-n diode and TWA. With the addition of a buffer amplifier, the OEIC shows 7 dB more gain than the hybrid counterpart. To our knowledge, this is the first 40 Gbit/s OEIC achieved on a GaAs substrate operating at 1.55 /spl mu/m.     

10 Gbit/s AND gate using dual-gate GaAs MESFET

Using a commercial dual-gate GaAs MESFET transistor mounted in a microstrip circuit, an AND gate has been built. With the 100 ps (FWHM) wide test pulses available, a speed of 10 Gbit/s NRZ and a pulse suppression of at least 14 dB was obtained.     

Si衬底上MBE GaAs MESFET与IC制备

叙述在MBE(分子束外延)GaAs/Si材料上制作GaAs MESFET与Ic的研究。考虑到GaAsIC与Si IC单片集成的需要,采用了Ti/TiW/Au肖特基金属化和Ni/AuGe/Ni/Au欧姆接触金属化,层间介质采用等离子增强淀积氮化硅和聚酰亚胺复合材料。在该工艺基础上,制备了性能良好的GaAs/Si MESFET与IC。     

旁栅效应对GaAs MESFET数字IC设计的影响

研究了不同旁栅电极结构、不同旁栅电极取向对旁栅阈值特性的影响,并研究了旁栅阈值的光敏特性.结果表明:半绝缘衬底中的电子和空穴陷阱是旁栅效应及其光敏特性的主要原因,Ti/Au/Ti布线金属做旁栅电极具有最好的旁栅阈值特性,Au/Ge/Ni/Au欧姆接触和Ti/Pt/Au/Ti栅金属的旁栅阈值特性相似,三者都有明显的光敏特性.上述结果为GaAs MESFET数字集成电路版图设计规则的制定提供了可靠依据.