Thermal and voltage instabilities of hafnium oxide films prepared by sputtering technique

Hafnium oxide (HfO₂) films are not stable at a high-temperature thermal treatment and under high-field stressing. The thermally-induced instabilities might involve the formation of nanocrystalline phases, interface reactions, and out-diffusion of substrate silicon. Our results indicate that there exists an optimal thermal treatment temperature which compromises these effects and yields the best electrical properties of the HfO₂ films. This observation has a high practical value in deciding the processing temperatures for MOS device fabrication using a high-k material as the gate dielectric film.     

Electrical characteristics of Be-implanted GaAs activated by rapid thermal annealing

Be-implanted GaAs are annealed by rapid thermal annealing (RTA) using halogen lamps. Electrical properties of the annealed GaAs are investigated, emphasizing those at 77K for application to the p+-layer of Be-implanted WSix-gate self-aligned two-dimensional hole gas (2- DHG) FET. An electrical activation of 90 percent (for 2.0 × 10¹³cm^-2) or 80 percent (for 2.2 × 10¹⁴cm^-2) is obtained. An annealing temperature dependence of carrier freezing at 77K is observed for higher dose samples. The phenomenon is attributed to the redistribution of impurity atoms near the high-concentration peak.     

Electrical characterization and process control of cost-effective high-k aluminum oxide gate dielectrics prepared by anodization followed by furnace annealing

A cost-effective technique was introduced to prepare ultrathin aluminum oxide (Al/sub 2/O/sub 3/) gate dielectrics with equivalent oxide thickness (EOT) down to 14 /spl Aring/. Al/sub 2/O/sub 3/ was fabricated by anodic oxidation (anodization) of ultrathin Al films at room temperature in deionized water and then furnace annealed at 650/spl deg/C in N/sub 2/ ambient. Both dc and dac (dc superimposed with ac) anodization techniques were investigated. Effective dielectric constant of k/spl sim/7.5 and leakage current of 2-3 orders of magnitude lower than SiO/sub 2/ are observed. The conduction mechanism in Al/sub 2/O/sub 3/ gate stack is shown to be Fowler-Nordheim (F-N) tunneling. Saturated current behavior in the inversion region of MOS capacitor is observed. It is found that the saturation current is sensitive to interface state capacitance and can be used as an efficient way to evaluate the Al/sub 2/O/sub 3/ gate stack/Si-substrate interfacial property. An optimal process control for preparing Al/sub 2/O/sub 3/ gate dielectrics with minimized interface state capacitance via monitoring the inversion saturation current is demonstrated.     

Electrical characterization and morphological properties of AlN films prepared by dc reactive magnetron sputtering

Aluminum nitride (AlN) films were deposited by dc reactive magnetron sputtering on p-Si-(1 0 0) substrate in Ar-N₂ gas mixtures. The effects of nitrogen concentration and sputtering power on AlN films deposition rate, crystallographic orientation, refractive index, and surface morphology are investigated by means of several characterization techniques. The results show that AlN films reasonably textured in (0 0 2) orientation with low surface roughness can be obtained with the deposition rate as high as 70 nm/min by the control of either target power or N₂ concentration in the gas mixture. Increasing the dc discharge power, Al atoms are not completely nitridized and the Al phases appear, as well as the AlN phases. MIS (Metal-Insulator-Semiconductor) structures were fabricated and electrically evaluated by I-V (current-voltage) and C-V (capacitance-voltage) measurements at high frequency (1 MHz). The results obtained from C-V curves indicate that charges at the dielectric/semiconductor interface occur, and the dielectric constant values (extracted under strong accumulation region) are compatible with those found in literature.     

Electrical and physical characteristics of thin nitrided oxides prepared by rapid thermal nitridation

Ultrathin oxides (5-12 nm) were nitrided by lamp-heated rapid thermal annealing in ammonia at temperatures of 900-1150°C for 5-300 s. Elemental depth profiles were measured by Auger electron spectroscopy (AES) and secondary ion mass spectroscopy (SIMS). Both the nitrogen concentration measured by AES and the hydrogen one measured by SIMS for a nitrided oxide are found to increase monotonically as nitridation proceeds. The AES depth profiles of oxygen show that the Si-SiO2interface does not move during nitridation. Dependences of midgap interface state density (D_{it}_{m}) and fixed charge density (Nf) on nitridation temperature and on oxide thickness were studied. For a given temperature, bothD_{it}_{m}and (Nf) are found to show turnarounds as nitridation time increases in a similar manner: at first both increase, reach respective maxima at a certain nitridation timet_{max}, and then decrease gradually. The (D_{it}_{m}) and (Nf) increase more rapidly and thet_{max}is shorter as the nitridation temperature is raised or the oxide film is thinner. The maximum ofD_{it}_{m}increases as the oxide film is thinner. A two-step model is newly proposed to explain the turn-around behaviors ofD_{it}_{m}and Nf: the first step is defect formation as a result of nitrogen incorporation and the second step is reduction of the defects by an annealing-type process. The simulation reproduces the turnaround behaviors very well.     

Electrical and physical properties of ultrathin reoxidized nitridedoxides prepared by rapid thermal processing

A systematic study of the correlations between electrical and physical properties of nanometer-range reoxidized nitrided oxide films is reported. Rapid thermal processing was applied to the full fabrication process 7.7-nm-thick oxides nitrided at various conditions were reoxidized at 900-1150°C for 15-600 s. Nitridation- and reoxidation-condition dependences of charge-trapping properties, i.e. the flat-band voltage shift and the increase of midgap interface state density induced by a high-field stress, were studied. The hydrogen concentration in the film and the nitrogen concentration near the Si-SiO ₂ interface were measured by secondary ion mass-spectroscopy and Auger electron spectroscopy respectively. It was shown that striking improvement of the charge-trapping properties by rapid reoxidation is achieved by the reducing of hydrogen concentration while keeping the nitrogen concentration near the interface unchanged     

Interface states and fixed charges in nanometer-range thin nitrided oxides prepared by rapid thermal annealing

Ultra-thin oxides (5-12 nm) were nitrided by lamp-heated rapid thermal annealing in an ammonia ambient at 900-1150°C for 5-300 s. Interface states and fixed charges in the nitrided oxides have been studied, and, for a given temperature, both are found to vary in a similar manner as nitridation time increases: at first both increase, reach respective maxima at a certain nitridation time, and then decrease gradually showing turnarounds. Interface state densities and fixed charge densities at the initial and the final nitridation stages are in the low 10¹⁰- cm^-2/eV range and the low 10¹¹-cm^-2range, respectively, and are comparable with those of thermally grown oxides.     

The TEOS CVD oxide deposited on phosphorus in situ dopedpolysilicon with rapid thermal annealing

A TEOS oxide deposited on the phosphorus in situ doped polysilicon annealed with RTA is shown to have good electrical characteristics such as a high breakdown field (>12 MV/cm), especially for the positive bias, and a large Qbd (26 Coul/cm²). The improvement is believed to be due to the relatively smooth surface of the in situ doped polysilicon and the reduction of the trapping density by RTA     

GaInAs junction FET with InP buffer layer prepared by selective ion implantation of Be and rapid thermal annealing

GaInAs JFETs were fabricated on VPE-grown GaInAs layers. The pn junctions have been realised with Be ion implantation and rapid thermal annealing. The devices show a high transconductance of 130 mS/mm and an electron saturation velocity of 1.8 × 107 cm/s. Channel mobilities measured at the complete device are as high as 6800 cm2/Vs. These excellent device properties are due to the use of an undoped InP buffer layer which avoids the diffusion of Fe from the substrate into the active layer. The data were supported by S-parameter measurements which gave a frequency limit of 20 GHz for gate dimensions of 1.6 by 200 ?m2.     

Ion-beam mixed ultra-thin cobalt suicide (CoSi2) films by cobalt sputtering and rapid thermal annealing

The influence of ion-beam mixing on ultra-thin cobalt silicide (CoSi₂) formation was investigated by characterizing the ion-beam mixed and unmixed CoSi₂ films. A Ge⁺ ion-implantation through the Co film prior to silicidation causes an interface mixing of the cobalt film with the silicon substrate and results in improved silicide-to-silicon interface roughness. Rapid thermal annealing was used to form Ge⁺ ion mixed and unmixed thin CoSi₂ layer from 10 nm sputter deposited Co film. The silicide films were characterized by secondary neutral mass spectroscopy, x-ray diffraction, tunneling electron microscopy (TEM), Rutherford backscattering, and sheet resistance measurements. The experi-mental results indicate that the final rapid thermal annealing temperature should not exceed 800°C for thin (<50 nm) CoSi₂ preparation. A comparison of the plan-view and cross-section TEM micrographs of the ion-beam mixed and unmixed CoSi₂ films reveals that Ge⁺ ion mixing (45 keV, 1 × 10¹⁵ cm⁻²) produces homogeneous silicide with smooth silicide-to-silicon interface.     

Studies of yttrium oxide films prepared by RF magnetron sputtering

Films of yttrium oxide (Y₂O₃) were deposited on Si substrates from a Y₂O₃ target by RF magnetron sputtering. MIS capacitors in the form of Al and Y₂O₃ (400 Å)-Si were then fabricated. The leakage current density was about 10^-6 A/cm² at 1.3×10⁶ V/cm, and the breakdown field of the films was about 2.75×10⁶ V/cm. The dielectric constant of the sputtered Y₂O₃ was found to be about 12-12.7     

Effect of rapid thermal annealing of sputtered aluminium nitride film in an oxygen ambient

Aluminium nitride (AlN) thin films were deposited by radio frequency (RF) magnetron sputtering on p-type silicon (Si) substrate of (1 0 0) orientation using only argon (Ar) gas at substrate temperature of 300 °C. In order to achieve improved electrical properties, we performed post-deposition rapid thermal annealing (RTA). Sputtered AlN films were annealed in an oxygen ambient at temperatures of 600, 700, and 800 °C using RTA for 30 min. The orientation of the AlN crystal in the film was investigated using X-ray diffraction (XRD). The characteristic spectra by functional group were analyzed by Fourier transformation infrared (FTIR) spectroscopy. The electrical properties of the AlN thin films were studied through capacitance–voltage (C–V) characteristics in metal–insulator–semiconductor (MIS) device using the films as insulating layers. The flatband voltages (V_FB) in C–V curves were found to depend on crystal orientations. Negative V_FB was found in the case when AlN (1 0 0) peak was found. Also, when AlN (1 0 3) peak was observed upon increasing the annealing temperature, the value of V_FB was positive and after annealing at 700 °C, AlN (1 0 3) peak intensity was found to be maximum and V_FB was as high as+6.5 V.     

Improved radiation hardness of MOS devices with ultrathin nitrided oxide gate dielectrics prepared by rapid thermal processing

The radiation hardness of MOS devices with ultrathin nitrided oxides ( approximately 100 AA) prepared by rapid thermal nitridation (RTD) of thin oxides has been studied. The radiation was performed by exposing devices under X-rays of 50 keV to a dose of 0.5 Mrad(Si). Compared with conventional thermal oxides, the RTN oxide devices exhibit a much smaller increase in both the fixed charge N/sub f/ and the interface state D/sub it/ densities. In addition, it is found that higher RTN temperature and/or longer durations produce smaller Delta N/sub f/ and Delta D/sub it/.<>     

Hot-carrier effects in MOSFET's with nitrided-oxidegate-dielectrics prepared by rapid thermal processing

The authors present a comprehensive study of the hot-carrier effects with respect to both ON- and OFF-states in scaled n- and p-channel MOSFETs having nanometer-range thin (re-annealed) nitrided oxides. The authors report hot-carrier induced degradations in n-channel FETs. In particular, the dependencies on stressing gate voltages and fabrication conditions are extensively described. Secondly, p-channel results are reported. Then in addition to the above ON-state investigations, gate-induced drain leakage (GIDL) effects are reported. The authors show a quantitative relation of the hot-carrier induced n-FET degradations to physical properties of nitrogen and hydrogen contents measured by Auger electron spectroscopy (AES) and secondary ion mass spectroscopy (SIMS). To explain the observed behavior of hot-carrier-induced n-FET degradations, a two-factor model has been proposed and developed into a semi-empirical formula     

Structural and chemical characterization of as-deposited microcrystalline indium oxide films prepared by dc reactive magnetron sputtering

Microcrystalline indium oxide (InO_x) films with thickness of 120–1600 nm were prepared by dc reactive magnetron sputtering in various mixtures of oxygen in argon at room temperature. The depositions were carried out onto Corning 7059 glass and silicon substrates. The conductivity of the as-deposited films can change in a controllable and fully reversible manner by about six orders of magnitude by alternately exposing the films to ultraviolet (UV) light (hv≥3.5eV) in vacuum and reoxidizing them in ozone. The microstructure of the films was investigated using transmission electron microscopy (TEM) and electron diffraction. For this purpose, films with a thickness of about 100 nm were deposited onto NaCl substrates. The surface and depth composition of the films were examined using Auger electron spectroscopy (AES) combined with depth profiling analysis. The depth profiles showed that all the films exhibit an extremely good in-depth uniformity, all the way to the interface with the glass substrate, regardless of their thickness. Quantitative Auger and energy dispersive x-ray (EDX) analyses were employed to determine the stoichiometry of the films. An oxygen deficiency of 2–5% has been observed with respect to the stoichiometric composition. The effects of film thickness and oxygen content in the sputtering gas on the stoichiometry were examined. Both AES and EDX analyses confirmed that the stoichiometry is invariant for these parameters.     

Thin titanium oxide films deposited by e-beam evaporation with additional rapid thermal oxidation and annealing for ISFET applications

Titanium oxide (TiO₂) has been extensively applied in the medical area due to its proved biocompatibility with human cells [1]. This work presents the characterization of titanium oxide thin films as a potential dielectric to be applied in ion sensitive field-effect transistors. The films were obtained by rapid thermal oxidation and annealing (at 300, 600, 960 and 1200 °C) of thin titanium films of different thicknesses (5 nm, 10 nm and 20 nm) deposited by e-beam evaporation on silicon wafers. These films were analyzed as-deposited and after annealing in forming gas for 25 min by Ellipsometry, Fourier Transform Infrared Spectroscopy (FTIR), Raman Spectroscopy (RAMAN), Atomic Force Microscopy (AFM), Rutherford Backscattering Spectroscopy (RBS) and Ti-K edge X-ray Absorption Near Edge Structure (XANES). Thin film thickness, roughness, surface grain sizes, refractive indexes and oxygen concentration depend on the oxidation and annealing temperature. Structural characterization showed mainly presence of the crystalline rutile phase, however, other oxides such Ti₂O₃, an interfacial SiO₂ layer between the dielectric and the substrate and the anatase crystalline phase of TiO₂ films were also identified. Electrical characteristics were obtained by means of I-V and C-V measured curves of Al/Si/TiO_x/Al capacitors. These curves showed that the films had high dielectric constants between 12 and 33, interface charge density of about 10¹⁰/cm² and leakage current density between 1 and 10⁻⁴ A/cm². Field-effect transistors were fabricated in order to analyze I_D x V_DS and log I_D × Bias curves. Early voltage value of −1629 V, R_OUT value of 215 MΩ and slope of 100 mV/dec were determined for the 20 nm TiO_x film thermally treated at 960 °C.     

Effects of rapid thermal annealing on nitrided gate oxide grown on 4H-SiC

The electrical characteristics of thermally nitrided gate oxides on n-type 4H-SiC, with and without rapid thermal annealing processes, have been investigated and compared in this paper. The effects of annealing time (isothermal annealing) and annealing temperature (isochronal annealing) on the gate oxide quality have also been systematically investigated. After rapid isothermal and isochronal annealings, there has been a significant increase in positive oxide-charge density and in oxide-breakdown time. A correlation between the density of the positive oxide charge and the oxide breakdown reliability has been established. We proposed that the improvement in the oxide-breakdown reliability, tested at electric field of 11 MV/cm, is attributed to trapping of injected electron by the positive oxide charge and not solely due to reduction of SiC-SiO₂ interface-trap density.     

Electrical properties of Ga-implanted Si p+-n shallowjunctions fabricated by low-temperature rapid thermal annealing

p⁺-n shallow-junction diodes were fabricated using on-axis Ga⁶⁹ implantation into crystalline and preamorphized Si, at energies of 25-75 keV for a dose of 1×10¹⁵/cm ², which is in excess of the dosage (2×10¹⁴/cm²) required to render the implanted layer amorphous. Rapid thermal annealing at 550-600°C for 30 s resulted in the solid-phase epitaxial (SPE) regrowth of the implanted region accompanied by high Ga activation and shallow junction (60-130 nm) formation. Good diode electrical characteristics for the Ga implantation into crystalline Si were obtained; leakage current density of 1-1.5 nA/cm² and ideality factor of 1.01-1.03. Ga implantation into preamorphized Si resulted in a two to three times decrease in sheet resistance, but a leakage current density orders of magnitude higher     

Direct silicidation of Co on Si by rapid thermal annealing

Rapid thermal annealing is used to form cobalt silicide directly on unimplanted as well as B-, As-, and P-implanted wafers. The films are characterized by sheet resistance, X-ray diffraction, SEM, TEM, SIMS, and contact resistance measurements. The direct silicidation of Co on Si by rapid thermal annealing yields smooth low-resistivity films with minimal dopant redistribution.     

A phenomenon of charge trapping saturation induced by rapid thermal annealing

In this paper, we investigate the impact of the rapid thermal annealing (RTA) temperature on the performance degradation of NMOS devices, due to hot electrons. Our results indicate that RTA with a higher temperature achieves a higher interface barrier and induces a greater initial positive trapped charge. We observe a new three-section degradation phenomenon during DC stress at a low RTA temperature of 875°C, along with the discovery of a non-monotonic substrate current degradation which finally saturates. We note that the non-monotonicity is induced by a trapped charge polarity change, and the saturation is induced by a progression of an injected charge pocket toward the channel. This study provides an insight into the analysis of device degradation vs the RTA temperature, and should be useful for reliability optimization in process integration.