Electrical characteristics of high quality La2O3 gate dielectric with equivalent oxide thickness of 5 Å

Electrical and reliability properties of ultrathin La₂O ₃ gate dielectric have been investigated. The measured capacitance of 33 Å La₂O₃ gate dielectric is 7.2 μF/cm² that gives an effective K value of 27 and an equivalent oxide thickness of 4.8 Å. Good dielectric integrity is evidenced from the low leakage current density of 0.06 A/cm² at -1 V, high effective breakdown field of 13.5 MV/cm, low interface-trap density of 3×10¹⁰ eV^-1/cm², and excellent reliability with more than 10 years lifetime even at 2 V bias. In addition to high K, these dielectric properties are very close to conventional thermal SiO₂      

High reliability InGaP/GaAs HBT

Excellent long term reliability InGaP/GaAs heterojunction bipolar transistors (HBT) grown by metalorganic chemical vapor deposition (MOCVD) are demonstrated. There were no device failures (T=10000 h) in a sample lot of ten devices (L=6.4 μm ×20 μm) under moderate current densities and high-temperature testing (J_c=25 kA/cm ², V_ce=2.0 V, Junction Temp =264°C). The dc current gain for large area devices (L=75 μm ×75 μm) at 1 kA/cm² at a base sheet resistance of 240 ohms/sq (4×10 ¹⁹ cm^-3@700 Å) was over 100. The dc current gain before reliability testing (L=6.4 μm ×10 μm) at 0.8 kA/cm² was 62. The dc current gain (0.8 kA/cm²) decreased to 57 after 10000 h of reliability testing. The devices showed an f_T=61 GHz and f_max=103 GHz. The reliability results are the highest ever achieved for InGaP/GaAs HBT and these results indicate the great potential of InGaP/GaAs HBT for numerous low- and high-frequency microwave circuit applications. The reliability improvements are probably due to the initial low base current at low current densities which result from the low surface recombination of InGaP and the high valence band discontinuity between InGaP and GaAs     

Steady-state and transient forward current-voltage characteristicsof 4H-silicon carbide 5.5 kV diodes at high and superhigh currentdensities

Steady-state and transient forward current-voltage I-V characteristics have been measured in 5.5 kV p⁺-n-n⁺ 4H-SiC rectifier diodes up to a current density j≈5.5×10 ⁴ A/cm². The steady-state data are compared with calculations in the framework of a model, in which the emitter injection coefficient decreases with increasing current density. To compare correctly the experimental and theoretical results, the lifetime of minority carriers for high injection level, τ_ph, has been estimated from transient characteristics. At low injection level, the hole diffusion length L_pl has been measured by photoresponse technique. For a low-doped n-base, the hole diffusion lengths are L_pl≈2 μm and L_ph≈6-10 μm at low and high injection levels respectively. Hole lifetimes for low and high injection levels are τ_pl≈15 ns and τ_ph≈140-400 ns. The calculated and experimental results agree well within the wide range of current densities 10 A/cm ²3 A/cm². At j>5 kA/cm², the experimental values of residual voltage drop V is lower than the calculated ones. In the range of current densities 5×10³ A/cm²4 A/cm², the minimal value of differential resistance R_d =dV/dj is 1.5×10^-4 Ω cm². At j>25 kA/cm², R_d increases with increasing current density manifesting the contribution of other nonlinear mechanisms to the formation steady-state current-voltage characteristic. The possible role of Auger recombination is also discussed     

Power performance of InP-based single and double heterojunctionbipolar transistors

The microwave and power performance of fabricated InP-based single and double heterojunction bipolar transistors (HBTs) is presented. The single heterojunction bipolar transistors (SHBTs), which had a 5000 Å InGaAs collector, had BV_CEO of 7.2 V and J_Cmax of 2×10⁵ A/cm². The resulting HBTs with 2×10 μm² emitters produced up to 1.1 mW/μm2 at 8 GHz with efficiencies over 30%. Double heterojunction bipolar transistors (DHBTs) with a 3000-Å InP collector had a BV_CEO of 9 V and J_{c max} of 1.1×10⁵ A/cm², resulting in power densities up to 1.9 mW/μm² at 8 GHz and a peak efficiency of 46%. Similar DHBTs with a 6000 Å InP collector had a higher BV_CEO of 18 V, but the J _{c max} decreased to 0.4×10⁵ A/cm² due to current blocking at the base-collector junction. Although the 6000 Å InP collector provided higher f_max and gain than the 3000 Å collector, the lower J_{c max} reduced its maximum power density below that of the SHBT wafer. The impact on power performance of various device characteristics, such as knee voltage, breakdown voltage, and maximum current density, are analyzed and discussed     

Emission cross sections and spectroscopy of Ho3+ laserchannels in KGd(WO4)2 single crystal

The spectroscopic properties of Ho³⁺ laser channels in KGd(WO₄)₂ crystals have been investigated using optical absorption, photoluminescence, and lifetime measurements. The radiative lifetimes of Ho³⁺ have been calculated through a Judd-Ofelt (JO) formalism using 300-K optical absorption results. The JO parameters obtained were Ω₂=15.35×10^-20 cm², Ω ₄=3.79×10^-20 cm², Ω₆ =1.69×10^-20 cm². The 7-300-K lifetimes obtained in diluted (8·10¹⁸ cm^-3) KGW:0.1% Ho samples are: τ(⁵F₃)≈0.9 μs, τ( ⁵S₂)=19-3.6 μs, and τ(⁵F₅ )≈1.1 μs. For Ho concentrations below 1.5×10²⁰ cm^-3, multiphonon emission is the main source of non radiative losses, and the temperature independent multiphonon probability in KGW is found to follow the energy gap law τ_ph ^-1(0)=βexp(-αΔE), where β=1.4×10^-7 s^-1, and α=1.4×10³ cm. Above this holmium concentration, energy transfer between Ho impurities also contributes to the losses. The spectral distributions of the Ho³⁺ emission cross section σ_EM for several laser channels are calculated in σ- and π-polarized configurations. The peak a σ_EM values achieved for transitions to the ⁵I₈ level are ≈2×10^-20 cm² in the σ-polarized configuration, and three main lasing peaks at 2.02, 2.05, and 2.07 μm are envisaged inside the ⁵I₇→⁵I₈ channel     

Polycrystalline silicon thin film transistors fabricated at reducedthermal budgets by utilizing fluorinated gate oxidation

Polycrystalline silicon thin film transistors have been fabricated at reduced gate oxidation thermal budgets by utilizing NF₃-enhanced dry oxidation. Good performance TFTs with effective electron mobility values as high as 38 cm²/V.sec, threshold voltage values near zero, ON/OFF current ratios of up to 5×10⁷ and subthreshold slopes of 0.3 V/dec have been fabricated at an oxidation temperature of 800°C. Stable devices at an electrical stressing field of 3 MV/cm were demonstrated. Thermal gate oxide TFTs have also been fabricated at a maximum temperature of 650°C. The effect of hydrogen plasma passivation was found to depend on process conditions and was correlated with the amount of fluorine in the area near the Si-SiO₂ interface. Passivation at low power was always beneficial. Passivation at high power was highly beneficial for a limited amount of interfacial fluorine, but less beneficial or even detrimental when a large fluorine amount in the near interface area was present     

Deposition of uniform Zr-Sn-Ti-O films by on-axis reactivesputtering

We describe the deposition of amorphous Zr-Sn-Ti-O (aZTT) dielectric thin films using conventional on-axis reactive sputtering. Thin films of composition Zr_0.2Sn_0.2Ti_0.6 O₂ have excellent dielectric properties: 40-50-nm thick films with a dielectric constant of 50-70 were obtained, depending on the processing conditions, yielding a specific capacitance of 9-17 fF/μm². Breakdown fields were measured to be 3-5 MV/cm, yielding a figure of merit εε₀E_br=15-30 μC/cm², up to eightfold higher than conventional deposited SiO₂. Leakage currents, measured at 1.0 MV/cm, were in the range 10^-9-10^-7 A/cm². This material appears well-suited for use in Si-IC device technology, for example as storage capacitors in DRAM     

Low temperature polycrystalline silicon thin film transistor withsilicon nitride ion stopper

The authors have fabricated a new low temperature polycrystalline silicon (poly-Si) thin film transistor (TFT) with silicon nitride (SiN _x) ion-stopper and laser annealed poly-Si. The fabricated poly-Si TFT using SiN_x as the ion-stopper as well as the gate insulator exhibited a field effect mobility of 110 cm²/Vs, subthreshold voltage of 5.5 V, subthreshold slope of 0.48 V/dec., and on/off current ratio of ~10⁶. Low off-state leakage current of 2.4×10^-2 A/μm at the drain voltage of 5 V and the gate voltage of -5 V was achieved     

High performance poly-Si TFTs fabricated using pulsed laserannealing and remote plasma CVD with low temperature processing

Key technologies for fabricating polycrystalline silicon thin film transistors (poly-Si TFTs) at a low temperature are discussed. Hydrogenated amorphous silicon films were crystallized by irradiation of a 30 ns-pulsed XeCl excimer laser. Crystalline grains were smaller than 100 nm. The density of localized trap states in poly-Si films was reduced to 4×10¹⁶ cm^-3 by plasma hydrogenation only for 30 seconds. Remote plasma chemical vapor deposition (CVD) using mesh electrodes realized a good interface of SiO ₂/Si with the interface trap density of 2.0×10¹⁰ cm^-2 eV^-1 at 270°C. Poly-Si TFTs were fabricated at 270°C using laser crystallization, plasma hydrogenation and remote plasma CVD. The carrier mobility was 640 cm²/Vs for n-channel TFTs and 400 cm²/Vs for p-channel TFTs. The threshold voltage was 0.8 V for n-channel TFTs and -1.5 V for p-channel TFTs. The leakage current of n-channel poly-Si TFTs was reduced from 2×10^-10 A/μm to 3×10^-13 A/μm at the gate voltage of -5 V using an offset gate electrode with an offset length of 1 μm     

High temperature formed SiGe p-MOSFETs with good devicecharacteristics

We have used a simple process to fabricate Si_0.3Ge_0.7/Si p-MOSFETs. The Si_0.3Ge _0.7 is formed using deposited Ge followed by 950°C rapid thermal annealing and solid phase epitaxy that is process compatible with existing VLSI. A hole mobility of 250 cm²/Vs is obtained from the Si_0.3Ge_0.7 p-MOSFET that is ~two times higher than Si control devices and results in a consequent substantially higher current drive. The 228 Å Si_0.3Ge_0.7 thermal oxide grown at 1000°C has a high breakdown field of 15 MV/cm, low interface trap density (D_it) of 1.5×10¹¹ eV^-1 cm^-2, and low oxide charge of 7.2×10¹⁰ cm^-2. The source-drain junction leakage after implantation and 950°C RTA is also comparable with the Si counterpart     

An 1800 V triple implanted vertical 6H-SiC MOSFET

6H silicon carbide vertical power MOSFETs with a blocking voltage of 1800 V have been fabricated. Applying a novel processing scheme, n ⁺ source regions, p-base regions and p-wells have been fabricated by three different ion implantation steps. Our SiC triple ion implanted MOSFETs have a lateral channel and a planar polysilicon gate electrode. The 1800 V blocking voltage of the devices is due to the avalanche breakdown of the reverse diode. The reverse current density is well below 200 μA/cm² for drain source voltages up to 90% of the breakdown voltage. The MOSFETs are normally off showing a threshold voltage of 2.7 V. The active area of 0.48 mm² delivers a forward drain current of 0.3 A at Y_GS=10 V and V _DS=8 V. The specific on resistance was determined to 82 mΩdcm² at 50 mV drain source voltage and at V_GS =10 V which corresponds to an uppermost acceptable oxide field strength of about 2.7 MV/cm. This specific on resistance is an order of magnitude lower than silicon DMOSFET's of the same blocking capability could offer     

Studies of yttrium oxide films prepared by RF magnetron sputtering

Films of yttrium oxide (Y₂O₃) were deposited on Si substrates from a Y₂O₃ target by RF magnetron sputtering. MIS capacitors in the form of Al and Y₂O₃ (400 Å)-Si were then fabricated. The leakage current density was about 10^-6 A/cm² at 1.3×10⁶ V/cm, and the breakdown field of the films was about 2.75×10⁶ V/cm. The dielectric constant of the sputtered Y₂O₃ was found to be about 12-12.7     

Carrier transport related analysis of high-power AlGaN/GaN HEMTstructures

Shubnikov-de Haas (SdH) oscillation and Hall measurement results were compared with HEMT DC and RF characteristics for two different MOCVD grown AlGaN-GaN HEMT structures on semiinsulating 4H-SiC substrates. A HEMT with a 40-nm, highly doped AlGaN cap layer exhibited an electron mobility of 1500 cm²/V/s and a sheet concentration of 9×10¹² cm at 300 K (7900 cm²/V/s and 8×10¹² cm^-2 at 80 K), but showed a high threshold voltage and high DC output conductance. A 27-nm AlGaN cap with a thinner, lightly doped donor layer yielded similar Hall values, but lower threshold voltage and output conductance and demonstrated a high CW power density of 6.9 W/mm at 10 GHz. The 2DEG of this improved structure had a sheet concentration of n_SdH=7.8×10¹² cm^-2 and a high quantum scattering lifetime of τ_q=1.5×10^-13 s at 4.2 K compared to n_SdH=8.24×10¹² cm^-2 and τ_q=1.72×10^-13 s for the thick AlGaN cap layer structure, Despite the excellent characteristics of the films, the SdH oscillations still indicate a slight parallel conduction and a weak localization of electrons. These results indicate that good channel quality and high sheet carrier density are not the only HEMT attributes required for good transistor performance     

A GaAs MOSFET with a liquid phase oxidized gate

Low leakage current density (as low as 10^-8 A/cm² at an applied voltage of 5 V) and high breakdown electrical field (larger than 4.5 MV/cm) of the liquid phase chemical-enhanced oxidized GaAs insulating layer enable application to the GaAs MOSFET. The oxide layer is found to be a composite of Ga₂O₃, As, and As₂O₃. The n-channel depletion mode GaAs MOSFET's are demonstrated and the I-V curves with complete pinch-off and saturation characteristics can be seen. A transconductance larger than 30 mS/mm can be achieved which is even better than that of MESFET's fabricated on the same wafer structure     

Nitrogen-implanted SiC diodes using high-temperature implantation

6H-SiC diodes fabricated using high-temperature nitrogen implantation up to 1000°C are reported. Diodes were formed by RIE etching a 0.8-μm-deep mesa across the N⁺/P junction using NF₃/O₂ with an aluminum transfer mask. The junction was passivated with a deposited SiO₂ layer 0.6 μm thick. Contacts were made to N⁺ and P regions with thin nickel and aluminum layers, respectively, followed by a short anneal between 900 and 1000°C. These diodes have reverse-bias leakage at 25°C as low as 5×10^-11 A/cm² at 10 V     

1.1 kV 4H-SiC power UMOSFETs

Silicon Carbide (4H-SiC), power UMOSFETs were fabricated and characterized from room temperature to 200°C. The devices had a 12-μm thick lightly doped n-type drift layer, and a nominal channel length of 4 μm. When tested under Fluorinert^TM at room temperature, blocking voltages ranged from 1.0 kV to 1.2 kV. Effective channel mobility ranged from 1.5 cm²/V.s at room temperature with a gate bias of 32 V (3.5 MV/cm) up to 7 cm²/V.s at 100°C with an applied gate bias of 26 V (2.9 MV/cm). Specific on-resistance (R_on,sp) was calculated to be as low as 74 mΩ.cm² at 100°C under the same gate bias     

High-Performance Inversion-Type Enhancement-Mode InGaAs MOSFET With Maximum Drain Current Exceeding 1 A/mm

High-performance inversion-type enhancement- mode (E-mode) n-channel In_0.65Ga_0.35As MOSFETs with atomic-layer-deposited Al₂O₃ as gate dielectric are demonstrated. A 0.4-mum gate-length MOSFET with an Al₂O₃ gate oxide thickness of 10 nm shows a gate leakage current that is less than 5 times 10^-6 A/cm² at 4.0-V gate bias, a threshold voltage of 0.4 V, a maximum drain current of 1.05 A/mm, and a transconductance of 350 mS/mm at drain voltage of 2.0 V. The maximum drain current and transconductance scale linearly from 40 mum to 0.7 mum. The peak effective mobility is ~1550 cm²/V ldr s at 0.3 MV/cm and decreases to ~650 cm²/V ldr s at 0.9 MV/cm. The obtained maximum drain current and transconductance are all record-high values in 40 years of E-mode III-V MOSFET research.     

Bi1.5Zn1.0 Nb1.5O7栅绝缘层的SiO2修饰对ZnO-TFTs性能的影响

具有高介电常数的栅绝缘层材料存在某种极化及耦合作用,使得ZnO-TFTs具有高的界面费米能级钉扎效应、大的电容耦合效应和低的载流子迁移率.为了解决这些问题,本文提出了一种使用SiO₂修饰的Bi_1.5Zn_1.0Nb_1.5O₇作为栅绝缘层的ZnO-TFTs结构,分析了SiO₂修饰对栅绝缘层和ZnO-TFTs性能的影响.结果表明,使用SiO₂修饰后,栅绝缘层和ZnO-TFTs的性能得到显著提高,使得ZnO-TFTs在下一代显示领域中具有非常广泛的应用前景.栅绝缘层的漏电流密度从4.5×10^-5A/cm²降低到7.7×10^-7A/cm²,粗糙度从4.52nm降低到3.74nm,ZnO-TFTs的亚阈值摆幅从10V/dec降低到2.81V/dec,界面态密度从8×10¹³cm^-2降低到9×10¹²cm^-2,迁移率从0.001cm²/（V·s）升高到0.159cm²/（V·s）.     

Polysilicon emitter p-n-p transistors

In-situ boron-doped polysilicon has been used to form the emitter in p-n-p transistors. Various polysilicon deposition conditions, interface preparation treatments prior to deposition, and post-deposition anneals were investigated. Unannealed devices lacking a deliberately grown interfacial oxide gave effective emitter Gummel numbers G_E of 7-9×10^-12s cm^-4 combined with emitter resistances R_E of approximately 8 μΩcm². Introduction of a chemically grown interfacial oxide increased G_E to 2×10 ¹⁴s cm^-4, but also raised R_E by a factor of three. Annealing at 900°C following polysilicon deposition raised G_E values for transistors lacking deliberate interfacial oxide to approximately 6×10¹³s cm^-4, but had little effect of G_E for devices with interfacial oxide. Both types of annealed devices gave R_E values in the range 1-2 μΩcm²     

Fabrication of planar optical waveguides in LiB3O5 by 2 MeV He+ ion implantation

The fabrication of planar optical waveguides in LiB₃O ₅ is discussed. Using 2-MeV ⁴He⁺ implantation with a dose of 1.5×10¹⁶ ions/cm² at 300 K, the refractive indexes of a 0.2-μm-thick layer 5.1 μm below the crystal surface are reduced to form optical barrier guides. For this ion dose the maximum change from the bulk values of refractive index at a wavelength of 0.488 μm are 1.5%, 5.25%, and 4% for n_x, n_y, and n_z, respectively. The refractive indexes of the guiding region change by less than 0.02% from the bulk values. The dose dependence of the optical barrier height has been measured. A threshold ion dose of about 0.75×10¹⁶ ions/cm² is required to form a refractive index barrier and ion doses higher than about 2.5×10¹⁶ ions/cm². saturate the refractive index decrease. Waveguide propagation losses for annealed single energy implants of dose 1.5×10¹⁶ ions/cm² are dominated by tunneling and are estimated to be ~8.9 dB/cm for the z-cut waveguides used. Multiple energy implants broaden the optical barrier, and losses of <4 dB/cm have been observed