Electromigration failure distributions of dual damascene Cu /low – k interconnects

The reliability of dual damascene Cu/low – k interconnects is limited by electromigration – induced void formation at vias. In this paper we investigate via void morphologies and associated failure distributions at the low percentiles typical of industry reliability requirements. We show that Cu/low – k reliability is fundamentally limited by the formation of slit – voids under vias. Using experimental and simulation approaches we clarify the practical importance of apparent incubation phenomena associated with this failure mode.     

Electromigration performance of Al–Si–Cu filled vias with titanium glue layer

Electromigration performance of vias filled with high temperature (480°C) sputtered Al alloys on Ti glue layers was investigated in comparison with W-stud vias. Electromigration lifetime and failure mode are quite different according to via structures and kinds of Al alloys used. Electromigration lifetime of W-stud via chain and Al–Cu filled via chain depends on the via to via distances, while that of Al–Si–Cu filled via chain does not depend on the via to via distances. Failure mode observations revealed that voids were formed only at a few locations in the test structure in Al–Si–Cu filled via chain while voids were formed at every via in W-stud via chains and Al–Cu filled via chains. It is supposed that Al moves through the Al–Si–Cu filled vias during electromigration test in spite of the existence of the Ti glue layer at the via bottom. The Al transportation, however, was prohibited at W-stud vias and Al–Cu filled vias. Glue Ti deposited at via bottom was converted to Al–Ti–Si alloy in Al–Si–Cu filled vias, while Al₃Ti alloy was formed at Al–Cu filled via bottom. It is speculated that Al transportation occurs through via bottom Al–Ti–Si alloy layer during electromigration test in the case of Al–Si–Cu filled vias.     

Electromigration in fine-line conductors (0.45–2 μm)

The electromigration behaviour of various metallization systems has been tested on Si, GaAs and GaInAs substrates. Lifetime dependence on temperature and current density has been measured by accelerated lifetime tests. Linewidth was between 0.45 μm and 2 μm. The best electromigration resistance was found for electroplated gold lines, however also the system Al on Ti showed a as much as 40 times better performance than standard Al metallization. For linewidths of 0.45 μm a steep increase in stability has been found.     

Electromigration of Sn–37Pb and Sn–3Ag–1.5Cu/Sn–3Ag–0.5Cu composite flip–chip solder bumps with Ti/Ni(V)/Cu under bump metallurgy

We examine electromigration fatigue reliability and morphological patterns of Sn–37Pb and Sn–3Ag–1.5Cu/Sn–3Ag–0.5Cu composite solder bumps in a flip–chip package assembly with Ti/Ni(V)/Cu UBM. The flip–chip test vehicle was subjected to test conditions of five combinations of applied electric currents and ambient temperatures, namely, 0.4 A/150 °C, 0.5 A/150 °C, 0.6 A/125 °C, 0.6 A/135 °C, and 0.6 A/150 °C. The electrothermal coupling analysis was employed to investigate the current crowding effect and maximum temperature in the solder bump in order to correlate with the experimental electromigration reliability using the Black’s equation as a reliability model. From available electromigration reliability models, we also present a comparison between fatigue lives of Sn–37Pb solder bumps with Ti/Ni(V)/Cu and those with Al/Ni(V)/Cu UBM under different current stressing conditions.     

Electromigration Reliability and Morphologies of 62Sn–36Pb–2Ni and 62Sn–36Pb–2Cu Flip-Chip Solder Joints

The near-eutectic Sn-Pb-Cu and Sn-Pb-Ni ternary solder alloys were developed based on the consideration of strength and fatigue reliability enhancement of solder joints in part via the altering of formation of interfacial intermetallic compounds. In this work, we examine electromigration reliability and morphologies of 62Sn-36Pb-2Ni and 62Sn-36Pb-2Cu flip-chip solder joints subjected to two test conditions that combine different average current densities and ambient temperatures: 5 kA/cm² at 150 degC and 20 kA/cm² at 3 degC. Under the test condition of 5 kA/cm² at 150 degC, 62Sn-36Pb-2Cu is overwhelmingly better than 62Sn-36Pb-2Ni in terms of electromigration reliability. However, under the test condition of 20 kA/cm2 at 30 degC, the electromigration fatigue life of 62Sn-36Pb-2Ni shows a profuse enhancement and exceeds that of 62Sn-36Pb-2Cu. Electromigration-induced morphologies are also examined on the cross sections of solder joints using scanning electron microscopy.     

Electromigration Studies of Cu/Carbon Nanotube Composite Interconnects Using Blech Structure

The electromigration (EM) properties of pure Cu and Cu/carbon nanotube (CNT) composites were studied using the Blech test structure. Pure Cu and Cu/CNT composite segments were subjected to a current density of $hbox{1.2} times hbox{10}^{6} hbox{A/cm}^{2}$. The average void growth rate of Cu/CNT composite sample was measured to be around four times lower than that of the pure copper sample. The average critical current-density–length threshold products of the pure Cu and Cu/CNT composites were estimated to be 1800 and 5400 A/cm, respectively. The slower EM rate of the Cu/CNT composite stripes is attributed to the presence of CNT, which acts as trapping centers and causes a decrease in the diffusion of EM-induced migrating atoms.      

Electromigration of Cu/low dielectric constant interconnects

Electromigration in damascene Cu/low dielectric constant interconnects with overlayers of CoWP, Ta/TaN, SiN_x or SiC_xN_yH_z and Cu(Ti) interconnects capped with SiN_x was studied. The results showed that the migration fast path in the bamboo-like lines primarily occurred at the interface. Cu lines fabricated with various forms of TaN/Ta liner including PVD TaN, ALD TaN, and PVD body centered cubic α- or tetragonal β-Ta liners were also investigated. Both thin surface layers of CoWP or Ta/TaN and the addition of Ti in the Cu lines significantly reduced the Cu/cap interface diffusivity and remarkably improved the electromigration lifetime when compared with Cu lines capped with SiN_x or SiC_xN_yH_z. Activation energies for electromigration were found to be 1.9–2.4 eV, 1.4 eV, 0.85–1.1 eV, and 1.3 eV for the bamboo-like Cu lines capped with CoWP, Ta/TaN, and SiN_x or SiC_xN_yH_z, and Cu(Ti) bamboo lines capped with SiN_x, respectively. The structural phase of the Ta was found to have an insignificant effect on the Cu mass flow rate. A large via size, thicker liner and/or stable connected exposed liner can provide a longer lifetime and tighter lifetime distribution, at the expense of chip density or effective Cu line conductivity.     

小房间长、宽、高“合适比例”的运用及优化

在刚性矩形封闭房间内所激发的谐振频率的分布均匀程度决定于房间长、宽、高尺寸的比例.合适的比例对降低房间低频声染色起着至关重要的作用.首先根据房间“合适比例”的量化评估方法给出几种最值得推荐的房间长、宽、高尺寸的“合适比例”.然后根据不同使用场合运用这些“合适比例”.然而这些“合适比例”在使用上具有一定的局限性,因而对于不宜采用这些比例的房间可以通过计算机程序进行尺寸或比例的优化,以提高房间空间利用率,并减轻声染色对房间音质的不利影响.     

Synthesis,Crystal Structure,and Magnetic Properties of ϵ‐InxFe2–xO3 Nanorod‐Shaped Magnets

A series of ?‐In_xFe_2–xO₃ nanorods are prepared by combining the reverse‐micelle and the sol–gel methods. Metal replacement was achieved in the region of 0 ≤ x ≤ 0.24. The crystal structures are orthorhombic structures (space group: Pna2₁), which are pyroelectric with an electric polarization along the c axis. The transmission electron microscopy images show that the particle sizes are (80 ± 40) × (23 ± 5) nm (x = 0), (65 ± 30) × (30 ± 10) nm (x = 0.12), and (80 ± 40) × (35 ± 15) nm (x = 0.24). The magnetization versus temperature curves of the samples with x = 0, x = 0.12, and x = 0.24 show spontaneous magnetization with Curie temperatures of 495 K, 456 K, and 414 K, respectively. Their coercive fields at 300 K are 20 kOe (x = 0), 14 kOe (x = 0.12), and 9 kOe (x = 0.24). These samples show a spin reorientation with reorientation temperatures (T_p) of 102 K (x = 0), 149 K (x = 0.12), and 180 K (x = 0.24). In particular, the samples with x = 0.12 and x = 0.24 show antiferromagnetic behavior below T_p. This series of ?‐In_xFe_2–xO₃ is the first example of a pyroelectric material that exhibits a phase transition between ferrimagnetism and antiferromagnetism.     

铜互连电迁移失效的研究与进展

Cu/低k互连的电迁移失效与互连材料、工艺、结构和测试条件都有着密切的联系。论述了近年来铜互连电迁移可靠性的研究进展,讨论了电迁移的基本原理、失效现象及其相关机制和微效应以及主导失效的机制——界面扩散等,同时探讨了改善铜互连电迁移性能的各种方法,主要有铜合金、增加金属覆盖层及等离子体表面处理等方法,并指出了Cu互连电迁移可靠性研究有待解决的问题。     

Electromigration Reliability and Morphologies of Cu Pillar Flip-Chip Solder Joints with Cu Substrate Pad Metallization

The Cu pillar is a thick underbump metallurgy (UBM) structure developed to alleviate current crowding in a flip-chip solder joint under operating conditions. We present in this work an examination of the electromigration reliability and morphologies of Cu pillar flip-chip solder joints formed by joining Ti/Cu/Ni UBM with largely elongated ∼62 μm Cu onto Cu substrate pad metallization using the Sn-3Ag-0.5Cu solder alloy. Three test conditions that controlled average current densities in solder joints and ambient temperatures were considered: 10 kA/cm² at 150°C, 10 kA/cm² at 160°C, and 15 kA/cm² at 125°C. Electromigration reliability of this particular solder joint turns out to be greatly enhanced compared to a conventional solder joint with a thin-film-stack UBM. Cross-sectional examinations of solder joints upon failure indicate that cracks formed in (Cu,Ni)₆Sn₅ or Cu₆Sn₅ intermetallic compounds (IMCs) near the cathode side of the solder joint. Moreover, the ~52-μm-thick Sn-Ag-Cu solder after long-term current stressing has turned into a combination of ~80% Cu-Ni-Sn IMC and ~20% Sn-rich phases, which appeared in the form of large aggregates that in general were distributed on the cathode side of the solder joint.     

The Polar/Antipolar Phase Boundary of BiMnO3–BiFeO3–PbTiO3: Interplay among Crystal Structure,Point Defects,and Multiferroism

The ferromagnetic perovskite oxide BiMnO₃ is a highly topical material, and the solid solutions it forms with antiferromagnetic/ferroelectric BiFeO₃ and with ferroelectric PbTiO₃ result in distinctive polar/nonpolar morphotropic phase boundaries (MPBs). The exploitation of such a type of MPBs could be a novel approach to engineer novel multiferroics with phase‐change magnetoelectric responses, in addition to ferroelectrics with enhanced electromechanical performance. Here, the interplay among crystal structure, point defects, and multiferroic properties of the BiMnO₃–BiFeO₃–PbTiO₃ ternary system at its line of MPBs between polymorphs of tetragonal P4mm (polar) and orthorhombic Pnma (antipolar) symmetries is reported. A strong dependence of the phase coexistence on thermal history is found: phase percentage significantly changes whether the material is quenched or slowly cooled from high temperature. The origin of this phenomenon is investigated with temperature‐dependent structural and physical property characterizations. A major role of the complex defect chemistry, where a Bi/Pb‐deficiency allows Mn and Fe ions to have a mixed‐valence state, in the delicate balance between polymorphs is proposed, and its influence in the magnetic and electric ferroic orders is defined.     

Reliability of Au bump––Cu direct interconnections fabricated by means of surface activated bonding method

As a room temperature bonding method, surface activated bonding (SAB) method has been introduced to be one of the most appropriate interconnection methods for the next generation of electronic packaging. Thus it is important to study the reliability of SAB interconnection in long term life test.In this paper, interconnections of Au bump and Cu film bonded by SAB method were performed in high temperature thermal aging test. Degradation of properties such as electrical resistance, shear strength of bump and interface microstructure during aging process were studied to investigate the failure mechanism of the interconnection. Intermetallic compound Cu₃Au was found formed at the interface during thermal aging, and it causes evolvement of the properties and failure mode of the interconnection changing in shear test. Results reveal that SAB is suitable for the interconnection between Au bump and Cu film and it is reliable in thermal reliability test.     

Modal interference in a short fiber section: Fiber length, spliceloss, cutoff, and wavelength dependences

When a short fiber section is inserted within a fiber link, it is known that modal interference can create periodic oscillations in the wavelength dependence of the insertion loss and, accordingly, the insertion loss can exceed the sum of the interconnection losses (in decibels). This modal interference phenomenon is a potential cause of noise in telecommunications transmission systems. Experimental and theoretical investigations were performed in order to better understand its dependences on relevant fiber parameters and to generate engineering guidelines to minimize it in a telecommunication link     

Gate length electric parameter dependences of ultra-submicrometre delta -doped pseudomorphic HEMTs

AlGaAs/InGaAs/GaAs MODFETs having 20% indium in the channel and Si planar doping (5*10/sup 12/ cm/sup -2/) have been fabricated with gate lengths of 0.1-0.7 mu m and a width of 100 mu m. Gates that are longer than 0.2 mu m are T-shaped and the narrower gates (0.1 and 0.15 mu m) are triangular. From DC measurement a maximum G/sub m/ of 1100 mS/mm has been obtained. The current gain cutoff frequency F/sub t/ corrected for the access resistances is 145 GHz, corresponding to an intrinsic transition frequency of 220 GHz.<>     

Electromigration and Thermomechanical Fatigue Behavior of Sn0.3Ag0.7Cu Solder Joints

The anisotropy of Sn crystal structures greatly affects the electromigration (EM) and thermomechanical fatigue (TMF) of solder joints. The size of solder joint shrinkage in electronic systems further makes EM and TMF an inseparably coupled issue. To obtain a better understanding of failure under combined moderately high (2000 A/cm²) current density and 10–150°C/1 h thermal cycling, analysis of separate, sequential, and concurrent EM and thermal cycling (TC) was imposed on single shear lap joints, and the microstructure and crystal orientations were incrementally characterized using electron backscatter diffraction (EBSD) mapping. First, it was determined that EM did not significantly change the crystal orientation, but the formation of Cu₆Sn₅ depended on the crystal orientation, and this degraded subsequent TMF behavior. Secondly, TC causes changes in crystal orientation. Concurrent EM and TC led to significant changes in crystal orientation by discontinuous recrystallization, which is facilitated by Cu₆Sn₅ particle formation. The newly formed Cu₆Sn₅ often showed its c-axis close to the direction of electron flow.     

Temperature dependences of threshold voltage and drain-induced barrier lowering in 60 nm gate length MOS transistors

The temperature dependence of threshold voltage (V_T) and drain-induced barrier lowering (DIBL) characteristics for MOS transistors fabricated with three different threshold voltage technologies are studied. We found that the technique employed to adjust the V_T value make the devices to be not well-scaled for short-channel effects for ultra-short devices at low temperatures. For devices with a short gate length (L<90 nm) and being fabricated using the low threshold voltage (low-V_T) technology, both the temperature dependencies of threshold voltage and DIBL are different to the standard-V_T and high-V_T ones. Abnormally large values of DIBL were found for low V_T-devices because of the significant encroachment of drain depletion region on the channel region. On the other hand, the high substrate doping in high-V_T process makes the devices to have a larger junction depth than that used in the standard process. It causes a poorer DIBL for short-channel devices. Hence the best scaling or design of the devices at room temperature does not imply that they should also be good at low temperatures, especially for L = 60 nm fabricated using the low-V_T process. Different device design and process optimization are required for devices to be operated at temperatures beyond the nominal range.     

Effects of fourth alloying additive on microstructures and tensile properties of Sn–Ag–Cu alloy and joints with Cu

The effects of the fourth elements, i.e., Fe, Ni, Co, Mn and Ti, on microstructural features, undercooling characteristics, and monotonic tensile properties of Sn–3 wt.%Ag–0.5 wt.%Cu lead-free solder were investigated. All quaternary alloys basically form third intermetallic compounds in addition to fine Ag₃Sn and Cu₆Sn₅ and exhibit improved solder structure. The precipitates of Sn–3Ag–0.5Cu (–0.1 wt.%X; X=Ni, Ti and Mn) alloy are very fine comparing with the other alloys. The effective elements for suppressing undercooling in solidification are Ti, Mn, Co and Ni. All quaternary bulk alloys exhibit similar or slightly larger tensile strengths; especially Mn and Ni can improve elongation without degrading strength. The interfacial phases of Sn–3Ag–0.5Cu (–0.1 wt.%X; X=Fe, Mn and Ti)/Cu joints are typical Cu₆Sn₅ scallops. Sn–3Ag–0.5Cu (–0.1 wt.%X; X=Ni and Co)/Cu joints form very fine Sn–Cu–Ni and Sn–Cu–Co scallops at interface. The Cu/Sn–3Ag–0.5Cu–0.1Ni/Cu joint exhibits improved tensile strength prior to thermal aging at 125 and 150 °C. The fracture surface of Cu/Sn–3Ag–0.5Cu/Cu joint exhibits mixture of ductile and brittle fractures, while Cu/Sn–3Ag–0.5Cu (–0.1X; X=Ni and Co)/Cu joints exhibit only brittle fracture at interface. The Sn–3Ag–0.5Cu–0.1Ni alloy is more reliable solder alloy with improved properties for all tests in the present work.     

Channel length and width dependence of hot-carrier hardness influorinated MOSFETs

A study of the interface degradation caused by channel-hot-electron (CHE) and substrate-hot-electron (SHE) injection in fluorinated MOSFETs and in unfluorinated control over a wide range of channel lengths and widths is discussed. In all cases, the fluorinated MOSFETs are more resistant to hot-electron-induced interface damage, although the beneficial effect of fluoride becomes less significant for submicrometer devices. For nonfluorinated control devices, a significant gate-size dependence of the transconductance degradation is observed after either CHE or SHE injection. In contrast, the fluorinated devices exhibit almost no gate-length dependence in the range of 0.6-10.0 μm or gate-width dependence in the range of 1.6-10.0 μm after SHE injection, in which the injected hot electrons assume much better areal uniformity than in CHE injection. However, significant gate-size dependence was observed in fluorinated devices after CHE injection, primarily due to the spatial nonuniformity of the CHE damage. The beneficial effect of F and its influence on the gate-size dependence in response to SHE injection may be attributed to the local strain relaxation near the SiO₂/Si interface where F is incorporated in the Si-O network. These results also suggest that the development of local-strain relaxed isolation technology will be important for deep-submicrometer MOSFETs