15-μm 128×128 GaAs/AlxGa1-xAsquantum well infrared photodetector focal plane array camera

In this paper, we discuss the development of very sensitive, very long wavelength infrared GaAs/Al_xGa_1-xAs quantum well infrared photodetectors (QWIPs) based on bound-to-quasi-bound intersubband transition, fabrication of random reflectors for efficient light coupling, and the demonstration of a 15-μm cutoff 128×128 focal plane array imaging camera. Excellent imagery, with a noise equivalent differential temperature (NEΔT) of 30 mK has been achieved     

9-μm cutoff 256×256 GaAs/AlxGa1-xAsquantum well infrared photodetector hand-held camera

A 9-μm cutoff 256×256 hand-held quantum well infrared photodetector (QWIP) camera has been demonstrated. Excellent imagery, with a noise equivalent differential temperature (NEΔT) of 26 mK has been achieved. In this paper, we discuss the development of this very sensitive long wavelength infrared (LWIR) camera based on a GaAs/AlGaAs QWIP focal plane array and its performance in quantum efficiency, NEΔT, minimum resolvable temperature (MRTD), uniformity, and operability     

基于MOCVD技术的长波AlGaAs/GaAs量子阱红外焦平面探测器

采用n型掺杂背面入射AlGaAs/GaAs量子阱结构,用MOCVD外延生长和GaAs集成电路工艺,设计制作了大面积AlGaAs/GaAs QWIP单元测试器件和128×128、128×160、256×256 AlGaAs/GaAs QWIP焦平面探测器阵列。 用液氮温度下的暗电流和傅里叶红外响应光谱对单元测试器件进行了评估,针对不同材料结构,实现了9 μm和10.9 μm的截止波长; 黑体探测率最高达到2.6×109 cm·Hz1/ 2·W-1 。 将128×128 AlGaAs/GaAs QWIP阵列芯片与CMOS读出电路芯片倒装焊互连,成功演示了室温环境下目 标的红外热成像;并进一步讨论了提高QWIP组件成像质量的途径。     

Long-wavelength 256×256 GaAs/AlGaAs quantum well infraredphotodetector (QWIP) palm-size camera

A 9 μm cutoff 256×256 palm-size quantum well infrared photodetector (QWIP) camera weighing only 2.5 lbs, and using 5.5 W of power has been demonstrated. Excellent imagery, with a noise equivalent differential temperature (NEΔT) of 23 mK has been achieved. It is well known that QWIP has very low 1/f noise, high operability, and uniformity. As a result, this camera uses a prerecorded nonuniformity correction table (i.e., gains and offsets) stored in its read-only-memory during operation, which enabled the miniaturization of this camera. In this paper, we discuss the development of this very sensitive long-wavelength infrared (LWIR) camera based on a GaAs/AlGaAs QWIP focal plane array (FPA) and its performance in terms of quantum efficiency, NEΔT, MRDT, uniformity, and operability     

AlGaAs/GaAs quantum well infrared photodetector focal plane array based on MOCVD technology

128 × 128, 128 × 160 and 256 × 256 AlGaAs/ GaAs quantum well infrared photodetector (QWIP) focal plane arrays (FPA) as well as a large area test device are designed and fabricated. The device with n-doped back-illuminated AIGaAs/GaAs quantum structure is achieved by metal organic chemical vapor deposition (MOCVD) epitaxial growth and GaAs integrated circuit processing technology. The test device is valued by its dark current performance and Fourier transform infrared spectroscopy (FTIR) spectra at 77 K. Cut off wavelengths of 9 and 10.9 μm are realized by using different epitaxial structures. The blackbody detectivity DB* is as high as 2.6 × 109 cm· Hz1/2·W-1. The 128 × 128 FPA is flip-chip bonded on a CMOS readout integrated circuit with indium (In) bumps. The infrared thermal images of some targets under room temperature background have been successfully demonstrated at 80 K operating temperature. In addition, the methods to further improve the image quality are discussed.     

9μm截止波长128×128 AlGaAs/GaAs量子阱红外焦平面探测器阵列

报道了128×128 AlGaAs/GaAs量子阱红外焦平面探测器阵列的设计和制作.采用金属有机化学气相淀积外延技术生长外延材料,并在GaAs集成电路工艺线上完成工艺制作.为得到器件参数,设计制作了台面尺寸为300μm×300μm的大面积测试器件;77K下2V偏压时暗电流密度为1.5×10-3A/cm2;80K工作温度下,器件峰值响应波长为8.4μm,截止波长为9μm,黑体探测率DB 为3.95×108(cm·Hz1/2)/W.将128×128元 AlGaAs/GaAs量子阱红外焦平面探测器阵列芯片与相关CMOS读出电路芯片倒装焊互连,在80K工作温度下实现了室温环境目标的红外热成像,盲元率小于1%.     

General-purpose 128/spl times/128 SIMD processor array with integrated image sensor

A CMOS image sensor/processor chip fabricated in a 0.35 /spl mu/m CMOS technology is presented. The chip contains a general purpose software-programmable SIMD array of 128/spl times/128 processing elements. It executes over 20 GOPS while dissipating 240 mW of power and achieves pixel-processor density of 410 cells/mm/sup 2/. Performance and accuracy measurement results are given.     

A 128×128-pixel standard-CMOS image sensor with electronicshutter

A 128×128-pixel image sensor with a 20 s-10^-4 s electronic shutter has been integrated in a 1.2-μm digital CMOS technology. The pixel cell consists of four PMOS transistors and a photodiode with antiblooming suppression. Each pixel measures 24 μm by 24 μm and has a fill factor of 25%. Current is used to transfer pixel signals to the column readout amplifiers in order to minimize voltage swings on the highly capacitive column lines. Correlated double sampling is used to reduce intracolumn fixed pattern noise. The saturation voltage is 470 mV. The peak output signal to noise ratio is 45 dB, and the optical dynamic range is 56 dB. The frame transfer rate is 1.7 ms per frame     

Infrared imaging using uncooled focal plane arrays of unreticulated10-μm potassium tantalum niobate films

Potassium tantalum niobate (KTN) films, 10-μm thick, with a nominal Curie temperature of -20°C were formed on polished platinum-coated sacrificial yttria substrates by metalorganic deposition (MOD). These KTN films were used to fabricate focal plane arrays consisting of 128×128 pixels with each pixel on 50-μm centers and 50-μm². Using f/1 optics and a 2.5-V/μm ² detector bias, a noise equivalent temperature (NEΔT) of 0.65°C was obtained for the best 1% of the pixels when the detector and blackbody source operated at 25°C     

128×128 element PtSi infrared CCD image sensor

A new 128×128 element PtSi Schottky barrier infrared image sensor with ITCCD readout structure and PtSi thin film optical cavity detector structure has been fabricated,which has 50μm×50 μm pixels,a fill factor of 40 percent,the nonuniformity of 5% or less and the dynamic range of over or equal to 50 dB.The noise equivalent temperature difference is 0.2 K with f/1.0 optics at 300 K background. In this paper,the principle of operation,design consideration and fabrication technology for the device are described.     

640×486 long-wavelength two-color GaAs/AlGaAs quantum wellinfrared photodetector (QWIP) focal plane array camera

We have designed and fabricated an optimized long-wavelength/very-long wavelength two-color quantum well infrared photodetector (QWIP) device structure. The device structure was grown on a 3-in semi-insulating GaAs substrate by molecular beam epitaxy (MBE). The wafer was processed into several 640×486 format monolithically integrated 8-9 and 14-15 μm two-color (or dual wavelength) QWIP focal plane arrays (FPAs). These FPAs were then hybridized to 640×486 silicon CMOS readout multiplexers. A thinned (i.e., substrate removed) FPA hybrid was integrated into a liquid helium cooled dewar for electrical and optical characterization and to demonstrate simultaneous two-color imagery. The 8-9 μm detectors in the FPA have shown background limited performance (BLIP) at 70 K operating temperature for 300 K background with f/2 cold stop. The 14-15 μm detectors of the FPA reaches BLIP at 40 K operating temperature under the same background conditions. In this paper we discuss the performance of this long-wavelength dualband QWIP FPA in terms of quantum efficiency, detectivity, noise equivalent temperature difference (NEΔT), uniformity, and operability     

160×128元多量子阱长波红外焦平面探测器件研制

报道了新研制出的160×128元GaAs/AlGaAs多量子阱长波红外焦平面器件。使用MBE的方法在半绝缘的GaAs衬底上生长器件结构；开发了用普通光刻技术和离子束刻蚀法制备2D光栅技术，以及探测器芯片与读出电路互联技术。在77 K时测试，器件的平均峰值探测率Dλ*=1.28×1010 cmW-1Hz1/2，峰值波长为λp=8.1 μm，截止波长为λc=8.47 μm。器件的非盲元率≥98.8％，不均匀性10％。     

A 128-pixel CMOS image sensor with integrated analog nonvolatilememory

A 128-pixel complementary metal-oxide-semiconductor (CMOS) image sensor array with analog nonvolatile storage for each pixel has been realized in a 1.5-μm single-poly standard CMOS/EEPROM technology and successfully tested. The integrated nonvolatile memory allows an offset correction for each sensor element, cancellation of the fixed pattern noise, and compensation of the background illumination. The sensor array can also learn a presented pattern and store it in its analog nonvolatile memory just by “seeing”. The stored pattern can be read out directly or, in combination with the optical input, it can be used for pattern recognition or motion detection. The required programming circuitry for the analog memory has been integrated on the same chip     

Effect of dislocations on 1/f noise of long wavelength infrared photodiodes fabricated with HgCdTe layers grown on GaAs by metalorganic vapor phase epitaxy

We studied the effect of dislocations on the 1/f noise current of long wavelength infrared photodiodes fabricated with HgCdTe layers grown on GaAs by metalorganic vapor phase epitaxy. N-on-p junctions were formed by boron ion implantation into Hg-vacancy doped epilayers. The 1/f noise dominated from 0.5 to 100 Hz, and shot noise caused by photocurrent (√2eI_p) dominated at higher frequencies. We observed two types of 1/f noise. One is caused by the leakage current generated at dislocations, and the other is induced by the photocurrent. The 1/f noise current increased with the photon flux in the low-etch pit density (EPD) range independently of EPD. It increased with EPD in the high-EPD range. The 1/f noise current measured at zero field of view increased with EPD. This suggests that the 1/f noise generated by the photocurrent dominated in the low-EPD range, and that the 1/f noise current caused by dislocations dominated in the high-EPD range. In order to obtain a thermal image of a room-temperature object, the 1/f noise current induced by background photon flux is as high as that caused by dislocations of more than 10⁷ cm⁻². Therefore, the 1/f noise current induced by the photocurrent is dominant in photodiodes fabricated with HgCdTe layers on GaAs, since the EPD is less than 2 x 10⁶ cm⁻². We expect the detectivity to be as high as with LPE-layers. We fabricated 64 x 64 photodiode arrays, and obtained a thermal image.     

Infrared focal plane array incorporating silicon IC processcompatible bolometer

A 128×128 element bolometer infrared image sensor using thin film titanium is proposed. The device is a monolithically integrated structure with a titanium bolometer detector located over a CMOS circuit that reads out the bolometer's signals. By employing a metallic material like titanium and refining the CMOS readout circuit, it is possible to minimize 1/f noise. It is demonstrated that the use of low 1/f noise material will help increase bias current and improve the S/N ratio. Since the fabrication process is silicon-process compatible, costs can be kept low     

A 35-ns 128K/spl times/8 CMOS SRAM

A 128 K/spl times/8-b CMOS SRAM with TTL input/output levels and a typical address access time of 35 ns is described. A novel data transfer circuit with dual threshold level is utilized to obtain improved noise immunity. A divided-word-line architecture and an automatic power reduction function are utilized to achieve a low operational power of 10 mW at 1 MHz, and 100 mW at 10 MHz. A novel fabrication technology, including improved LOCOS and highly stable polysilicon loads, was introduced to achieve a compact memory cell which measures 6.4/spl times/11.5 /spl mu/m/SUP 2/. Typical standby current is 2 /spl mu/A. The RAM was fabricated with 1.0-/spl mu/m design rules, double-level polysilicon, and double-level aluminum CMOS technology. The chip size of the RAM is 8/spl times/13.65 mm/SUP 2/.     

VLSI partitioning of a 2-Gs/s digital spectrometer

A digital correlating spectrometer for radioastronomy that is based on a custom GaAs digitizer and a custom micropipelined CMOS correlator is described. The digitizer quantizes at two gigasamples per second (Gs/s) and 2-b resolution. A GaAs demultiplexer distributes the data into eight parallel streams of 250 Ms/s each. The CMOS correlator operates at 250 Ms/s using 20 mW per correlator lag. The correlator output is processed on a host microcomputer to create a 1-GHz spectrum of the input signal that can be displayed interactively. An 8×9-mm chip is being developed in a 2-μ process that contains 320 correlator lags. The design is partitioned into GaAs and CMOS components according to the required throughput at each stage of the system. The fastest signals (2 GHz) are kept on the chip level to minimize delay, crosstalk, system noise, and power consumption. Moderate-speed signals (250 MHz) are driven by GaAs components. CMOS components are used where high-speed outputs are not required. A strong synergy between the correlator architecture and micropipelined CMOS technology improves the performance by an order of magnitude compared to existing designs. Preliminary correlator chips have been built and tested at 250 Ms/s; final chips are under design     

A 128-kb FeRAM macro for contact/contactless smart-card microcontrollers

This paper describes a 128-kb FeRAM macro for smart-card microcontrollers. This macro, which was designed and fabricated using a 0.35-/spl mu/m three-metal CMOS and a Capacitor-on-Metal/Via-stacked-Plug (CMVP) process technology, is ideally suited for recent system LSIs such as smart-card microcontrollers. It has a flexible memory size ranging from 32 to 128 kb, a low consumption current of 0.3 mA, and endurance of more than 10/sup 8/ write/read cycles under a wide range of supply voltages, from 2.7 to 5.5 V. These characteristics, which are required of not only contact-type smart-card microcontrollers but also contactless-type ones, were achieved by using four newly developed circuit technologies: 1) a three-metal CMVP memory cell; 2) a voltage-regulating architecture; 3) a main/sub bitline and wordline structure; and 4) a dynamic-type offset sense amplifier.     

Dual-modulus 127/128 FOM enhanced prescaler design in 0.35-/spl mu/m CMOS technology

The dual-modulus prescaler is a critical block in CMOS systems like high-speed frequency synthesizers. However, the design of high-moduli, high-speed, and low-power dual-modulus prescalers remains a challenge. To face the challenge, this paper introduces the idea of using transmission gates and pseudo-PMOS logic to realize the dual-modulus prescaler. The topology of the prescaler proposed is different from prior designs primarily in two ways: 1) it uses transmission gates in the critical path and 2) the D flip-flops (DFFs) used in the synchronous counter comprise pseudo-PMOS inverters and ratioed latches. A pseudo-PMOS logic-based DFF is introduced and used in the proposed prescaler design. Based on the proposed topology, a dual-modulus divide-by-127/128 prescaler is implemented in 0.35-/spl mu/m CMOS technology. It consumes 4.8 mW from a 3-V supply. The measured phase noise is -143.4 dBc/Hz at 600 kHz. The silicon area required is only 0.06 mm/sup 2/. There are no flip flops or logic gates in the critical path. This topology is suitable for high-speed and high-moduli prescaler designs. It reduces: 1) design complexity; 2) power consumption; and 3) input loading. Measurement results are provided. An improvement in the figure of merit is shown.     

A 1-GHz/0.9-mW CMOS/SIMOX divide-by-128/129 dual-modulus prescalerusing a divide-by-2/3 synchronous counter

An extremely low-power CMOS/SIMOX divide-by-128/129 dual-modulus prescaler that operates at up to 1 GHz and dissipates 0.9 mW at a supply voltage of 1 V is presented. The prescaler is capable of 2-GHz performance with dissipation of 7.2 mW at 2 V. This superior performance is primarily achieved by using an advanced ultrathin-film CMOS/SIMOX process technology combined with a circuit configuration that uses a divide-by-2/3 synchronous counter. Using these same technologies, a single-chip CMOS phase-locked-loop (PLL) LSI that uses the developed prescaler was fabricated. It can operate at up to 2 GHz while dissipating only 8.4 mW at a supply voltage of 2 V. Even at a lower supply voltage of 1.2 V, 1-GHz operation can be obtained with a corresponding power consumption of 1.4 mW. These results indicate that the high-speed and very-low-power features of CMOS/SIMOX technology could have an important impact on the development of future personal communication systems