The spectral response of BSF silicon solar cells fabricated through masked ion implantation

The work presents the main peculiarities of the spectral response of back-surface-field (BSF) silicon solar cells fabricated through masked ion implantation of the n+-p junction. The emphasis is on the shift of maximum responsivity toward the visible spectrum and on the large bandwidth of these n+-p-p+ optical sensors. The dependence of these parameters on technological parameters are outlined in the communication.     

背电场硅太阳能电池离子辐照效应

空间太阳能电池受电子、质子，以及重离子辐照后，要受到损伤。文章对背电场太阳能电池低能质子、高能质子、碳、氧离子辐照效应进行了研究，对辐照前后太阳能电池光电参数进行测量，并用Ｍａｔｔｅ－Ｃａｒｌｏ方法对辐照粒子的硅中的能量损失过程进行了模拟计算。结果表明，各种离子辐照技术电池的损伤是不同的，低能质子对开路电压的损伤比对睡电压的损伤大得多，而高能质子 地开路电压的损伤较低能质子的反而要小，对短路电流的     

Passivated millimeter-wave silicon IMPATT diodes fabricated by ion implantation

Ion implantation has been combined with planar-mesa processing techniques to realize a passivated silicon IMPATT diode for millimeter-wavelength operation. A continuous-wave output power of 100 mW was obtained at 62 GHz from a fully passivated single-drift-region p⁺-n-n⁺structure.     

Study of injection effects on BSF silicon solar cells

The behavior of p⁺-n-n⁺ and n⁺-p-p⁺ silicon solar cells in terms of short-circuit current, open-circuit voltage, fill factor, and efficiency is studied as a function of base doping and illumination levels. A theoretical model that is valid for any injection level in the base region is used. Experimental results for cells of n-type base (in the range of 0.3 to 1000 Ω-cm) and a p-type base (0.4 to 300 Ω-cm) are presented. The theoretical model is able to explain phenomena such as the superlinearity of I_sc with concentration and the degradation of short-circuit current and efficiency at very high concentrations. These effects are seen as connected with the ohmic electric field in the base region. For the emitter saturation currents considered here, it can be concluded that, for p-type substrates, low base resistivities (≅1 Ω-cm) are necessary to achieve high efficiencies under concentrated light (≅100 suns), while for flat-array cells a particular resistivity is not required. For n-type substrates, it is found that any resistivity level can be used for both flat-array and concentrator cells     

Boron ion implantation in silicon through selectively deposited tungsten films

The effect of implanting boron into silicon through thin selective tungsten films and annealing to form silicided p⁺-n junctions is investigated. A rate limited thickness of 0.011-µm tungsten is shown to have the equivalent stopping power of 0.08-µm oxide and be similarly ineffective in eliminating axial boron channeling. Nonetheless, junction diodes as shallow as 0.25µm with sheet resistances of 7 Ω, exhibiting nearly idealI-Vcharacteristics from -40 to 100°C, are fabricated. Analysis of the areal and perimeter leakage currents suggests that defects at the WSi2-SiO2interface are the contributing generation-recombination sites.     

ISFET's with ion-sensitive membranes fabricated by ion implantation

Ion sensitive FETs (ISFETs) for sodium ions (Na⁺) fabricated by ion-implantation are investigated. The sensing layers are produced by implanting Na⁺ ions into the surface of an oxidized Si₃N₄ layer through an Al buffer layer deposited beforehand, in order to reduce the damage to the gate insulator of the ISFET during ion implantation. The Na⁺ sensitivity, selectivity, repeatability, thermal characteristics, and long-term stability are evaluated. The ISFET responds to Na⁺ ions independent of pH within the range of pH 7-10, and the Na⁺ sensitivity is nearly Nernstian. The ISFETs repeatability and long-term stability (about 1300 h), suggests that the ion-implantation technique is a suitable method for fabricating a stable ion-sensing layer     

PbS photodiodes fabricated by Sb+ ion implantation

N-p junction photodiodes in PbS have been fabricated using Sb⁺ ion implantation to create the n-type layer. At 300°K, 15-mil-square diodes have shown typical zero-bias resistances of $\text{200 Ω}$ corresponding to a resistance-area product of $\text{0.28 Ω-}\text{cm}{}^2$. At 195°K, the zero-bias resistance increased to $\text{50}\text{k}\text{Ω}$ for a resistance-area product of $\text{70 Ω-}\text{cm}{}^2$, and at 77°K, the zero-bias resistance was $\text{5 × 10}{}^9\text{Ω}$ for a resistance-area product of $\text{7 × 10}{}^6\text{Ω-}\text{cm}{}^2$. Peak detectivities occurred at 2.55, 2.95, and 3.4 μm at 300°K, 195°K and 77°K, respectively. The corresponding measured detectivities were 4.8 × 10⁹, 1.1 × 10¹¹ and 4.2 × 10¹² cm Hz^{$\text{1}\text{2}$}/W. The 77°K detectivity was measured in a reduced background and was amplifier noise limited. Peak quantum efficiencies were typically 50–60 per cent.     

MOS field effect transistors formed by gate masked ion implantation

MOS enhancement mode field effect transistors with a circular geometry and with drains offset from the gate by distances from 0.1 mil to 0.9 mil were implanted with boron ions to fill in the offset region and thus achieve perfect alignment (i.e., no overlap) between gate and drain. The energies used were 50 to 100 keV and a 4000 Å-thick aluminum gate acted as a mask to prevent ions from penetrating into the channel region. The best junctions were obtained with 100-keV ions, with the sheet resistances being typically 4000 ω/□ for the implanted region. This additional drain resistance was quite small compared to the channel resistance of the devices and so was not objectionable. Ordinary diffused MOSFET's were included on the same wafers for comparison with the ion implanted MOSFET's. It was found that the differences in noise, leakage, and drain breakdown voltage were not serious. The chief advantage of the ion implanted MOSFET is the extremely low feedback capacitance due to the lack of gate-drain overlap, but this advantage is difficult to exploit in a conventional package because of the package capacitance. However, a significant difference was noted in switching characteristics between diffused and ion implanted MOSFET's mounted on TO-18 headers.     

High-voltage buried-channel MOS fabricated by oxygen implantation into silicon

A high-voltage offset-gate buried-channel MOS made on a SOS-like substrate is described. An isolation layer is formed by an oxygen implantation process called SIMOX. A 410 V buried SiO2 breakdown voltage and a 180 V drain breakdown voltage are obtained.     

A universal ion implantation model for all species intosingle-crystal silicon

A physically based model for ion implantation of any species into single crystal silicon has been developed, tested and implemented in the ion implant simulator, UT-MARLOWE. In this model, an interpolation scheme, based on mathematical properties of ion-target interatomic potential, was employed and implemented to calculate the scattering process. Using this scheme, the resulting energy, direction and momentum of the ion and target can be derived from the existing scattering tables of UT-MARLOWE without calculating the entire scattering process. The method has advantages in terms of both accuracy and computational efficiency, as well as significantly reduced cost of code development. The impurity profiles and damage profiles predicted by the model simulations have been compared with secondary ion mass spectroscopy (SIMS) and Rutherford backscattering spectrometry (RBS), and excellent agreement with experimental data has been achieved     

Monitoring of low-dose ion implantation in silicon

Monitoring of low-dose arsenic or boron ion implantation (doses: 5×10¹⁰ to 1×10¹³ cm^-2) in silicon, which is required for threshold voltage control of MOS transistors, is studied. The thermal-wave (TW) signal intensity decreases monotonically with decreasing dose. The lowest detection limit for As⁺ and B⁺ implantations is 5×10¹⁰ and 1×10¹¹ cm^-2, respectively. Correlation of the TW signal intensity versus damage density, TW intensity versus dose, and laser Raman intensity versus dose is obtained. The TW intensity is also correlated with the sheet conductance, and the threshold voltage of the transistor. Therefore, this technique is useful as a nondestructive, highly sensitive dose monitor for low-dose implantation to achieve tight threshold voltage control in MOS transistors     

Highly linear GaAs hall devices fabricated by ion implantation

Gallium arsenide Hall devices have been fabricated with very thin active layers formed by silicon implantation. The variation of Hall voltage with calibrated magnetic-flux density shows that the linearity error is better than ±0.03 percent in the magnetic-flux-density range below 10 kG at room temperature. Measurements in a superconducting magnet at 4.2 K shows that the linearity error is within ± 0.6 percent at the range below 68 kG. When this device is used as a magnetic sensor, magnetic-flux meters with an accuracy of 0.1 percent (B< 10 kG) at room temperature and 0.6 percent (B< 68 kG) at 4.2 K can be achieved.     

A two-dimensional Boltzmann transport equation approach to ion implantation in silicon

A precise two-dimensional modeling for ion implantation based on Boltzmann transport equation is presented, in order to obtain impurity distributions for current small dimensioned devices. Ion irradiation region dependence of the distributions is calculated for As+ ion implants in silicon. Good agreement between experimental results and calculations for sufficiently large irradiation region implants, is successfully obtained in range distribution comparison. This modeling is applicable to design two-dimensional multilayered and fine structured devices.     

Planar InSb photodiodes fabricated by Be and Mg ion implantation

Planar p?n junction photodiodes in InSb have been made by ion implantation of Be and Mg acceptors. Both ions were incorporated with a doping efficiency of about 50 per cent and each produced excellent photodiodes. At 77°K, 20-mil-dia. diodes have typical zero-bias resistances of 6 Mμ. At the wavelength peak of 5·3 μm, quantum efficiencies of 60–70 per cent and detectivities with a 77°K background of $\text{2 × 10}{}^{12}\text{cm}\text{Hz}\text{W}$ were measured. Field plate guard rings were used to adjust the surface potential at the diode perimeters for optimum performance.     

Investigation of Al back contacts and BSF formation by in situ TEM for silicon solar cells

Back contacts for Si solar cells made by Al evaporation and screen printing Al paste were studied by transmission electron microscopy. Si was found to diffuse into the Al during heating. Si diffusion formed vacancies in the Si wafer and Al could then penetrate the Si wafer in spiked formations. The Al spikes retracted during cooling, leaving a doped back surface field region. Copyright © 2012 John Wiley & Sons, Ltd.     

Ultra-thin oxides on silicon fabricated using ultra-slow multicharged ion beams

We have used ultra-slow multicharged ions in ultra-high vacuum with a low partial pressure of O₂ to grow ultra-thin layers (0.3 to 2.0 nm) of SiO₂ on silicon. The advantage of using ultra-slow ions is that they interact with the surface only through their potential energy, not their kinetic energy, so they do not penetrate below the surface, avoiding implanted-induced damages to the substrate. This paper presents several analysis we have performed to qualify these ultra-thin SiO₂ layers, such as Fourier transform infrared spectroscopy–attenuated total reflection, Auger electron spectroscopy, X-ray photoelectron spectroscopy, spectroscopic ellipsometry and surface charge analysis. The oxidation process was monitored in situ and in real time using visible light emitted during the irradiation, and the thickness of the SiO₂ layers could be controlled. We plan to used these ultra-thin SiO₂ layers in next generation MOS gate dielectric stack, as a buffer layer between the channel in silicon and a high-k dielectric.     

Impurity gettering of polycrystalline solar cells fabricated from refined metallurgical-grade silicon

A damage-gettering technique is described which reduces the impurity content in grown crystals and enhances cell performance of diffused solar cells. Crystalline ingots were Czochralski-grown from an acid-leached metallurgical-grade source. Damage gettering was performed by preparing a mechanically damaged layer on the wafer back surface and subsequent annealing. Optimum annealing conditions were investigated as a function of ambient gas species, temperature, and time. In an O2ambient, the fill factor of the cells degraded to 0.25, while cell performance was greatly improved by annealing in N2. Conversion efficiency tends to increase with annealing time at higher temperatures. Maximum conversion efficiencies attained for mono- and polycrystalline solar cells fabricated from MG-Si are 9.8 and 7.7 percent, respectively. Light current-voltage characteristics and the leakage-current variations with depth were analyzed. It was found that impurity gettering begins at the wafer surfaces and proceeds gradually into the bulk regions.     

A novel low-cost, high-efficiency micromachined silicon solar cell

This letter presents a new process for the fabrication of solar cells and modules from single crystal silicon wafers with substantially reduced silicon consumption and processing effort compared to conventional wafer-based cells. The technique of narrow trench etching in an alkaline solution is used to create a series of thin silicon strips extending vertically through the wafer. By turning the silicon strips on their side, a large increase in surface area is achieved. Individual cells fabricated using the new process have reached efficiencies up to 18.5% while a 575 cm/sup 2/ module incorporating a rear reflector and a cell surface coverage of 50% has displayed an efficiency of 12.3% under standard rating conditions. The technique has the potential to reduce silicon consumption by a factor of 10 compared to standard wafer-based silicon solar cells and, therefore, to dramatically reduce the dependence to the expensive silicon feedstock.     

Comparison of the characteristics of solar cells fabricated from multicrystalline silicon with those fabricated from silicon obtained by the monolike technology

In order to raise the efficiency of solar cells and reduce the cost of their production, a new process for obtaining silicon ingots based on the so-called moonlike technology is developed. New technologies, which use “solar-grade” silicon, make it possible to fabricate solar cells at a lower cost with a higher efficiency of solar-energy conversion. It is exactly for this reason that the “monolike” process was tested and optimized by us for Kazakhstan solar-grade silicon. The aim of this study is a comparison of the characteristics of solar cells fabricated from “monolike” silicon with those of solar cells obtained on the basis of multicrystalline silicon grown by oriented crystallization. For our study, ingots of multicrystalline silicon are grown on an industrial scale and through the use of Kazakhstan-sourced silicon; solar cells are fabricated and the characteristics of the obtained silicon ingots and solar cells are studied.