用MOCVD在r面蓝宝石衬底上生长的a面GaN的独特电学性质研究

Nonpolar （1120） a-plane GaN films have been grown by low-pressure metal-organic vapor deposition on r-plane （1102） sapphire substrate. The structural and electrical properties of the a-plane GaN films are investigated by high-resolution X-ray diffraction （HRXRD）, atomic force microscopy （AFM） and van der Pauw Hall measurement. It is found that the Hall voltage shows more anisotropy than that of the c-plane samples; furthermore, the mobility changes with the degree of the van der Pauw square diagonal to the c direction, which shows significant electrical anisotropy. Further research indicates that electron mobility is strongly influenced by edge dislocations.     

Particular electrical quality of a-plane GaN films grown on r-plane sapphire by metal-organic chemical vapor deposition

Nonpolar (11(2)0) a-plane GaN films have been grown by low-pressure metal-organic vapor deposition on r-plane (1(1)02) sapphire substrate. The structural and electrical properties of the a-plane GaN films are investigated by high-resolution X-ray diffraction (HRXRD), atomic force microscopy (AFM) and van der Pauw Hall measurement.It is found that the Hall voltage shows more anisotropy than that of the c-plane samples; furthermore, the mobility changes with the degree of the van der Pauw square diagonal to the c direction, which shows significant electrical anisotropy. Further research indicates that electron mobility is strongly influenced by edge dislocations.     

Hall-effect measurements on short-channel devices using the van der Pauw Dual technique

The van der Pauw dual technique is used to perform in situ Hall-effect measurements on short-channel GaAs field-effect transistors (GaAs FETs). The technique is briefly described and some practical and theoretical problems associated with this technique are discussed.     

High resistivity measurement of SiC wafers using different techniques

To establish fast, nondestructive, and inexpensive methods for resistivity measurements of SiC wafers, different resistivity-measurement techniques were tested for characterization of semi-insulating SiC wafers, namely, the four-point probe method with removable graphite contacts, the van der Pauw method with annealed metal and diffused contacts, the current-voltage (I-V) technique, and the contactless resistivity-measurement method. Comparison of different techniques is presented. The resistivity values of the semi-insulating SiC wafer measured using different techniques agree fairly well. As a result, application of removable graphite contacts is proposed for fast and nondestructive resistivity measurement of SiC wafers using the four-point probe method. High-temperature van der Pauw and room-temperature Hall characterization for the tested semi-insulating SiC wafer was also obtained and reported in this work.     

A new buffer layer for MOCVD growth of GaN on sapphire

High quality GaN films have been grown on sapphire substrates (C face and A face) by atmospheric pressure metalorganic chemical vapor deposition (MOCVD) using a new buffer layer. With our reactor configuration and growth parameters, a GaN film grown on a single GaN buffer layer appears opaque with high density of hexagonal pits. Using a single A1N buffer layer results in extremely nonuniform morphology with mirror-like areas near the edge of the substrates and opaque areas in the center. The double buffer layer we report here, with GaN as the first layer and A1N as the second, each with an optimized thickness, leads to mirror-like films across the entire substrate. Scanning electron microscopy, photoluminescence, x-ray diffraction, and van der Pauw geometry Hall measurement data are presented to establish the quality of our films. The mechanism for this new buffer layer is also discussed.     

MOCVD生长AlGaN/GaN/Si(111)异质结材料

利用MOCVD在Si(111)衬底上生长了无裂纹的GaN外延薄膜和AlGaN/GaN异质结构。通过优化Si衬底的浸润处理时间、AlN层厚度等参数获得了无裂纹的GaN外延薄膜,研究了SiN缓冲层和插入层厚度对AlGaN/GaN异质结电学性质的影响,2DEG的迁移率和面密度分别达到1410cm2/V.s和1.16×1013cm-2。     

Four-point sheet resistance correction factors for thin rectangular samples

A conformal transformation technique is employed to determine the geometrical correction factor associated with four-point sheet resistance measurements of thin rectangular samples. Results are presented which are useful in identifying sample geometries for which the correction factor is insensitive to the placement of the four electrodes on the interior of the sample. The correction factors for corner-contacted rectangular samples (van der Pauw resistors) are shown to be highly sensitive to small variations in the length-to-width ratio, such as might be experienced when fabricating microelectronic structures. Experimental data which serve to confirm the validity of the analytical solution are provided for several cases of practical interest.     

A numerical analysis of various cross sheet resistor test structures

Various four-terminal cross sheet resistor test structures were analyzed to determine the effect of the contact arm width and length on the measured sheet resistance. A nine-point finite difference approximation to the Laplace equation was used with a six-resistor equivalent circuit to solve for the sheet resistance measurement error. The error indicates the difference between the true sheet resistance and the sheet resistance calculated from the van der Pauw formula. The analysis demonstrates that many novel designs are possible. In particular, the Greek-cross sheet resistor is a valid van der Pauw test structure if the arm length is greater than the arm width. This test structure is important in that it allows the accurate measurement of the sheet resistance of a very small region whose width is limited only by the fabrication technology.     

Resistivity and mobility of GaP at 300 K

Resistivity and mobility data of GaP at 300 K are presented in a unified form as a function of impurity concentration for the first time. The data are determined from sheet Hall coefficient and resistivity measurements obtained using the van der Pauw method. The results are given over a wide range of concentrations ranging from unitentionally doped to degenerate conditions. The maximum values of the electron and hole mobility, µnand µp, are found to be 160 and 135 cm²/V . s, respectively.     

Magneto-Transport Characterization of <Emphasis Type="Italic">p-</Emphasis>Type HgCdTe

The electrical properties of semiconductor materials have conventionally been extracted via Hall measurements performed at a single magnetic field. When applied to a semiconductor such as HgCdTe with mixed conduction characteristics, the values obtained from the Hall measurement represent only an averaged contribution of all carriers present in the sample. In this study, the transport properties of a liquid-phase epitaxially (LPE) grown p-type HgCdTe were determined. Variable magnetic field and temperature Hall and resistivity measurements were employed in conjunction with the improved-quantitative mobility spectrum analysis (iQMSA) algorithm to extract the concentrations and mobilities of all carriers present in the material. A comparison study was made between a van der Pauw Greek cross and a standard Hall bar structure on the same material. A disparity in the transport property of the sample was observed when both structures were measured within a few days of each other. Through iQMSA analysis, the discrepancy is seen to be attributed to the formation of an n-type skin inversion layer within a week after processing.     

GaAs PHEMT材料中2DEG浓度的控制与测试研究

设计并使用分子束外延(MBE)方法制备了不同帽层厚度、不同掺杂浓度的双平面掺杂GaAs PHEMT外延材料,采用不同工艺手段控制InGaAs沟道异质结界面的平滑程度。采用非接触霍尔方法对样品二维电子气(2DEG)浓度及迁移率进行测试,并用范得堡法对实验结果加以验证。结果表明,平整异质结界面生长技术能有效控制高迁移率2DEG浓度分布;与范德堡法相比,非接触霍尔方法无破坏性、测试结果可靠,该结果可以用来分析多层结构的PHEMT外延材料中InGaAs沟道界面的生长情况。     

Rapid thermal annealing of ion implanted 6H-SiC by microwave processing

Rapid thermal processing utilizing microwave energy has been used to anneal N, P, and Al ion-implanted 6H-SiC. The microwaves raise the temperature of the sample at a rate of 200°C/min vs 10°C/min for conventional ceramic furnace annealing. Samples were annealed in the temperature range of 1400-1700°C for 2-10 min. The implanted/annealed samples were characterized using van der Pauw Hall, Rutherford backscattering, and secondary ion mass spectrometry. For a given annealing temperature, the characteristics of the microwave-annealed material are similar to those of conventional furnace anneals despite the difference in cycle time.     

A van der Pauw resistor structure for determining mask superposition errors on semiconductor slices

A symmetric eight-point van der Pauw resistor structure is described which makes it possible to determine the x- and y- axis vector components of mask superposition error on specially processed semiconductor slices. The structure is fabricated by first delineating a corner-contacted square van der Pauw resistor geometry. A second masking step adds sensor arms at the midpoints of the sides of the square body if the two masks have been correctly superimposed. The actual location of the sensor arms is determined by carrying out a series of four-point resistance measurements after doping the structure. Control geometries, in which the eight sensor arms are delineated on the same masking step, are used to investigate the accuracy and precision of the measurement technique. It is found that the vector components of mask superposition error can be determined, in the absence of mask-to-mask registration errors, with an absolute accuracy in the range ±0.10 μm and standard error below 0.015 μm. Examples of vector displacement maps are presented which illustrate the information which can be obtained when a large number of such devices is evaluated using automatic test and computing equipment.     

A thermal van der Pauw test structure

A micromachined thermal van der Pauw test structure is reported. Similar in principle to the conventional electrical van der Pauw Greek cross test structures, it enables the in-plane thermal sheet conductivities of thin films to be determined. The microstructure was fabricated using a commercial CMOS application-specific integrated circuit process followed by anisotropic silicon etching. It consists of a cross-shaped sandwich of the dielectric CMOS layers isolated from the bulk silicon by four narrow suspension arms. Integrated polysilicon resistors make it possible to generate controlled amounts of heat power and to measure local temperature changes to determine the thermal response of the structure. The measurement principle exploits the analogy between the two-dimensional (2-D) heat flow in thin film samples and the electrical current pattern in thin film conductors. A thermal sheet resistance of 1.87×10⁵ K/W was extracted from the complete sandwich of the dielectric CMOS layers. This resistance is equivalent to an average in-plane thermal conductivity of the dielectric layer sandwich of κ=1.44 W m^-1 K^-1. Thermal finite element simulations showed that the radiative heat loss from the structure has a negligible effect on the extracted κ value     

Empirical method of calibrating a 4-point microarray for measuring thin-film-sheet resistance

The calibration of a 4-point probe used for sheet-resistance measurements of a thin-film sample is usually based on the calculation of a correction factor C, depending on the probe and sample dimensions. Based on the Van, der Pauw idea, a method of experimental calibration of the 4-point probe is given, if the probe dimensions are sufficiently small in comparison with the sample.     

Electrical transport characterizations of nitrogen doped ZnSe and ZnTe films

Temperature-dependent Hall effect measurements are reported on a series of nitrogen doped ZnSe and ZnTe epilayers using a van der Pauw configuration. A Zn(Se,Te) pseudo-graded band gap layer was used to form ohmic contacts to p-type ZnSe. The activation energy of nitrogen in ZnSe at the infinite dilution limit was extrapolated to be 114 meV. For a ZnTe film having a room temperature free hole concentration of p = 4.1 x 10¹⁶ cm⁻³, the activation energy of the nitrogen acceptors was found to be 46 meV.     

范德堡和条状结构埋层电阻的测试及研究

薄层电阻经常被用于PCM以及SPICE模型的关键电阻测试。在正常情况下呈现欧姆特性。同时我们可以看到,随偏压的变化,JFET器件中的埋层电阻也发生相应的变化。本文研究了条形电阻和范德堡两种标准结构的电阻,同时利用2D、3D器件模拟,给出了优化电阻测试的路径和方法。     

Substrate temperature effect on the photophysical and microstructural properties of fluorine-doped tin oxide nanoparticles

Transparent conducting oxide of fluorine-doped tin oxide (FTO) thin films was deposited from chemical solutions of tin chloride and ammonium fluoride using streaming process for electroless and electrochemical deposition (SPEED) at substrate temperature 450, 500, and 530 ℃ respectively. The effect of substrate temperatures on the microstructural properties such as crystallite size, dislocation density, micro strain, volume of the unit cell, volume of the nanoparticles, number of the unit cell, bond length and the lattice constants were examined using XRD technique. Only reflections from (110) and (200) planes of tetragonal SnO₂ crystal structure were obvious. The peaks are relatively weak indicating that the deposited materials constitute grains in the nano dimension. Hall measurements, which were done using van der Pauw technique, showed that the FTO films are n-type semiconductors. The most favorable electrical values were achieved for the film grown at 530 ℃ with low resistivity of 7.64×10^-4Ω·cm and Hall mobility of -9.92 cm²/(V·s).     

GaAs工艺监测研究

介绍了GaAs MMIC(GaAs microwave monolithic integrated circuit)工艺运用监测技术控制工艺过程,实时掌握工艺状况,保证产品的一致性、可重复性和可靠性。针对薄层电阻和接触电阻的阻值以及器件的栅阻和栅长等工艺过程中关键的参数,分别用范德堡结构、开尔文结构和十字桥结构进行监测。采用范德堡结构测得薄层电阻Rs=(π/ln 2)V14/I23,开尔文结构得到接触电阻Rc=V13/I24,十字桥结构可以了解栅阻和栅长。然后通过运用统计过程控制技术对数据进行分析,可以有效改进工艺,提高产品质量。     

Generalization of the van der Pauw relationship derived from electrostatics

In an earlier paper, this author, along with two others Weiss et al. (2008) [1], demonstrated that the original van der Pauw relationship could be derived from three-dimensional electrostatics, as opposed to van der Pauw’s use of conformal mapping. The earlier derivation was done for a conducting material of rectangular cross section with contacts placed at the corners. Presented here is a generalization of the previous work involving a square sample and a square array of electrodes that are not confined to the corners, since this measurement configuration could be a more convenient one. As in the previous work, the effects of non-zero sample thickness and contact size have been investigated. Buehler and Thurber derived a similar relationship using an infinite series of current images on a large and thin conducting sheet to satisfy the conditions at the boundary of the sample. The results presented here agree with theirs numerically, but analytic agreement could not be shown using any of the perused mathematical literature. By simply equating the two solutions, it appears that, as a byproduct of this work, a new mathematical relationship has been uncovered. Finally, the application of this methodology to the Hall Effect is discussed.