Experimental determination of electron drift velocity in 4H-SiC p+-n-n+ avalanche diodes

4H-SiC p⁺-n-n⁺ diodes of low series resistivity (<1×10^-4 Ω·cm²) were fabricated and packaged. The diodes exhibited homogeneous avalanche breakdown at voltages U_b=250-270 V according to the doping level of the n layer. The temperature coefficient of the breakdown voltage was measured to be 2.6×10^-4 k^-1 in the temperature range 300 to 573 K. These diodes were capable of dissipating a pulsed power density of 3.7 MW/cm² under avalanche current conditions. The transient thermal resistance of the diode was measured to be 0.6 K/W for a 100-ns pulse width, An experimental determination of the electron saturated drift velocity along the c-axis in 4H-SIC was performed for the first time, It was estimated to be 0.8×10⁷ cm/s at room temperature and 0.75×10⁷ cm/s at approximately 360 K     

Study on hydrogenation of polysilicon thin film transistors by ionimplantation

Hydrogenation of polysilicon (poly-Si) thin film transistors (TFT's) by ion implantation has been systematically studied. Poly-Si TFT performance was dramatically improved by hydrogen ion implantation followed by a forming gas anneal (FGA). The threshold voltage, channel mobility, subthreshold swing, leakage current, and ON/OFF current ratio have been studied as functions of ion implantation dose and FGA temperature. Under the optimized conditions (H⁺ dose of 5×10¹⁵ cm^-2 and FGA temperature at 375°C), NMOS poly-Si TFT's fabricated by a low temperature 600°C process have a mobility of ~27 cm ²/V·s, a threshold voltage of ~2 V, a subthreshold swing of ~0.9 V/decade, and an OFF-state leakage current of ~7 pA/μm at V_DS=10 V. The avalanche induced kink effect was found to be reduced after hydrogenation     

Electrical properties of Si p+-n junctions for sub-0.25μm CMOS fabricated by Ga FIB implantation

p⁺-n junction diodes for sub-0.25-μm CMOS circuits were fabricated using focused ion beam (FIB) Ga implantation into n-Si (100) substrates with background doping of N_b=(5-10)×10 ¹⁵ and N_b⁺=(1-10)×10¹⁷ cm^-3. Implant energy was varied from 2 to 50 keV at doses ranging from 1×10¹³ to 1×10¹⁵ cm^-2 with different scan speeds. Rapid thermal annealing (RTA) was performed at either 600 °C or 700°C for 30 s. Diodes fabricated on N_b⁺ with 10-keV Ga⁺ exhibited a leakage current (^I_R) 100× smaller than those fabricated with 50-keV Ga⁺. Tunneling was determined to be the major current transport mechanism for the diodes fabricated on N_b⁺ substrates. An optimal condition for I_R on N_b⁺ substrates was obtained at 15 keV/1×10¹⁵ cm^-2. Diodes annealed at 600°C were found to have an I_R 1000× smaller than those annealed at 700°C. I-V characteristics of diodes fabricated on N_b substrates with low-energy Ga⁺ showed no implant energy dependence. I-V characteristics were also measured as a function of temperature from 25 to 200°C. For diodes implanted with 15-keV Ga ⁺, the cross-over temperatures between I_diff and I_g-r occurred at 106°C for N_b ⁺ and at 91°C for N_b substrates     

Formation of cobalt silicided shallow junction using implantinto/through silicide technology and low temperature furnace annealing

This work investigates the shallow CoSi₂ contacted junctions formed by BF₂⁺ and As⁺ implantation, respectively, into/through cobalt silicide followed by low temperature furnace annealing. For p⁺n junctions fabricated by 20 keV BF₂⁺ implantation to a dose of 5×10¹⁵ cm^-2, diodes with a leakage current density less than 2 nA/cm² at 5 V reverse bias can be achieved by a 700°C/60 min annealing. This diode has a junction depth less than 0.08 μm measured from the original silicon surface. For n⁺p junctions fabricated by 40 keV As⁺ implantation to a dose of 5×10¹⁵ cm^-2, diodes with a leakage current density less than 5 nA/cm² at 5 V reverse bias can be achieved by a 700°C/90 min annealing; the junction depth is about 0.1 μm measured from the original silicon surface. Since the As⁺ implanted silicide film exhibited degraded characteristics, an additional fluorine implantation was conducted to improve the stability of the thin silicide film. The fluorine implantation can improve the silicide/silicon interface morphology, but it also introduces extra defects. Thus, one should determine a tradeoff between junction characteristics, silicide film resistivity, and annealing temperature     

Electrical characterization of epitaxial silicon deposited at low temperatures by plasma-enhanced chemical vapor deposition

The initial results of an investigation of the electrical properties of epitaxial silicon films deposited at low temperatures (i.e., 750°C) by the Plasma-Enhanced Chemical Vapor Deposition (PECVD) technique are presented. The major results indicate that (1) the electron and hole drift mobilities in the epitaxial layers are the same as in bulk silicon for carrier concentrations between 10¹⁷cm^-3and 10¹⁹cm^-3, and (2) high quality p-n junction diodes with no sign of soft breakdown and an ideality factor of 1.10 are obtained at an epitaxial deposition temperature of only 750°C. These p-n diodes represent the first ever reported IC devices fabricated in PECVD epitaxial films.     

In-situ low energy BF2+ion doping for silicon molecular beam epitaxy

An experimental study of the p-type ion dopant BF2+ in silicon molecular beam epitaxy (MBE) is described. BF2+ was used to dope MBE layers during growth to levels ranging from 1 × 10¹⁶/cm³to 4 × 10¹⁸/cm³over a growth temperature range of 650°C to 1000°C. The layers were evaluated using spreading resistance, chemical etching, and secondary ion mass spectroscopy. Complete dopant activation was observed for all growth temperatures. Remnant fluorine in the epitaxial layer was less than 2 × 10¹⁶/cm³in all cases. Diffused p-n junction diodes fabricated in BF2+-doped epitaxial material showed hard reverse breakdown characteristics.     

Planar, ion implanted, high voltage 6H-SiC P-N junction diodes

Planar, high voltage (800 V) P-N junction diodes have been fabricated for the first time on N-type 6H-SiC by room temperature boron implantation through a pad oxide deposited within windows etched in an LPCVD field oxide. All the diodes showed excellent rectification with leakage currents of less than 10 nA (~5×10^-5 A/cm² ) until avalanche breakdown. It was found that the breakdown voltage increases with junction depth. The reverse recovery time (t_rr) was measured to be 50 ns for the 800 V diode from which an effective minority carrier life time of 12.5 ns was extracted     

High-voltage Ni- and Pt-SiC Schottky diodes utilizing metal fieldplate termination

We have fabricated 1 kV 4H and 6H SiC Schottky diodes utilizing a metal-oxide overlap structure for electric field termination. This simple structure when used with a high barrier height metal such as Ni has consistently given us good yield of Schottky diodes with breakdown voltages in excess of 60% of the theoretically calculated value. This paper presents the design considerations, the fabrication procedure, and characterization results for these 1 kV Ni-SiC Schottky diodes. Comparison to similarly fabricated Pt-SiC Schottky diodes is reported. The Ni-SiC ohmic contact formation has been studied using Auger electron spectroscopy and X-ray diffraction. The characterization study includes measurements of current-voltage (I-V) temperature and capacitance-voltage (C-V) temperature characteristics. The high-temperature performance of these diodes has also been investigated. The diodes show good rectifying behavior with ON/OFF current ratios, ranging from 10⁶ to 10 at 27°C and in excess of 10⁶ up to 300°C     

Rapid thermal annealing effects on Si p+-n junctionsfabricated by low-energy FIB Ga+ implantation

Effects of rapid thermal annealing (RTA) on sub-100 nm p⁺ -n Si junctions fabricated using 10 kV FIB Ga⁺ implantation at doses ranging from 10¹³ to 10¹⁵ cm ^-2 are reported. Annealing temperature and time were varied from 550 to 700°C and 30 to 120 s. It was observed that a maximum in the active carrier concentration is achieved at the critical annealing temperature of 600°C. Temperatures above and below the critical temperature were followed by a decrease in the active concentration, leading to a `reverse' annealing effect     

Characteristics of planar n-p junction diodes made bydouble-implantations into 4H-SiC

Double implantation technology consisting of deep-range acceptor followed by shallow-range donor implantation was used to fabricate planar n⁺-p junction diodes in 4H-SiC. Either Al or B was used as the acceptor species and N as the donor species with all implants performed at 700°C and annealed at 1650°C with an AlN encapsulant. The diodes were characterized for their current-voltage (I-V) and capacitance-voltage (C-V) behavior over the temperature range 25°C-400°C, and reverse recovery transient behavior over the temperature range 25°C-200°C. At room temperature, the B-implanted diodes exhibited a reverse leakage current of 5×10^-8 A/cm² at a reverse bias of -20 V and a carrier lifetime of 7.4 ns     

P-type 4H and 6H-SiC high-voltage Schottky barrier diodes

High-voltage Schottky barrier diodes have been successfully fabricated for the first time on p-type 4H- and 6H-SiC using Ti as the barrier metal. Good rectification was confirmed at temperatures as high as 250°C. The barrier heights were estimated to be 1.8-2.0 eV for 6H-SiC and 1.1-1.5 eV for 4H-SiC at room temperature using both I-V and C-V measurements. The specific on resistance (R_on,sp) for 4H- and 6H-SiC were found to be 25 mΩ cm^-2 and 70 mΩ cm^-2 at room temperature. A monotonic decrease in resistance occurs with increasing temperature for both polytypes due to increased ionization of dopants. An analytical model is presented to explain the decrease of R_on,sp with temperature for both 4H and 6H-SiC which fits the experimental data. Critical electric field strength for breakdown was extracted for the first time in both p-type 4H and 6H-SiC using the breakdown voltage and was found to be 2.9×10⁶ V/cm and 3.3×10⁶ V/cm, respectively. The breakdown voltage remained fairly constant with temperature for 4H-SiC while it was found to decrease with temperature for 6H-SiC     

High current p/p+-diamond Schottky diode

Epitaxial p-type Schottky diodes have been fabricated on p⁺ -substrate. While the activation energy of the epitaxial layer conductivity is 390 meV, that of the substrate is only 50 meV. At forward bias the substrate conductivity dominates above 150°C, leading for a 5×10^-5 cm² area contact to a series resistance of 14 Ω at 150°C reducing to 8 Ω at 500°C. To our knowledge, this is the lowest series resistance reported so far for a diamond Schottky diode enabling extremely high current densities of 10³ A/cm and a current rectification ratio at ±2 V of 10⁵ making these diodes already attractive as high temperature rectifiers     

Reduction in minority carrier storage effect by fluorine ion implantation damage

Damage is produced in p-n diodes by fluorine ion implantation to reduce minority carrier storage effect. The switching time, reverse leakage current, andI-Vcharacteristics were investigated for annealing temperature between 450°C and 650°C. The accelation energy is 130 keV and doses are 10¹³-10¹⁵/cm². Annealing causes restoration in switching time, but leakage current increases with annealing temperature rise for doses more than 1 × 10¹⁴/cm². The best diodes indicate 1.5-order reduction in switching time and 10 nA in reverse leakage current. These properties, caused by implantation damage, are retained after long-cycle annealing at 450°C and are expected to be stable under practical use. These diodes can be obtained by annealing at 450°C and they furnish satisfactory diode performance.     

Electrical properties of Ga-implanted Si p+-n shallowjunctions fabricated by low-temperature rapid thermal annealing

p⁺-n shallow-junction diodes were fabricated using on-axis Ga⁶⁹ implantation into crystalline and preamorphized Si, at energies of 25-75 keV for a dose of 1×10¹⁵/cm ², which is in excess of the dosage (2×10¹⁴/cm²) required to render the implanted layer amorphous. Rapid thermal annealing at 550-600°C for 30 s resulted in the solid-phase epitaxial (SPE) regrowth of the implanted region accompanied by high Ga activation and shallow junction (60-130 nm) formation. Good diode electrical characteristics for the Ga implantation into crystalline Si were obtained; leakage current density of 1-1.5 nA/cm² and ideality factor of 1.01-1.03. Ga implantation into preamorphized Si resulted in a two to three times decrease in sheet resistance, but a leakage current density orders of magnitude higher     

Highly rectifying Au-contacts on diamond-on-silicon substrate

Au Schottky diodes have been fabricated on highly oriented diamond (HOD) films, grown on silicon using AC-bias nucleation and microwave plasma chemical vapor deposition. The active layers were selectively grown and doped by solid boron source. High rectification ratios were obtained up to 500°C in a bias voltage range up to ±15 V. A current density of more than 1 A/cm² and a breakdown field strength up to 2.0·10⁶ V/cm for point contacts has been demonstrated     

High-voltage (>1 kV) SiC Schottky barrier diodes with lowon-resistances

Au/6H-SiC Schottky barrier diodes with high blocking voltages were fabricated using layers grown by step-controlled epitaxy. A breakdown voltage of over 1100 V was achieved for silicon carbide (SIC) Schottky barrier diodes. These high-voltage SIC rectifiers had specific on-resistances lower than the theoretical limits of Si rectifiers by more than one order of magnitude. The specific on-resistance increased with temperature according to a T^2.0 dependence. The diodes showed good characteristics at temperatures as high as 400°C     

Breakdown voltage enhancement of the p-n junction by self-aligneddouble diffusion process through a tapered SiO2 implant mask

The low doping region extension at the edge of the junction curvature is implemented with the self-aligned double diffusion process using a tapered SiO₂ implant mask. The p⁺-p-n diodes fabricated with the proposed double diffusion process have relaxed the surface electric field at the junction curvature and increased the breakdown voltage by 140 V, compared with the cylindrical p-n junction. It is also found that the breakdown voltage of the p⁺ -p-n diodes having the field plate (FP) over the tapered oxide is 500 V, while that of the conventional p-n junction with the FP is 280 V     

An 1800 V triple implanted vertical 6H-SiC MOSFET

6H silicon carbide vertical power MOSFETs with a blocking voltage of 1800 V have been fabricated. Applying a novel processing scheme, n ⁺ source regions, p-base regions and p-wells have been fabricated by three different ion implantation steps. Our SiC triple ion implanted MOSFETs have a lateral channel and a planar polysilicon gate electrode. The 1800 V blocking voltage of the devices is due to the avalanche breakdown of the reverse diode. The reverse current density is well below 200 μA/cm² for drain source voltages up to 90% of the breakdown voltage. The MOSFETs are normally off showing a threshold voltage of 2.7 V. The active area of 0.48 mm² delivers a forward drain current of 0.3 A at Y_GS=10 V and V _DS=8 V. The specific on resistance was determined to 82 mΩdcm² at 50 mV drain source voltage and at V_GS =10 V which corresponds to an uppermost acceptable oxide field strength of about 2.7 MV/cm. This specific on resistance is an order of magnitude lower than silicon DMOSFET's of the same blocking capability could offer     

Nitrogen-implanted SiC diodes using high-temperature implantation

6H-SiC diodes fabricated using high-temperature nitrogen implantation up to 1000°C are reported. Diodes were formed by RIE etching a 0.8-μm-deep mesa across the N⁺/P junction using NF₃/O₂ with an aluminum transfer mask. The junction was passivated with a deposited SiO₂ layer 0.6 μm thick. Contacts were made to N⁺ and P regions with thin nickel and aluminum layers, respectively, followed by a short anneal between 900 and 1000°C. These diodes have reverse-bias leakage at 25°C as low as 5×10^-11 A/cm² at 10 V     

A high breakdown-voltage SiCN/Si heterojunction diode forhigh-temperature applications

Cubic crystalline p-SiCN films are deposited on n-Si(100) substrates to form SiCN/Si heterojunction diodes (HJDs) with a rapid thermal chemical vapor deposition (RTCVD) technique. The developed SiCN/Si HJDs exhibit good rectifying properties up to 200°C. At room temperature, the reverse breakdown voltage is more than 29 V at the leakage current density of 1.2×10^-4 A/cm². Even at 200°C, the typical breakdown voltage of SiCN/Si HJDs is still preserved about 5 V at the leakage current density of 1.47×10^-4 A/cm². These properties are better than the β-SiC on Si HJDs for high temperature applications