共查询到20条相似文献,搜索用时 109 毫秒
1.
为了满足GaAs微波单片晶体管模型参数精确提取需求,论文开展了在GaAs衬底上制作专用TRL校准件的研究工作,该专用校准件在设计过程中,综合考虑了介质材料、测量端口探针至微带线过渡等要素,使校准后在片S参数测量的参考平面更加接近晶体管管芯,从而获得了微波单片晶体管真正管芯模型参数。为了对校准效果进行验证,制作了在片无源检验件,通过测量结果与电磁场仿真数值的对比,证实了该专用校准件满足模型参数提取的测量要求。 相似文献
2.
为了满足 GaAs 微波单片晶体管模型参数精确提取需求,论文开展了在 GaAs 衬底上制作专用 TRL 校准件的研究工作,该专用校准件在设计过程中,综合考虑了介质材料、测量端口探针至微带线过渡等要素,使校准后在片 S 参数测量的参考平面更加接近晶体管管芯,从而获得了微波单片晶体管真正管芯模型参数。为了对校准效果进行验证,制作了在片无源检验件,通过测量结果与电磁场仿真数值的对比,证实了该专用校准件满足模型参数提取的测量要求。 相似文献
3.
4.
5.
6.
通过对单晶体管单调谐高频小信号放大器基本电路与工作原理的分析,建立单调谐高频小信号放大器电路的数学模型。采用晶体管的高频参数等效电路,利用MATLAB进行了性能仿真和分析。给出了高频小信号放大器电路的仿真代码,提高设计效率的同时保证电路设计的质量。 相似文献
7.
8.
针对分布式休眠晶体管网络功率门控结构中休眠晶体管尺寸优化问题,提出一种新型的最大瞬时电流(MIC)的估算技术.首先提取电路中标准单元的相关参数,利用解析式进行单元MIC的计算,再通过处理单元的时序信息和布图信息进行电路分簇的MIC计算,可使获得的MIC约束更紧、运算速度更快;根据获得的电路MIC信息,应用启发式算法,通过引入λ因子的启发式算法和模拟退火算法分别对休眠晶体管尺寸进行了优化.优化结果显示,采用文中的技术可使休眠晶体管的面积冗余降低到1%以下,并可以缩短整个优化过程.SPICE仿真验证结果表明,将休眠晶体管插入电路后,虚拟地线上的电压降完全满足小于5% Vdd的设计约束. 相似文献
9.
为降低RFID射频振荡器功耗并缩小其体积,提出了一种改善其性能的设计方法。采用晶体管和无源网络产生振荡,分析了单项参数的变化规律,给出了提高综合性能的方法以及射频振荡器的电路结构。仿真结果表明,晶体管稳定性对振荡器的设计有一定影响,配以正反馈可增加不稳定性,振荡器起振越快,功率输出越大,综合利用史密斯圆图和复平面上的稳定性边界可有效分配性能指标,为改善射频振荡器的性能开辟了一种新的途径。 相似文献
10.
11.
An extraction-based verification methodology for MEMS 总被引:3,自引:0,他引:3
Micromachining techniques are being increasingly used to develop miniaturized sensor and actuator systems. These system designs tend to be captured as layout, requiring extraction of the equivalent microelectromechanical circuit as a necessary step for design verification. This paper presents an extraction methodology to (re-)construct a circuit schematic representation from the layout, enabling the designer to use microelectromechanical circuit simulators to verify the functional behavior of the layout. This methodology uses a canonical representation of the given layout on which feature-based and graph-based recognition algorithms are applied to generate the equivalent extracted schematic. Extraction can be performed to either the atomic level or the functional level representation of the reconstructed circuit. The choice of level in hierarchy is governed by the trade off between simulation time and simulation accuracy of the extracted circuit. The combination of the MEMS layout extraction and lumped-parameter circuit simulation provides MEMS designers with VLSI-like tools enabling faster design cycles, and improved design productivity 相似文献
12.
Integrating reconfigurable fabrics in SOCs requires an accurate estimation of the layout area of the reconfigurable fabrics in order to properly optimize the architectural-level design of the fabrics and accommodate early floor-planning. This work examines the accuracy of using minimum width transistor area, a widely-used area model in many previous FPGA architectural studies, in accurately predicting layout area. In particular, the layout areas of LUT multiplexers are used as a case study. We found that compared to the minimum width transistor area, the traditional metal area based stick diagrams can provide much more accurate layout area estimations. In particular, minimum width transistor area can underestimate the layout area of LUT multiplexers by as much as a factor of 2–3 while stick diagrams can achieve over 90% accuracy in layout area estimation while remaining IC-process independent. 相似文献
13.
14.
15.
Bluetooth协议栈RFCOMM协议层分析与设计 总被引:2,自引:0,他引:2
RFCOMM是蓝牙(Bluetooth)协议栈中对串口进行仿真的协议,它完成了对RS232串口的模拟,这使得现有的各种高层应用程序可以直接和蓝牙技术结合而产生各种基于蓝牙的应用实例,本文RFCOMM协议进行了比较详细的分析,并在此基础上给出了比较具体的软件设计方案。 相似文献
16.
分析了VLSI的功耗模型,综述了多电压低功耗优化调度技术,通过对已有优化调度技术的评估,表明利用多电压调度技术能够有效地降低电路功耗,同时指出行为层的多电压综合设计会带来的一些负面影响,如物理布局等问题,针对该问题提出了一种行为层综合方案--调度分区一法,最后提出了VLSI行为层综合设计研究的新方向. 相似文献
17.
在使用Flash存储数据时,有时需要对其设计读写控制逻辑。本文介绍了用VHDL语言在CPLD内部编程,实现对Flash中数据的读取控制的具体方法,并给出了时序仿真波形。根据需求进行相应的修改,该设计可以支持可多种数据输出宽度,因而具有较好的灵活性。 相似文献
18.
A complex design effort, the 80386 was nevertheless one of the company's most successful projects. The work was completed in less time than scheduled and set an Intel record for tapeout to mask fabricator. The strategy incorporated both top-down and bottom-up design approaches. The top-down flow was external architectural definition, internal architecture, internal unit RTL (register transfer logic) and finally detailed logic. The bottom-up flow was detailed transistor and cell circuit design and layout, block (ALU, PLA, etc.) circuit design and layout, and finally global circuit design and layout. Testability also played an important part in the design's success. The 80386 combines two forms of designed-in test functions: built-in self-test and test hooks or functions explicitly designed in to aid testing. 相似文献
19.
Banner对于互联网产品的推广有重要作用,将Banner设计拆分为版式设计、字体及文案设计、配图设计和点缀设计.围绕Banner主题表达需要,提出快速有效的方法实现Banner复用及卖点提炼,为有效设计与制作Banner提供参考、借鉴。 相似文献