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1.
A 28-MHz wideband switched-capacitor (SC) bandpass filter employs an N-path technique and implements transmission zeros in the transfer function to achieve high attenuation. A modified SC biquadratic filter architecture is proposed to achieve high-speed operation. Implemented in a 0.35-/spl mu/m CMOS process, the bandpass filter operates at 28-MHz center frequency with a 3.84-MHz bandwidth and adjacent-channel attenuation of more than 35 dB. At 3-V supply, the filter measures a dynamic range of 37 dB at the 1% THD3 point while dissipating 19.6-mW per pole and occupying a chip area of 1.65 mm/sup 2/.  相似文献   

2.
An integrated 18th-order frequency symmetrical switched-capacitor (SC) bandpass filter is described that was realized by the use of voltage inverter switches (VISs) in the form of recharging devices. The filter was implemented in a standard CMOS technology. It was conceived for use as a `channel filter' in modulation schemes for PCM/FDM and audio/FDM conversion. Starting from a high-pass filter as reference filter, the SC filter is designed as a pseudo-N-path filter, with N=2. The application of the pseudo-N-path principle leads to a substantial saving in hardware.  相似文献   

3.
Novel passive recursive CCD bandpass filters have been realized using standard two-level-polysilicon gate NMOS technology. A Chebyshev bandpass (w/SUB rel,/ /SUB 3/ /SUB dB/=3.1 percent) and a fully integrated CCD signal filter with an extremely narrow 3 dB bandwidth of 97 Hz (Q=1350) at 131.85 kHz center frequency were implemented by means of cascaded CCD resonators. The latter chip contains the necessary clock generation and biasing circuitry realized with dynamic circuit techniques to achieve low power consumption (40 mW per filter). Performing all filtering operations exclusively in the charge domain ensures filter passivity. An extremely stable center frequency and a bandwidth independently controlled by a capacitance ratio are the special advantages of such filters.  相似文献   

4.
A design strategy for micropower switched-capacitor filters is presented and illustrated with the design of a multipurpose second-order section. The filter, realized in a double-poly 6-/spl mu/m CMOS process, consumes 237 /spl mu/W if it is used as an equalizer (f/SUB c/=90 kHz, -V/SUB DD/=3 V) and only 72 /spl mu/W if it is used as a bandpass filter for 8 channels (f/SUB c/=192 kHz, V/SUB DD/=3 V). The dynamic range of the filter is over 60 dB and the total chip area is 3.5 mm/SUP 2/, including bonding pads.  相似文献   

5.
采用三级2阶N路径滤波单元设计了一种带谐波抑制功能的高阶有源N路径带通滤波器。在第二、三级之间插入负电阻和回转器,可提高滤波器的Q值、带宽和线性度;在末级的串联型2阶N路径滤波单元中采用有相位差的时钟信号进行控制,可有效地抑制三次谐波。基于0.18μm CMOS工艺仿真。结果表明,该滤波器的最高增益为20.12 dB,中心频率调谐范围为0.1~1 GHz,带外抑制高达50.2 dB@700 MHz,三次谐波抑制大于40 dB,噪声系数为4.71~6.9 dB,带外输入3阶交调点(IIP3)为16.3 dBm@50 MHz。  相似文献   

6.
The letter presents novel fully stray-insensitive switched-capacitor (SC) pseudo-N-path filters based on the theory of wave-flow networks. N-path filters are well suited for the realisation of narrowband bandpass and bandreject filters. The two main drawbacks of N-path filters, i.e. unwanted mirror frequencies due to path mismatch, and clock feedthrough located in the passband, are overcome by applying the pseudo-N-path principle. The design procedure will be demonstrated using an example of a 6-path filter based on a 3rd-order highpass prototype filter.  相似文献   

7.
To overcome the problems of carrier leak etc. experienced with N-path filters incorporating active lowpass filters, it has been suggested that N-path filters incorporating bandpass filters (which must be well matched) be used to produce a pair of passbands away from the carrier frequency, with another filter at the required final frequency to discriminate between the wanted and the image passbands. An alternative and practical solution is described here in which neither the well matched low-frequency filters nor the additional high-frequency filter are required; instead a single low-frequency bandpass filter and two pairs of elementary phase-shift networks are used. The circuit is well suited to realisation as a thin-film or hybrid integrated circuit, since all the frequency-selective circuits operate at the low frequency.  相似文献   

8.
Describes the organization and performance of a multipurpose CCD comb filter to separate luminance and chrominance from the composite color video signal. The filter consists of a main (long) and two sub- (short) channels terminated at two comb outputs (add and subtract) and a simple delayed output. It is operated at 4/spl times/f/SUB SC/(f/SUB SC/: color subcarrier frequency). The comb filter transfer functions are usually shifted toward the lower frequency and the rejection ratios are degraded, due to the incomplete charge transfer. However, the small notch frequency shifts (<25 Hz) and high rejection ratios (>40 dB) were experimentally obtained. Moreover, low differential gain (<1 percent) and low differential phase (<1.5/spl deg/) were obtained for the separated chrominance signal, regardless of APL variation. The second-order comb filter was constructed using three identical devices and used in a TV receiver. The reproduced image was much superior to that obtained by the conventional separation circuit. Some other application schemes in video signal processing systems were proposed.  相似文献   

9.
Zhang  Z.X. Temes  G.C. Czarnul  Z. 《Electronics letters》1991,27(22):2008-2009
The concept of an N-path bandpass Delta Sigma A/D convertor is introduced. A multibit sixth-order SC implementation is described. The new scheme appears to be very effective for the realisation of the narrowband bandpass delta-sigma modulators needed for communication applications.<>  相似文献   

10.
The high frequency (HF) behavior of the switched-capacitor (SC) LDI ladder filter is studied. This study shows that using low sampling frequency with respect to the cutoff frequency reduces the HF error due to the reduction in amplifier gain. Design techniques are also given for the HF SC filters, such as double-sampling scheme, a low sampling frequency with an exact synthesis algorithm, as well as a fast-settling folded-cascode amplifier. These techniques are applied to an experimental fifth-order elliptic SC filter fabricated in a 2-/spl mu/m CMOS technology. The experimental results show that a 3.6-MHz cutoff frequency is attained. All the capacitors are scaled down in order to reduce the setting time of the amplifiers. The active area of the filter is 0.9 mm/SUP 2/. The F/SUB sampling//F/SUB cutoff/ is only 5. The circuit operates from /spl plusmn/5 V and typically dissipates 80 mW when sampled at 18 MHz.  相似文献   

11.
This paper describes the design strategy and implementation of a high frequency low voltage pseudo-differential SC filter which use opamps with gain enhancement replica amplifier. Experimental results of a biquad SC bandpass with a center frequency of 10 MHz and a Q of 10 are presented. The realized opamp has an open-loop unity-gain bandwidth of 850 MHz, a phase margin of about 62°, and a dc gain of 50 dB. The prototype filter dissipates 23 mW from a 3 V supply and occupies 0.3 mm 2 in a 0.8 μm N-well single-poly, double-metal CMOS process  相似文献   

12.
In this paper, a tunable wideband linear transresistance (Rm ) amplifier is proposed and analyzed. Using the tunable Rm amplifier, a new transresistance-capacitor (Rm-C) differentiator is designed. Considering the intrinsic capacitances of the MOS transistors as filter elements, this Rm-C configuration can he regarded as a very high frequency (VHF) bandpass biquadratic filter. The proposed biquad has a simple structure and thus occupies a small chip area and consumes little power. Moreover, higher-order VHF bandpass filters can be realized by directly cascading the biquads. Experimental results have successfully proven the capability of the proposed new filter implementation method in realizing VHF bandpass filters with the center frequency higher than 100 MHz when Cd=1 pF. The deviations of the measured center frequency f o and quality factor Q of the fabricated bandpass filter from the simulated results are less than 8%. The deviation of the center frequency can be post-tuned by adjusting the control voltages VCN and VCP of the tunable Rm amplifier. With 1 pF differentiating capacitor, the center frequency of the fabricated VHF Rm-C bandpass filters can be tuned in a wide range larger than 30 MHz. The measured maximum signal level is 25 mVrms and the dynamic range is 47 dB. The chip area is 0.05 mm2 and power consumption is 5.05 mW with ±2.5 V power supply  相似文献   

13.
A real-time programmable switched capacitor (SC) second-order bandpass filter is presented. It is based on the voltage inverter switch (VIS) principle using inverse recharging devices. These devices are realized with dynamic amplifiers in order to achieve low power dissipation. The filter contains only grounded or virtually grounded network capacitances and, therefore, it is insensitive to the parasitic capacitances between the bottom plate of the implemented MOS capacitors and the substrate. The circuit offers digital programming capability (two Q factors and three center frequencies) and low power dissipation (185 /spl mu/W at a sampling frequency of 8 kHz and with a power supply voltage of 10 V). The filter has been integrated in CMOS metal-gate technology.  相似文献   

14.
The design of a tunable high-frequency fully integrable current-mode bandpass filter is presented using a complementary high-performance BiCMOS process. The new architecture of this filter is based on impedance simulation and employs current controlled conveyors. The Q-factor and the center frequency can be electronically controlled with dc bias currents over a broad range of values, thus allowing easy tuning of this filter. An application to a mobile communication IF receiver channel centered at 85 MHz and with 1-MHz bandwidth based on the cascade of two identical second-order bandpass cells has been designed. Measurements show very interesting frequency performance (f 0 tunable in the range 30-120 MHz and Q from 1-140) in conjunction with low power consumption (25 mW for the fourth-order filter with ±2.5 V supplies)  相似文献   

15.
A novel quasielliptic microstrip bandpass filter (BPF) using both half- and quarter-wavelength resonators is proposed. With the quarter-wavelength (/spl lambda//4) resonators placed in the interstage, the filter spurious passband can be pushed up to 3 f/sub 0/ where f/sub 0/ stands for the passband center frequency. To improve the stopband characteristics, a modified stopband-extended filter is implemented, utilizing the multiple transmission zeros placed at specified frequencies to achieve good frequency selectivity and out-of-band rejection. The modified filter provides a 22.5-dB rejection level from 1.14 f/sub 0/ to 5.2 f/sub 0/.  相似文献   

16.
This paper discusses the use of a transconductor, first proposed by Nauta for high frequency applications, in low frequency CMOS gm -C bandpass filters. The behavior of the transconductor is examined in detail, showing that the robust implementation of higher-order low-voltage filters is possible for center frequencies in the lower megahertz region. The experimental results are presented of the realization of two prototypes, a 0.6-μm CMOS 18th-order real bandpass filter and a 0.35-μm CMOS 7th-order complex (14th-order bandpass) filter, both with a center frequency of 3 MHz and a passband of 1 MHz. These filters comply with the specifications for the channel-select stage of the Bluetooth short-range radio receiver  相似文献   

17.
The design and implementation of single-ended and fully-differential switched current (SI) biquadratic high-Q bandpass filters to meet the specifications of the dual-tone multiple-frequency (DTMF) system are presented. Both designs use the regulated-gate cascode (RGC) dynamic current mirror to obtain center frequency accuracy of 0.1% and a quality factor of 24. Compared to the equivalent switched capacitor (SC) implementation of these filters, the single-ended SI filter requires 30% less area for the same minimum-sized capacitance, power dissipation and performance  相似文献   

18.
Low-voltage high-speed switched-capacitor (SC) circuit design without using voltage bootstrapper is presented. The basic building block used for low-voltage SC circuit design is the auto-zeroed integrator (AZI), which can work at both low voltage and high sampling frequency. With this method, two low-voltage SC systems were successfully designed and implemented in 1.2-/spl mu/m CMOS technology. The first one is a fully differential SC bandpass biquad working at 1.5 V and 5.0-MHz clock frequency. The measured Q value is 8.0 at the center frequency of 833 kHz. The second one is a fully differential fourth-order bandpass /spl Delta//spl Sigma/ modulator that also works at 1.5 V and 5.0 MHz. Its measured third-order intermodulation is less than -78 dBc due to the low distortion characteristic of AZI. The measured signal-to-noise ratio of the modulator is 61 dB within the narrow band of 25 kHz centered at 1.25 MHz.  相似文献   

19.
An IF amplifier that provides a temperature insensitive Q (adjustable independently of center frequency) of 50 at a center frequency of f/SUB 0/ of 1 MHz, over a 100/spl deg/C temperature range is presented. The design also features supply independent biasing, input and output buffering, a 40-dB (automatic gain control) range and a center frequency voltage gain of up to 60 dB. Results obtained from computer simulations, discrete, and integrated prototypes are compared.  相似文献   

20.
A second-order switched-capacitor (SC) bandpass filter with very wide Q-factor programmability range, is presented. Although the Q-factor is controlled by digitally varying the effective sampling frequency of an SC branch, quasi-continuous programmability is provided. Experimental results from a 0.8 μm CMOS integrated prototype demonstrate the versatility of the proposed technique  相似文献   

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