26-34 GHz CMOS mixer

A 26-34 GHz fully integrated CMOS down mixer is presented. At 30 GHz RF frequency and 2.5 GHz IF frequency, 50 /spl Omega/ terminations, 5 dBm LO and 1.2 V/spl times/17 mA supply power, the circuit yields a conversion loss of 2.6 dB, an SSB NF of 13.5 dB and an IIP3 of 0.5 dBm.     

A high-performance W-band uniplanar subharmonic mixer

A uniplanar subharmonic mixer has been implemented in coplanar waveguide (CPW) technology. The circuit is designed to operate at RF frequencies of 92-96 GHz, IF frequencies of 2-4 GHz, and LO frequencies of 45-46 GHz. Total circuit size excluding probe pads and transitions is less than 0.8 mm ×1.5 mm. The measured minimum single-sideband (SSB) conversion loss is 7.0 dB at an RF of 94 GHz, and represents state-of-the-art performance for a planar W-band subharmonic mixer. The mixer is broad-band with a SSB conversion loss of less than 10 dB over the 83-97-GHz measurement band. The measured LO-RF isolation is better than -40 dB for LO frequencies of 45-46 GHz. The double-sideband (DSB) noise temperature measured using the Y-factor method is 725 K at an LO frequency of 45.5 GHz and an IF frequency of 1.4 GHz. The measured data agrees well with the predicted performance using harmonic-balance analysis (HBA). Potential applications are millimeter-wave receivers for smart munition seekers and automotive-collision-avoidance radars     

26.5–30-GHz Resistive Mixer in 90-nm VLSI SOI CMOS Technology With High Linearity for WLAN

A resistive mixer with high linearity for wireless local area networks is presented in this paper. The fully integrated circuit is fabricated with a 90-nm very large scale integration silicon-on-insulator (SOI) CMOS technology and has a very compact size of 0.38 mm$, times,$0.32 mm. Design guidelines are given to optimize the circuit performance. Analytical calculations and simulations with an SOI large-signal Berkeley simulation model show good agreement with measurements. At an RF of 27 GHz, an IF of 2.5 GHz and zero dc power consumption, a conversion loss of 9.7 dB, a single-sideband noise figure of 11.4 dB, and a high third-order intercept point at the input of 20 dBm are measured at a local-oscillator (LO) power of 10 dBm. At lower LO power of 0-dBm LO power, the loss is 10.3 dB. To the knowledge of the author, the circuit has by far the highest operation frequency reported to date for a resistive CMOS mixer. Furthermore, it provides the highest linearity for a CMOS mixer operating at such high frequencies.     

A D‐Band Balanced Subharmonically‐Pumped Resistive Mixer Based on 100‐nm mHEMT Technology

A D‐band subharmonically‐pumped resistive mixer has been designed, processed, and experimentally tested. The circuit is based on a 180° power divider structure consisting of a Lange coupler followed by a λ/4 transmission line (at local oscillator (LO) frequency). This monolithic microwave integrated circuit (MMIC) has been realized in coplanar waveguide technology by using an InAlAs/InGaAs‐based metamorphic high electron mobility transistor process with 100‐nm gate length. The MMIC achieves a measured conversion loss between 12.5 dB and 16 dB in the radio frequency bandwidth from 120 GHz to 150 GHz with 4‐dBm LO drive and an intermediate frequency of 100 MHz. The input 1‐dB compression point and IIP3 were simulated to be 2 dBm and 13 dBm, respectively.     

Broadband single- and double-balanced resistive HEMT monolithicmixers

A double-balanced (DB) 3-18 GHz and a single-balanced (SB) 2-16 GHz resistive HEMT monolithic mixer have been successfully developed. The DB mixer consists of a AlGaAs/InGaAs HEMT quad, an active LO balun, and two passive baluns for RF and IF. At 16 dBm LO power, this mixer achieves the conversion losses of 7.5-9 dB for 4-13 GHz RF and 7.5-11 dB for 3-18 GHz RF. The SB mixer consists of a pair of AlGaAs/InGaAs HEMT's, an active LO balun, a passive IF balun and a passive RF power divider. At 16 dBm LO power, this mixer achieves the conversion losses of 8-10 dB for 4-15 GHz RF and 8-11 dB for 2-16 GHz RF. The simulated conversion losses of both mixers are very much in agreement with the measured results. Also, the DB mixer achieves a third-order input intercept (IP₃) of +19.5 to +27.5 dBm for a 7-18 GHz RF and 1 GHz IF at a LO drive of 16 dBm while the SB mixer achieves an input IP ₃ of +20 to +28.5 dBm for 2 to 16 GHz RF and 1 GHz IF at a 16 dBm LO power. The bandwidth of the RF and LO frequencies are approximately 6:1 for the DB mixer and 8:1 for the SB mixer. The DB mixer of this work is believed to be the first reported DB resistive HEMT MMIC mixer covering such a broad bandwidth     

基于802.11a协议的无线局域网低噪声放大器和改进的有源双平衡混频器

提出了采用0.18μm CMOS工艺,应用于802.11a协议的无线局域网接受机的低噪声放大器和改进的有源双平衡混频器的一些简单设计概念。通过在5.8 GHz上采用1.8 V供电所得到的仿真结果,低噪声放大器转换电压增益,输入反射系数,输出反射系数以及噪声系数分别为14.8 dB,-20.8 dB,-23.1 dB和1.38 dB。其功率损耗为26.3 mW。设计版图面积为0.9 mm×0.67 mm。混频器的射频频率,本振频率和中频频率分别为5.8 GHz,4.6 GHz和1.2 GHz。在5.8 GHz上,混频器的传输增益,单边带噪声系数（SSB NF）,1 dB压缩点,输入3阶截点（IIP3）以及功率损耗分别为-2.4 dB,12.1 dB,3.68 dBm,12.78 dBm和22.3 mW。设计版图面积为1.4 mm×1.1 mm。     

A monolithic double-balanced direct conversion mixer with an integrated wideband passive balun

This paper presents the design and performance characteristics of a 20-40 GHz monolithic double-balanced direct conversion mixer implemented using InGaP/GaAs HBT process. The compact MMIC mixer makes use of a Gilbert-cell multiplier and utilizes a broadband monolithic passive balun that has been developed for MMIC applications. The new balun makes use of multidielectric layer structure to achieve a broadband performance in a simple coplanar configuration. A measured return loss better than 15 dB, with a maximum insertion loss of 4.5 dB including the 3-dB power splitting loss has been achieved over the band from 15 to 45 GHz. Operated as a downconverter mixer, the newly developed direct conversion mixer achieves a measured conversion gain of 16 dB given an RF signal at 30 GHz, LO drive of 5 dBm and a downconverted baseband signal at 10 MHz. The mixer IP3 occurs at an output power of 4 dBm while the IP2 occurs at an output power of 11 dBm.     

一款集成驱动放大器的低变频损耗混频器设计

采用0.5μm GaAs工艺设计并制造了一款单片集成驱动放大器的低变频损耗混频器.电路主要包括混频部分、巴伦和驱动放大器3个模块.混频器的射频(RF)、本振(LO)频率为4～7 GHz,中频(IF)带宽为DC～2.5 GHz,芯片变频损耗小于7 dB,本振到射频隔离度大于35 dB,本振到中频隔离度大于27 dB.1 dB压缩点输入功率大于11 dBm,输入三阶交调点大于20 dBm.该混频器单片集成一款驱动放大器,解决了无源混频器要求大本振功率的问题,变频功能由串联二极管环实现,巴伦采用螺旋式结构,在实现超低变频损耗和良好隔离度的同时,保持了较小的芯片面积.整体芯片面积为1.1 mm×1.2 mm.     

60 GHz double-balanced up-conversion mixer on 130 nm CMOS technology

A millimetre-wave Gilbert-cell up-conversion mixer using standard 130 nm CMOS technology is presented. This mixer has a power conversion gain of better than 2 dB and has the highest reported OP 1 dB of -5.6 dBm when driven with a LO power of 0 dBm. The LO to RF isolation are better than 37 dB for LO from 57 to 65 GHz. Microstrip lines were employed for the matching network design at the mixer output. This is believed to be the first CMOS Gilbert-cell up-conversion mixer operating in the 60 GHz frequency band using fundamental LO.     

Design of high-linearity 75–90 GHz CMOS down-conversion mixer for automotive radar

This paper presents a 75–90 GHz down-conversion mixer applied in automotive radar, which is characterized with high linearity, low local oscillator (LO) drive as well as high conversion gain (CG) using TSMC 65-nm CMOS general-purpose technology. The good linearity and isolation of mixer are required for automotive radar to cover short-middle-far range detection. The mixer includes an enhanced double-balanced Gilbert-cell core with series peaking transmission line and source degeneration technique for improving linearity and CG, two on-chip baluns and intermediate frequency (IF) buffer for IF test. Besides, to make the design more accurate and efficient, the modeling and design of millimeter-wave (mm-wave) passive devices are introduced. The mixer consumes 12 mW under 1.5 V. The input 1 dB compression point (P_1dB) is 2.5 dBm as well as IIP3 of 13.2 dBm at 80 GHz. High performances are achieved with the CG of 5 dB at 76 GHz with LO power of 0 dBm for frequencies of 75–90 GHz which covers the application of automotive radar frequency band (76–81 GHz) and LO-RF isolation of 33–37 dB for frequencies of 60–90 GHz. The area of the mixer is 0.14 mm², with PADs included.     

一种基于130 nm CMOS工艺的K波段混频器

基于130 nm CMOS工艺,设计了工作于K波段的双平衡下变频混频器。在传统吉尔伯特单元基础上采用电流复用注入结构,减小了开关级的偏置电流,提升了开关性能。在开关级源端引入谐振电感,消除了开关共源节点处的寄生电容,抑制了射频信号的泄露,提高了增益,减小了噪声。仿真结果表明,输入射频信号为24 GHz,本振信号为24.5 GHz,本振输入功率为-3 dBm时,该混频器的转换增益为25.8 dB,单边带噪声系数为6.4 dB,输入3阶互调截点为-8.6 dBm。     

A novel self-oscillating HEMT-HBT cascode VCO-mixer using an activetunable inductor

Here we describe a unique Ka-band self-oscillating HEMT-HBT cascode mixer design which integrates an active tunable resonator circuit. The VCO-mixer MMIC integrates GaAs HEMT's and HBT's using selective molecular beam epitaxy (MBE) technology. The HEMT-HBT cascode active mixer operates similarly to a dual-gate mixer. The HBT of the cascode is used to construct a VCO by presenting the base with an HEMT tunable active inductor. The VCO can be tuned from 28.5 to 29.3 GHz while providing ≈0 dBm of output power. Operated as an upconverter, the MMIC achieves 6-9 dB conversion loss over a 31-39 GHz output frequency band. Using these active approaches, both VCO and mixer functions were integrated into a compact 1.44×0.76 mm² chip area. The active RF integrated circuit (IC) techniques presented here have direct implications to future high complexity millimeter-wave monolithic integrated circuits (MIMICs) for ultrahigh-speed clock recovery and digital radio applications     

High-performance V-band cascode HEMT mixer and downconverter module

A high-performance V-band cascode HEMT mixer is presented together with a compact downconverter module integrating the mixer with other receiver MMICs. The cascode mixer was optimized for conversion gain and/or linearity by employing the low-pass interstage networks and by optimizing the bias voltages. The low-pass interstage network effectively filters out the unwanted harmonics and spurious signals, and therefore, enhances the gain and the linearity of the cascode mixer. On a two-tone test, the cascode mixer showed a high conversion gain of 6.3 dB with an LO power of 2.6 dBm at 60 GHz. When the gate bias to the upper common-gate HEMT was tuned for the intermodulation distortion "sweet spot" theoretically predicted by the authors , the mixer showed a high third-order intercept point of 11.2 dBm with a decent gain of 4.1 dB under a small DC power consumption of 8 mW. To benchmark the performance of the cascode mixer of this work, a waveguide-based compact V-band downconverter module was built by integrating the mixer with an MMIC LNA, a VCO, and a LO driving amplifier. The downconverter module showed a conversion gain higher than 20 dB from 57.5 to 61.7 GHz. This paper shows the potential of the cascode FET mixer for high-performance compact downconverter applications at millimeter-wave frequencies.     

毫米波宽带高中频单平衡混频器设计与实现

针对毫米波宽带通信、雷达和测试仪器领域的应用需求,提出一种E波段宽带高中频(IF)单平衡混频器。射频(RF)及本振(LO)信号通过多分支宽带加宽波导正交耦合器输入,通过鳍线过渡结构将信号从波导传输模式过渡到微带模式,并提供宽带中频信号及直流接地回路;中频输出低通滤波器可有效抑制LO及RF信号,并为其提供等效接地回路。利用肖特基二极管的非线性实现混频,并通过微带匹配电路最终实现宽带低损耗混频效果。混频器采用57.6、62.4、67.2 GHz 3个点频本振,将67~85 GHz的射频信号分段下变频至9.4~17.8 GHz的中频范围内。测试结果表明,在67~85 GHz射频频率范围内,射频输入功率为-15 dBm,本振输入功率为12 dBm时,混频器变频损耗为7.1~10.1 dB,对组合杂散的抑制在36 dBc以上。     

0.5-25 GHz inductorless single-ended resistive mixer in 0.13 μm CMOS

A wideband inductorless resistive down-conversion mixer in 0.13 μm CMOS technology is presented. The mixer provides a conversion loss of 9?11.7 dB over a frequency range of 0.5?25 GHz at LO power of 6 dBm. The circuit exhibits an input-referred 1 dB compression point and IIP3 of 4.7 and 11.5 dBm, respectively. The mixer consumes only 0.2 mA from 1.5 V for biasing. The isolation between the ports is higher than 10 dB for the whole frequency range. The circuit is realised without inductors, thus offering very wide bandwidth. The chip size including the pads is 0.23 mm², and the circuit active area is only 0.014 mm².     

宽中频CMOS下变频器单片

该文介绍了一种工作于毫米波频段的宽中频(IF)下变频器。该下变频器基于无源双平衡的设计架构,片上集成了射频(RF)和本振(LO)巴伦。为了优化无源下变频器的增益、带宽和隔离度性能,电路设计中引入了栅极感性化技术。测试结果表明,该下变频器的中频带宽覆盖0.5～12 GHz。在频率为30 GHz、幅度为4 dBm的LO信号驱动下,电路的变频增益为–8.5～–5.5 dB。当固定IF为0.5 GHz、LO幅度为4 dBm时,变频增益随25～45 GHz的RF信号在–7.9～–5.9 dB范围内变化,波动幅度为2 dB。LO-IF, LO-RF, RF-IF的隔离度测试结果分别优于42, 50, 43 dB。该下变频器芯片采用TSMC 90 nm CMOS工艺设计,芯片面积为0.4 mm2。     

一种低噪声高线性度CMOS上变频混频器

设计实现了一种采用开关跨导型结构的低噪声高线性度上变频混频器,详细分析了电路的噪声特性和线性度等性能参数,本振频率为900 MHz。芯片采用0.18μm Mixed signal CMOS工艺实现。测试结果表明,混频器的转换增益约为8 dB,单边带噪声系数约为11 dB,输入参考三阶交调点(IIP3)约为10.5 dBm。芯片工作在1.8 V电源电压下,消耗的电流为10 mA,芯片总面积为0.63 mm×0.78 mm。     

基于倒扣技术的Ka波段环形混频器

给出了一种应用在毫米波前端的单平衡环形混频器。该混频器采用高介电常数的复合材料(R ogersDuro id3010,rε=10.2),以获得较小的芯片面积;电路设计中重点考虑了在较低的本振功率的情况下获得较小的变频损耗,并给出了一种新的混合环的分析方法。当本振在36.5 GH z有9 dBm的功率输入时,混频器有7 dB的变频损耗,双边带噪声系数11.5 dB,本振到中频和射频到中频分别有40.5 dB和31 dB的隔离度。     

A CMOS passive mixer with low flicker noise for low-power direct-conversion receiver

A CMOS passive mixer is designed to mitigate the critical flicker noise problem that is frequently encountered in constituting direct-conversion receivers. With a unique single-balanced passive mixer design, the resulted direct-conversion receiver achieves an ultralow flicker-noise corner of 45 kHz, with 6 dB more gain and much lower power and area consumption than the double-balanced counterpart. CMOS switches with a unique bias-shifting network to track the LO DC offset are devised to reduce the second-order intermodulation. Consequently, the mixer's IIP2 has been greatly enhanced by almost 21 dB from a traditional single-balanced passive mixer. An insertion compensation method is also implemented for effective dc offset cancellation. Fabricated in 0.18 /spl mu/m CMOS and measured at 5 GHz, this passive mixer obtains 3 dB conversion gain, 39 dBm IIP2, and 5 dBm IIP3 with LO driving at 0 dBm. When the proposed mixer is integrated in a direct-conversion receiver, the receiver achieves 29 dB overall gain and 5.3 dB noise figure.     

A 210 GHz Dual-Gate FET Mixer MMIC With ${>}$2 dB Conversion Gain, High LO-to-RF Isolation, and Low LO-Drive Requirements

We demonstrate the first active mixer monolithic microwave integrated circuit (MMIC) with positive conversion gain beyond 200 GHz. The presented dual-gate topology is realized in a 100 nm gate length metamorphic high electron mobility transistor technology. Without any pre- or post-amplification, the down-conversion mixer achieves $>$ 2 dB conversion gain and $>$16 dB local oscillation to radio frequency (LO-to-RF) isolation at 210 GHz, outperforming state-of-the-art resistive MMIC mixers. The conversion gain becomes positive for LO power levels larger than 0 dBm, making the mixer suitable for being driven by an MMIC-based frequency doubler. A comparison to state-of-the-art G-band mixers is given.