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1.
Lesl.  D  赵振峰 《电子测试》1996,10(2):34-37
为了准备1995年国际测试会议(ITC),质量测试工作组(QTAG)将要正式通过一个静态电流测试(I_(DDQ))的标准监控器。本文说明了QTAG的背景,描述了该工作组在开发和评估新的电流监控器电路时所面临的挑战。本文还提供了几种可能的解决方案。  相似文献   

2.
《电子质量》2003,(7):39-39
德州仪器针对电源电压低于1V的便携式应用市场 率先推出处理器监控器系列 德州仪器公司(TI)推出一款可监控电源电压在0.55-3.3V范围内的新型电源电压监控器系列,这是业界首款即使在电源电压降至0.4V时仍能确保提供有效复位脉冲的产  相似文献   

3.
《电子产品世界》2006,(9X):31-32
德州仪器(TI)宣布推出一款集成多个组件的完整电流采样监控器比较解决方案INA206,该解决方案在14引脚微小型封装中集成了一个高测电流感应放大器、两个比较器以及一个电压基准。INA206的两个自由比较器均可用于过流/欠流检测或电源过压/欠压检测。由于其中一个可提供延时功能,以用于低电平报警输出,而另一个则具有可编程闭锁功能,以实现更高电平的瞬态关键输出(instantaneous critical output),因此这种通用设计使得两个比较器实现了三个比较器的功能。这两个比较器均是开漏输出器件,其具备可以重新写入的0.6V内部基准电压。INA206还支持16V至+80V的宽泛的共模电压范围、500kHz带宽与2.7V至18V的宽泛的电源电压范围。在40℃至+125℃的扩展温度范围内,其最大输出误差规定为+/-3.5%。  相似文献   

4.
德州仪器推出一款集成多个组件的完整电流采样监控器比较解决方案INA206,该解决方案在14引脚微小型封装中集成了一个高测电流感应放大器、两个比较器以及一个电压基准,不仅简化了电流比较电路设计,而且缩小了应用板级空间。其目标应用领域包括计算机、电源管理以及车载系统。  相似文献   

5.
《电子与电脑》2011,(5):73-73
Diodes公司推出ZXCT11xx系列低功耗高侧电流监控器。新器件的工作电流仅3μA,可为各类电机驱动、过载保护及安全应用提供精确、高效的负载电流测量。  相似文献   

6.
IDDQ测试技术及其实现方法   总被引:1,自引:1,他引:1  
IDDQ测试是近几年来国外比较流行的CMSO集成电路测试技术。IDDQ测试能够2检测出传统的固定值故障电压测试所无法检测的CMOS集成电路内部的缺陷、所以,能够明显提高CMOS集成电路的使用可靠性。本文叙述了IDDQ测试的基本原理和IDDQ测试在集成电路测试系统上的实现方法及测试实例。  相似文献   

7.
为了测量过载检测和保护时的直流大电流,设计者经常采用电流并联电阻器或环形磁芯,以及霍尔效应磁场传感器.这些方法都有缺点.例如,用一个10m Ω电阻器测量20A电流会白白耗散掉4W功率.  相似文献   

8.
《中国新通信》2007,9(19):41-41
Zetex Semiconductors公司近期推出ZXCT1020低成本电流监控器,它能产生典型误差低于1%的电流输出信号。ZXCT1020采用5引脚SOT23封装,通用模式电压范围宽达2.5V至20V,能为不同类型的应用提供性能完备的电流测量解决方案,无论在低电压的便携式设备还是在汽车电路中均可派上用场。这款高端电流监控器的输出可以独立缩放,不需受制于检测电阻器。两个外部电阻器一个用来设置跨导,一个用来设置总增益和输出阻抗。偏移调整非常小,能在高电流水平下显著改善微小检测电压的表现。  相似文献   

9.
以前有篇设计实例描述了一种可编程电流源.使用的是美国国家半导体公司的LM317可调三端稳压器(参考文献1)。虽然该电路可以编程设定输出电流,但负载电流要流经BCD(二一十进制)开关。不过.你会发现很难买到能承受25mA以上电流的BCD开关,这就限制了电路的输出电流。使用Zetex公司简单的四脚ZXCT1010电池检测监控芯片.可以提升电流.因为电流不再流经BCD开关(图1)。  相似文献   

10.
Diodes公司推出ZXCT11xx系列低功耗高侧电流监控器。新器件的工作电流仅3μA,可为各类电机驱动、过载保护及安全应用提供精确、高效的负载电流测量。这些器件的低工作电流性能配合2.5 V至36 V的宽共模电压范围,以及-40 oC至125 oC的工作温度,适合需要更高电源电压的汽车、工业和白色家电电路设计。  相似文献   

11.
This paper presents a novel built-in current sensor that uses two additional power supply voltages besides the system power supply voltage, and that is constructed by using a current mirror circuit to pick up an abnormal IDDQ. It is activated only by an abnormal quiescent power supply current and minimizes the voltage drop at the terminal of the circuit under test. Simulation results showed that it could detect 16-A IDDQ against 0.03-V voltage drop at 3.3-V VDD and that it reduced performance degradation in the circuit under test. It is therefore suitable for testing low-voltage integrated circuits. Moreover, we verified the behavior of the sensor circuit implemented on the board by using discrete devices. Experimental results showed that the real circuit of the sensor functioned properly.  相似文献   

12.
    
This article presents a built-in current sensor (BICS), which detects faults using the current testing technique in CMOS integrated circuits. This circuit employs cross-coupled PMOS transistors, which are used as current comparators. The proposed circuit has a negligible impact on the performance of the circuit under test (CUT). In addition, no extra power dissipation and high-speed fault detection are achieved. It can be applied to deep sub-micron processes. The validity and effectiveness are verified through the HSPICE simulation on circuits with faults. The entire area of the test chip is 116×65 μm2. The BICS occupies only 41×17 μm2 of the area of the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix 0.35 μm 2-poly-4-metal N-well CMOS process.  相似文献   

13.
Switched current (SI) circuits use analogue memory cells as building blocks. In these cells, like in most analogue circuits, there are hard-to-detect faults with conventional test methods. A test approach based on a built-in dynamic current sensor (BIDCS), whose detection method weights the highest frequency components of the dynamic supply current of the circuit under test, makes possible the detection of these faults, taking into account the changes in the slope of the dynamic supply current induced by the fault. A study of the influence of these faults in neighbouring cells helps to minimize the number of BICS needed in SI circuits as is shown in two algorithmic analogue-to-digital converters. Yolanda Lechuga received a degree in Industrial Engineering from the University of Cantabria (Spain) in April 2000. Since then, she has been collaborating with the Microelectronics Engineering Group at the University of Cantabria, in the Electronics Technology, Systems and Automation Engineering Department. Since October 2000 she has been a post-graduate student, to be appointed as lecturer at this university, where she is working in her Ph.D. She is interested in supply current test methods, fault simulation, BIST and design for test of mixed signal integrated circuits. Román Mozuelos received a degree in Physics with electronics from the University of Cantabria, Spain. From 1991 to 1995 he was working on the development of quartz crystal oscillators. Currently, he is a Ph.D. student and an assistant teacher at the University of Cantabria in the Department of Electronics Technology. His interests include mixed-signal design and test, fault simulation, and supply current monitoring. Miguel A. Allende received his graduate degree in 1985 and Ph.D. degree in 1994, both from the University of Cantabria, Santander, Spain. In 1996, he became an Assistant Professor of Electronics Technology at the same Institution, where he is a member of the Microelectronics Engineering Group at the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. His research interests include design of VLSI circuits for industrial applications, test and DfT in digital VLSI communication circuits, and power supply current test of mixed, analogue and digital circuits. Mar Martínez received her graduate degree and Ph.D. from the University of Cantabria (Spain) in 1986 and 1990. She has been Assistant Professor of Electronic Technology at the University of Cantabria (Spain) since 1991. At present, she is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. She has participated in several EU and Spanish National Research Projects. Her main research interest is mixed, analogue and digital circuit testing, using techniques based on supply current monitoring. She is also interested in test and design for test in digital VLSI circuits. Salvador Bracho obtained his graduate degree and Ph.D. from the University of Seville (Spain) in 1967 and 1970. He was appointed Professor of Electronic Technology at the University of Cantabria (Spain) in 1973, where, at present, he is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. He has participated, as leader of the Microelectronics Engineering Group at the University of Cantabria, in more than twenty EU and Spanish National Research Projects. His primary research interest is in the area of test and design for test, such as full scan, partial scan or self-test techniques in digital VLSI communication circuits. He is also interested in mixed-signal, analogue and digital test, using methods based on power supply current monitoring. Another research interest is the design of analogue and digital VLSI circuits for industrial applications. Prof. Bracho is a member of the Institute of Electrical and Electronic Engineers.  相似文献   

14.
简单介绍了闭环式霍尔电流传感器的工作原理,在其基础上提出了一种限流保护电路,使得霍尔电流传感器原边电流过载时输出电流钳位,保障其满足3倍甚至更高倍过载要求,并通过了试验验证.  相似文献   

15.
介绍了光学电流传感器的实现原理,各种光学电流传感器的实现方案及其各自的优缺点,同时提 出目前影响光学电流传感器商用化的几个问题及其相应的解决措施。  相似文献   

16.
一种基于电涡流传感器的数据采集系统   总被引:8,自引:0,他引:8  
论述并分析了电涡流传感器的基本原理,设计了同被测件相应的电涡流传感器,并完成了测量电路、接口电路的设计和调试,从而完成了基于电涡流传感器的数据采集系统设计。该类系统可用于自动售货机币值的判别和生产线扁平金属工件的多信息采集及自动控制,由于是多信息采集,系统具有更高的准确性。  相似文献   

17.
江耀曦  邵建龙  杨晓明  何春 《现代电子技术》2011,34(16):131-132,136
针对CMOS集成电路的故障检测,提出了一种简单的IDDQ静态电流测试方法,并对测试电路进行了设计。所设计的IDDQ电流测试电路对CMOS被测电路进行检测,通过观察测试电路输出的高低电平可知被测电路是否存在物理缺陷。测试电路的核心是电流差分放大电路,其输出一个与被测电路IDDQ电流成正比的输出。测试电路串联在被测电路与地之间,以检测异常的IDDQ电流。测试电路仅用了7个管子和1个反相器,占用面积小,用PSpice进行了晶体管级模拟,实验结果表明了测试电路的有效性。  相似文献   

18.
A research on passive optical fiber current sensor based on magneto-optical crystal and a new design of light path of the sensor head are presented. Both methods of dual-channel optical detection of the polarization state of the output light and signal processing are proposed. Signal processing can obtain the linear output of the current measurement of the wire more conveniently. Theoretical analysis on the magnetooptical fiber current sensor is given, followed by experiments. After that, further analysis is made according to the results, which leads to clarifying the exiting problems and their placements.  相似文献   

19.
Built-in current sensor (BICS) is known to enhance test accuracy, defect coverage of quiescent current (IDDQ) testing method in CMOS VLSI circuits. For new deep-submicron technologies, BICSs become essential for accurate and practical IDDQ testing. This paper presents a new BICS suitable for power dissipation measurement and IDDQ testing. Although the BICS presented in this paper is dedicated to submicron technologies that require reduced supply voltage, it can also be used for applications and technologies requiring normal supply voltage. The proposed BICS has been extended for on-line measurement of the power dissipation using only an additional capacitor. Power dissipation measurement is important for safety-critical applications and battery-powered systems. A simple self-test approach to verify the functionality and accuracy of BICSs has also been introduced. The proposed BICS has been implemented and tested using an N-well CMOS 1.2 m technology. Practical results demonstrate that a very good measurement accuracy can be achieved.  相似文献   

20.
This paper presents a test technique that employs two different supply voltages for the same IDDQ pattern. The results of the two measurements are subtracted in order to eliminate the inherent sub-threshold leakage. Summary of the experiment carried out on System on a Chip (SOC) device build in 0.35 technology is also shown. These experiments proved that the method is effective in detecting failures not detectable with the single limit IDDQ.  相似文献   

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