Comparison of type-I and type-II accelerated life tests forselecting the most reliable product

In product research and development, one might wish to select the most reliable of several highly-reliable competing products. Both type-I and type-II accelerated life tests (ALT) are well-known to estimate and compare the life of highly reliable (nonrepairable) products within a reasonable testing time. A common decision problem is to choose the better plan for achieving the above goal. This paper proposes an intuitive selection rule for each ALT plan, and then derives the respective optimal ALT sampling plan when the acceleration factor (AF) is known and unknown. Finally, some criteria of Mackay are used to compare the two plans. From a practical point of view, the type-II ALT sampling plan is more convenient, and needs smaller sample size than the type-I ALT sampling plan. Nevertheless, the latter has shorter mean duration time and life testing time than the former     

Sample Size for Selecting the Better of Two Weibull Populations

Suppose an experimenter wishes to select the better of two Weibull populations. In a life testing situation he may have some time t* for which the device must perform properly and he would consider the better population to be the one with the larger reliability at time t*. It is reasonable for the experimenter to test n items from each of the two populations until there are r(r < n) failures from each and then select as better the population for which the maximum likelihood estimate of the reliability at time t* is the larger. This paper presents the sample sizes needed to achieve a desired level for the probability of correct selection with such a decision rule.     

Effect of solder pads on the fatigue life of FBGA memory modules under harmonic excitation by using a global–local modeling technique

This paper investigates the effect of solder pad size on the fatigue life of fine-pitch ball grid array (FBGA) solder joints in memory modules due to harmonic excitation by using a global–local modeling technique. Finite element analysis of a memory module requires enormous computer memory and computational time because some components such as solder balls are very small relative to the overall size of the memory module. The global–local modeling technique has been suggested as an alternative approach with reasonable accuracy. A finite element model of the memory module with simplified solder joints was developed as a global model, and the natural frequencies and modes were calculated and verified by experimental modal testing. Displacement variations were calculated from the global model due to vibration excitation using the mode superposition method. A finite element model of a part of the memory module, which is composed of a package, PCB, and detailed solder joints, was developed as a local model. Calculated displacements from the global model were then substituted along the boundary of the local model in order to detect vulnerable parts of solder joints under vibration. Utilizing the global–local modeling technique, the interface between the solder ball and pad near the PCB was found to be the most vulnerable part, and the effect of solder pad size on the fatigue life of the memory module was determined by using the Basquin equation and Miner’s rule. It was experimentally verified that the solder pad size in solder joints affects fatigue life as well as the reliability of solder joints under harmonic excitation.     

弹载激光探测器加速寿命试验与评估研究

为满足弹载激光探测器贮存寿命评估的实际需求,研究了适用于激光探测器的加速寿命试验与寿命评估方法。首先,研究影响激光探测器的贮存寿命的因素,提出加速试验方案中应力范围、寿命分布类型、应力施加方式、试验时间等因素设计准则,其次基于极大似然法计算加速模型参数,通过寿命分布类型检验判定加速试验方案的合理性,最后利用加速因子折合寿命试验数据,实现贮存寿命评估,本文研究内容为激光探测器贮存寿命评估提供借鉴。     

10℃法则与多层瓷介电容器的贮存寿命试验

GJB/Z 148-2006《军用电容器选择与应用指南》提出的10℃法则,是表征元件寿命与温度应力关系的简便估算方式,它对于估算实际的使用条件下多层瓷介电容器的长期贮存寿命有着重要的意义。列举了国外对于多层瓷介电容器激活能的研究成果,并通过经典的温度加速模型与10℃法则的关系,证明了10℃法则对于多层瓷介电容器的加速寿命试验的适用性;同时认为根据10℃法则进行贮存寿命试验所得到的结果比使用经典的温度加速模型得到的结果更加可信。     

An optimal designed degradation experiment for reliability improvement

In conducting a design-of-experiments, with degradation data, to improve the reliability of highly reliable products, one of the most important topics for manufacturers is to identify important factors that affect the product reliability. Several decision variables such as inspection frequency, sample size, and termination time at each run, do influence the precision of identifying the important factors and the experimental cost. This paper proposes a systematic approach to the identification problem with respect to fractional factorial degradation experiments. First, an intuitively appealing identification rule is proposed. Next, the optimum test plan is derived using the criterion of minimizing the total experimental cost. The inspection frequency, sample size, and termination time at each run, that are needed by this identification rule are computed by solving a nonlinear integer programming model with a minimum probability of correct selection. A simulation study investigates the efficiency of this method.     

电子元器件加速寿命试验方法的比较

加速寿命试验作为可靠性试验的一个组成部分,是控制、提高电子产品可靠性的常用方法.目前有三种加速寿命试验方法:恒定应力、步进应力和序进应力加速寿命试验.简要介绍了加速寿命试验的概念,举例说明这三种方法的实施方案及数据处理,从实际操作角度比较了三种方法的优、缺点,并对其应用情况做了介绍.     

Confidence limits on the failure rate and a rapid projection nomogram for the lognormal distribution

In order to predict the sample failure rate from a limited number of early malfunctions, we have developed the rapid lognormal projection nomogram (RLPN) which we present at 1, 5, and 10 years of service. In the core of each diagram is a family of curves showing the variation of failure rate as a function of sample median life and standard deviation. Superimposed are Arrhenius plots for a series of activation energies, all referenced with respect to a fixed time. We also display the standard deviation as a function of relative median life, using cumulative failure as a parameter. The RLPN provides graphical means to estimate the failure rate at the planned service life and operating temperature in an efficient manner from the time to failure at the aging temperature and sample size for known or assumed values of the standard deviation and activation energy. To obtain the confidence limits for the failure rate of the lognormal distribution at the 90% confidence level, we have derived an approximate formula that relates the bounds to the service life and the sample's size, median life, and standard deviation. Then, by an appropriate selection of the independent variables and parameters, the confidence intervals are displayed as a series of curve families. The applications of the diagrams are discussed by means of illustrative examples taken from the field of GaAs FETs.     

基于综合环境加速寿命试验的 电子装备故障预测研究

 对某型雷达天控系统的20kHz信号板进行均匀正交试验,利用试验数据对试验结果进行了深层次的分析,总结出温湿度条件下电子装备性能衰退的一般规律;针对在故障预测中占有重要地位的电子装备可靠性预测问题,提出了一种基于综合环境加速寿命试验的电子装备可靠性预测新方法,该方法将性能退化理论拓展为加速性能退化理论,将该理论与传统可靠性预测方法相结合,有效地解决了加速寿命试验中无失效数据的处理问题,最后通过具体的算例验证了该方法的有效性.     

基于PXI总线的导弹引控自动测试系统设计

针对某型导弹引控系统现有测试设备测试仪器分散、连接复杂、自动化程度低、耗费高等问题,提出一种基于PXI总线技术的自动测试系统(ATS)设计,实现测试系统的自动化、模块化及通用化,降低测试系统的规模,节约研发成本。描述了测试系统的结构和组成,给出了测试系统的硬件设计及软件设计。重点介绍模块化仪器的选择、电源模块的设计及软件的测试流程。经论证,系统设计合理、测试准确、自动化程度高,满足测试需求。     

指数步降加寿试验分组数据的MLE与模拟分析

加速寿命试验在高可靠、长寿命的产品寿命估计中的应用愈来愈广泛,而步降应力试验方法能在较短的时间内获取足够统计精度的失效寿命数据,在很大程度上改善了加速寿命试验效率。对简单步降试验（即两步步降试验）所获得的分组数据进行统计分析,估计加速模型方程参数,给出了指数分布情形下的极大似然估计。模拟实例充分验证了该理论的可行性和有效性,为高可靠长寿命产品的评估提供了更为高效、低资的寿命试验解决方案,完善了加速寿命试验理论。     

Feature Vector Selection Method Using Mahalanobis Distance for Diagnostics of Analog Circuits Based on LS-SVM

Multi-fault diagnosis for analog circuits based on support vector machine (SVM) usually used a single feature vector to train all binary SVM classifier. In fact, each binary SVM classifier has different classification accuracy for different feature vectors. However, no one has discussed the optimal or near-optimal feature vector selection problem. Based on Mahalanobis distance, a near-optimal feature vector selection method has been proposed for diagnostics of analog circuits using the least squares SVM (LS-SVM). The selection problems of wavelet types, wavelet decomposition level, and normalization methods have been also discussed. Two filters with parametric faults and a nonlinear half-wave rectifier with hard and parametric faults were used as circuits under test (CUTs). The simulation results showed the following: (1) the accuracies using the feature vector with the maximum MD were better than the average accuracies using all the feature vectors, and were better than most accuracies using a single feature vector. But the computation time using the MD method was an order of magnitude larger than that using a single feature vector; (2) Most the diagnostic accuracies using the maximum MD method were near to the optimal accuracies using the exhaustive method while the computation time was reduced about 20–50?% in comparision to the exhaustive method; (3) the Haar wavelet was the best choice among Daubechie’s wavelet family for all CUTs’ diagnosis; (4) only non-normalization, all-normalization, and part-normalization methods are necessary to be considered for feature vector normalization. The proposed method can obtain a near-optimal diagnostic accuracy in a reasonable time, which is beneficial for analog IC or circuits testing and diagnosis.     

Limited failure-censored life test for the Weibull distribution

When the distribution of lifetimes is 2-parameter exponential, Balasooriya (1995) provided a failure-censored reliability sampling plan to save test time. This paper extends the Balasooriya sampling plan to the Weibull distribution and provides a limited failure-censored reliability sampling plan (LFCR) to do life testing when test facilities are scarce. The s-expected test time of the LFCR is computed, and the optimal stopping rule of LFCR corresponding to the shortest test time is established. The s-confidence intervals for the parameters are generated     

随机选择算法的研究

随机选择问题在现实生活和工作中大量存在,这牵扯到社会公正、公平以及其他更深刻的科学问题。正确合理地随机选择算法对解决随机选择问题至关重要。在此研究了人们熟知的随机抽题考试、随机抽取学生分班等几个随机选择问题,给出了如何使用随机数生成函数解决它们的算法。这些算法可以直接用于解决其他类似随机选择问题,或对解决它们具有广泛的可借鉴性。     

E~2PROM擦/写特性的PCM研究

使用薄隧道氧化层浮栅器件逐渐成为在电可擦除稳定的存储器中一个标准[1]，根据E~2PROM工艺特点，本文着重分析了E／W后学元开启电压和E／W时间。E／W电压、隧道扎面积的关系。给出了开发和研究E~2ROM器件模型的工艺评价用PCM及常规用PCM的测试结果，为E~2PROM的工艺开发和实现提供有力的帮助。根据浮栅E~2PROM的物理模型[2]，建立了存储单元的阈值电压模型，利用该模型研究了存储单元E／W后同值电压与物理尺寸、E／W电压、E／W时间的关系。通过对这一关系更深入的认识，一方面在单元设计上有利于了解不同类型的E~2PROM，为减小器件尺寸以及今后开发业微米的设计规则作准备；另一方面，在工艺上建立一个准确的单元添件参数模型，得到各层次各关键工序的工艺评价参数，为制造高性能高可靠性的存储单元打下坚实基础。     

Accelerated degradation-tests with tightened critical values

ALT (accelerated life tests) are widely used to provide quickly the information about life distributions of products. Life data at elevated stresses are extrapolated to estimate the life distribution at design stress. The existing estimation methods are efficient and easy to implement-given sufficient life data. However, ALT frequently results in few or no failures at low-level stress, making it difficult to estimate the life distribution. For products whose failures are defined in terms of performance characteristics exceeding their critical values, reliability assessment can be based on degradation measurements by using degradation models. The estimation, however, is usually mathematically complicated and computationally intensive. This paper presents a method for the estimation of life distribution by using life data from degradation measurements. Since the time-to-failure depends on the level of a critical value, more life data can be obtained by tightening the critical value. The relationship between life and critical value and stress is modeled and used to estimate the life distribution at a usual critical value and design stress. The model parameters are estimated by using maximum likelihood. The optimum test plans, which choose the critical values, stress levels, and proportions of sample size to each stress level, are devised by minimizing the asymptotic variance of the mean (log) life at a usual critical value and design stress. The comparison between the proposed and existing 2-level test plans shows that the proposed plans have smaller asymptotic variance and are less sensitive to the uncertainty of the pre-estimates of unknown parameters.     

Influence of Asymmetrical Waveform on Low-Cycle Fatigue Life of Micro Solder Joint

The effects of waveform symmetry on the low-cycle fatigue life of the Sn-3.0Ag-0.5Cu alloy have been investigated, using micro solder joint specimens with approximately the same volume of solder as is used in actual products. Focusing on crack initiation life, fatigue tests on Sn-Ag-Cu micro solder joints using asymmetrical triangular waveforms revealed no significant reduction in fatigue life. A slight reduction in fatigue life at low strain ranges caused by an increase in the fatigue ductility exponent, which is the result of a weakening microstructure due to loads applied at high temperature for long testing time, was observed. This was due to the fact that grain boundary damage, which has been reported in large-size specimens subjected to asymmetrical triangular waveforms, does not occur in Sn-Ag-Cu micro size solder joints with only a small number of crystal grain boundaries.     

基于寿命应力模型的电能表加速寿命试验研究

当前加速寿命试验模型主要以单一应力加速模型为主。本文在威布尔分布模型基础上,结合Peck温湿加速模型,首次提出用于描述电能表加速试验的＂寿命-应力＂模型,并采用高温高湿环境实现加速寿命测试的方法对DDZY33C-Z型电表进行了可靠性评估。该方法在实验室中用30台样机进行4天左右的时间,可以验证电能表10年的平均寿命,从而大大减少了试验时间和试验成本。     

Optimal design of life testing for ULSI circuit manufacturing

The life testing of ultra large scale integration (ULSI) circuits is perhaps the most complex manufacturing process found today. This complexity is, in part, the result of product diversity, uncertainty, and changing technologies, and has caused the cost of testing for ULSI circuits to grow exponentially. The author develops a testing cost model and determines the optimum sample size on test which minimizes the expected total system cost assuming that the cost of waiting per unit time and the cost of placing an ULSI circuit on test are given. Numerical examples are also provided to illustrate the methods     

A fast mechanical test technique for life time estimation of micro-joints

A novel accelerated mechanical testing method for reliability assessment of micro-joints in the electronic devices is presented as an alternative to time consuming thermal and power cycling test procedures. A special experimental set-up in combination with an ultrasonic resonance fatigue testing system and a laser Doppler vibrometer is used to obtain fatigue life curves of micro-joints under shear loading. Using this method fatigue life curves of Al wire bonded micro-joints were obtained up to 10⁹ number of loading cycles and discussed with regard to micro-mechanisms of the bond failure. Failure analysis of the fatigued micro-joints showed that the predominant failure mechanism of power cycling tests, bond wire lift-off, was reproduced by the mechanical testing procedure. Life time of the micro-joints was modelled using a Coffin–Manson type relationship and showed a good correlation to life time curves obtained by power cycling tests. The major advantage of the proposed fast mechanical testing method is the significant reduction of the testing time in comparison with conventional thermal and power cycling tests. Furthermore subsequent examination of the failure surface provides a reliable tool for improvement of the bonding process. The proposed high frequency fatigue testing system can be applied as a rapid qualification and screening tool for various kinds of interconnects in electronic packaging.