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1.
用于直播卫星接收机中的12GHz频段GaAs双栅MESFET单片混频器已经研制成功。为了减小芯片尺寸,缓冲放大器直接连在混频器的中频输出端后面,而不采用中频匹配电路。混频器和缓冲器制作在各自的芯片上,以便能分别测量。混频器芯片尺寸是0.96×12.6mm,缓冲器芯片尺寸是0.96×0.60mm。用于混频器的双栅FET和用于缓冲器的单栅FET都具有间隔紧密的电极结构。栅长和栅宽分别是1μm和320μm。带有缓冲放大器的混频器在11.7~12.2GHz射频频段提供2.9±0.4dB变频增益和12.3±0.3dB单边带(SSB)噪声系数。本振频率是10.8GHz。将一个单片前置放大器、一个镜象抑制滤波器和一个单片中频放大器与混频器连接起来构成低噪声变频器。变频器在上述频段内提供46.8±1.5dB的变频增益和2.8±0.2dB单边带噪声系数。  相似文献   

2.
<正> 利用GaAs FET双栅芯片,在30×40mm的复合介质基片上,根据计算机优化结果,制作了三级双棚GaAs FET可变增益放大器。在2.2~3.7GHz频率范围内,典型小信号增益大于25dB;在2.5~3.0GHz频段,最高增益为36dB,典型平坦度为±0.7dB。改变第二栅偏置电压,放大器增益连续可变,典型动态增益范围为70dB。该放大器开关时间小于10ns。可用作高速调制器、高速开关。双栅GaAs FET芯片塑料封装,单电源供电(除二栅),使用方便,稳定可靠,初步试用已显示出它具有应用前景。  相似文献   

3.
研制了用于直播卫星接收机的12GHz波段GaAs双栅MESFET单片混频器。为了缩小芯片面积,把一个缓冲放大器直接与混频器的中频端口连接,而不采用中频匹配电路。混频器和缓冲放大器分开制造在两个芯片上,以便单独测量。混频器芯片尺寸为0.96×1.26mm~2,缓冲放大器芯片尺寸为0.96×0.60mm~2。混频器的双栅FET,以及缓冲放大器的单栅FET的电极间距很小。栅长和栅宽各1μm和320μm。在11.7~12.2GHz,带有缓冲放大器的混频器提供转换增益为2.9±0.4dB,单边带噪声系数12.3±0.3dB。本振(LO)频率为10.8GHz。低噪声变频器由单片前置放大器、镜象抑制滤波器,以及单片中频放大器与混频器连接构成。在同一频段,变频器提供转换增益为46.8±1.5dB,单边带噪声系数为2.8±0.2dB。  相似文献   

4.
报道了研制的1mm栅宽的AlGaN/GaN HEMT内匹配微波功率管,在32V漏偏压下在7.5~9.5GHz频率范围内输出功率大于5W,功率附加效率典型值为30%,功率增益大于6dB,带内增益平坦度为±0.4dB,带内最大输出功率为6W。  相似文献   

5.
在低频FET放大器中,电阻反馈是一种卓有成效的方法,采用这种方法能同时获得好的超宽带增益平坦度和输入、输出电压驻波比。与简单的匹配电路相结合,这种电阻反馈电路可以设计通用目的实用放大器,其芯片面积要比用通常的匹配技术的芯片面积小得多。本文所描述的电路芯片面积为1.5×1.5mm,频率为5MHz~2GHz,增益为10dB±1dB,极好的输入和输出电压驻波比,饱和输出功率大于+20dBm。最小噪声偏置下的噪声系数近似2dB,相关增益为9dB。  相似文献   

6.
本文介绍已用于卫星通信地面接收小站,取代常温参放作为前置低噪声放大器的4GHz低噪声AaAsFET放大器的研制情况。文中分析FET放大器的噪声模型;阐明FET放大器的噪声与频率及温度的关系;提供放大器电路的设计与调整方法;最后给出由两级FET组成的放大器的实测性能:增益G>20dB,平坦带宽B>500MHz,整机噪声温度Ter≤150K(含输入波导隔离转换及接收机后级的影响),增益波动△G<±0.5dB,增益斜率△G/△f≤±0.2d B/50MHz,群时延τ_(P-P)≤0.4ns/任意50MHz,1dB增益压缩点的输出功率P_(out)=+4dBm,三次交调产物与载波比I/G≤55dB,工作环境温度t=-40℃~+50℃。  相似文献   

7.
利用一四一三所研制的微波功率砷化镓FET,研制了一种高增益的五级功率放大器,末级利用功率合成。在C波段,线性增益31dB,1dB增益压缩点输出功率为860mw。当输入信号为1mw时。中心频率输出为940mw,效率达10%左右。  相似文献   

8.
本文报导的混合集成12GHz接收机电路由两个单栅FET构成前置放大器,一个双栅FET构成振荡器和混频器。电路含有全接收机功能,包括镜频抑制、中频匹配、振荡器稳频和全部FET偏置电路。电路中没有中频放大器。接收机集成在25.4×50.8mm~2氧化铝基片上。在400MHz带宽内变频增益达12~18dB,最佳噪声系数为4.5~5dB。  相似文献   

9.
本文报导了用于RF和DC电路中用真正的集总元件实现的四级直接级联GaAs FET单片前置放大器芯片的成功进展。设计的芯片全部自偏置,而且芯片上包括了所有工作需要的、从单一漏电源供电的DC电路。设计基于平面结构的栅长标称为1μm叉指型的FET图形。器件制作采用选择离子注入工艺,制成的芯片面积是0.060×0.110in,厚0.015in。芯片给出大于20dB增益,带宽为2GHz,中心频率接近7GHz,已达到的噪声系数是6dB,输出功率在1dB增益压缩点上的典型值是+8dBm,三级互调截止点接近+20dBm。  相似文献   

10.
文章主要介绍应用于集群接收机系统的350MHz~470MHz低噪声放大器,采用0.6μm CMOS工艺。探讨了优化低噪声放大器的噪声系数、增益与线性度的设计方法,同时对宽带输入输出匹配进行了分析。这种宽带低噪声放大器的工作带宽350MHz~470MHz,噪声系数小于3dB,增益为24dB,增益平坦度为±1dB,输入1dB压缩点大于-15dBm。  相似文献   

11.
A high-frequency equivalent circuit model of a GaAs dual-gate FET and analytical expressions for the input/output impedances, transconductance, unilateral gain, and stability factor are presented in this paper. It is found that the gain of a dual-gate FET is higher than that of a single-gate FET at low frequency, but it decreases faster as frequency increases because of the capacitive shunting effect of the second gate. A dual-gate power FET suitable for variable gain amplifier applications up to K-band has been developed. At 10 GHz, a I.2-mm gatewidth device has achieved an output power of 1.1 W with 10.5-dB gain and 31-percent power-added efficiency. At 20 GHz, the same device delivered an output power of 340 mW with 5.3-dB gain. At K-band, a dynamic gain control range of up to 45 dB was obtained with an insertion phase change of no more than +-2 degrees for the first 10 dB of gain control.  相似文献   

12.
本文简单介绍GaAs双栅功率FET的设计考虑、结构、制作工艺和初步实验结果.器件的最佳性能为:4.5千兆赫下输出功率440毫瓦时增益9.4分贝,输出功率660毫瓦时增益3.2分贝,效率均大于20%.  相似文献   

13.
A new technique has been developed to generate sub-half-micron T-shaped gates in GaAs MESFET's. The technique uses a single-level resist and an angle evaporation process. By using this technique, T-shaped gates with lengths as short as 0.2 µm near the Schottky interface have been fabricated. Measured gate resistance from this structure was 6.1 Ω/mm gate width which is the lowest value ever reported for gates of equal length. GaAs single- and dual-gate MESFET's with 0.3 µm long T-shaped gates have also been fabricated. At 18 GHz, maximum available gain of 9.5 dB in the single-gate FET and maximum stable gain of 19.5 dB in the dual-gate device have been measured.  相似文献   

14.
A low distortion GaAs power MESFET has been developed by employing a semi-insulating setback layer under the gate. The setback region was obtained by diffusing chromium from the Cr/Pt/Au gate metal in self-aligned manner. The novel power FET with the setback layer was found to be insensitive to surface trapping effects. They showed only 5-6 percent frequency dispersion of drain current at 1 MHz compared to DC condition. Because of this small frequency dispersion, the typical measurement FET, which has a surface setback layer, with a gate width of 36 mm exhibited 1.5 dB larger output power at 1 dB gain compression point than that of the FET without the setback layer. Moreover, in the π/4 shift-QPSK modulation that has been most popular in digital mobile communication system, the FET exhibited 11 dB smaller adjacent channel leakage power than the conventional one at the output power of 31.5 dBm  相似文献   

15.
The performance of the K-band balanced FET up-converter is described. A novel circuit configuration effective in enhancing conversion gain in the FET up-converter is proposed. An analysis using a simplified circuit model shows the effect of LO feedback in the balanced circuit. A conversion gain of 0.9 dB was experimentally obtained at 20 GHz. Maximum output power was 15.9 dBm.  相似文献   

16.
Resistive feedback in low-frequency FET amplifiers is an attractive method of simultaneously attaining gain flatness and excellent input-output VSWR over wide bandwidths. Combined with simple matching circuitry, the feedback approach allows the design of general-purpose utility amplifiers requiring much less chip area than when conventional matching techniques are used. The 1.5- by 1.5-mm chip described in this paper provides 10-dB ± 1-dB gain, excellent input and output VSWR, and saturated output power in excess of + 20 dBm, from below 5 MHz to 2 GHz. The noise figure is approximately 2 dB when biased for minimum noise, with an associated gain of 9 dB.  相似文献   

17.
Highly efficient enhance/depletion (E/D) dual-gate HEMT's for use in high-power linear amplifiers with a single biasing supply are demonstrated. These devices include platinum buried gates to realize a single biasing supply. A double-heterostructure and a GaAs/InGaAs/GaAs superlattice channel were adopted to obtain a good linearity and a large gain. An E/D dual-gate field effect transistors (FET) structure is also adopted to improve the gain and efficiency. High output power of 24 dBm, high power gain of 24 dB, and high power-added-efficiency of 46% for the gate width of 4-mm sample were obtained under conditions with a 1.5-GHz Japan Personal Digital Cellular (PDC) standard and with a +3.5 V single biasing supply  相似文献   

18.
A double-balanced dual-gate FET mixer has been developed for application in the front-end circuit of UHF receivers. A 6-8-dB conversion gain has been obtained without an additional matching circuit over a wide frequency range from 100-800 MHz with good suppression of RF/LO feedthrough by more than 20 dB and third-order intermodulatian product of -60 dB.  相似文献   

19.
This paper presents the design, fabrication, and performance of a broad-band monolithic dual-gate GaAs FET amplifier. The amplifier has a gain of 3.5-5 dB over the 4.5- to 8-GHz band.  相似文献   

20.
本文介绍Ku波段GaAs单片集成电路的设计、研制和测量结果。该单片电路的匹配网络采用对FET进行计算机分析和电路模拟相结合的方法进行设计。研制成功了一个两级单片电路,其尺寸为1.9×3.2×0.1mm,在14.5~15.4GHz的频率范围内,输出功率P_0≥100mW,增益G_P≥5dB,带内增益起伏△G_P≤±0.75dB。  相似文献   

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