共查询到19条相似文献,搜索用时 234 毫秒
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开展了一种2.5D Chiplet封装结构的热应力研究,形成了一套适用于先进封装的设计理论方法,从而显著提升Chiplet封装性能和降低成本。根据实际生产要求,选择芯片表面应力、底部填充胶应力和封装翘曲三个关键封装性能作为优化目标。首先建立了Chiplet封装模型,采用COMSOL进行有限元仿真,揭示了底部填充胶材料选型、两芯片间底部填充胶高度、塑封料和芯片高度三个参数对上述封装性能的影响规律。然后通过正交试验设计方法获得仿真数据,并基于极差分析法处理相关数据,分析各参数影响因素对优化目标的影响程度,进而获得2.5D Chiplet封装结构的最优参数。最后将优化后Chiplet封装模型通过仿真进行验证,结果表明该封装结构中芯片表面平均应力减小为93%,底部填充胶峰值应力减小为86%,和封装翘曲减低为96%,从而验证了设计的有效性。 相似文献
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《CAD/CAM与制造业信息化》2010,(2):97-97
2010年03月1日,本刊讯,DS SIMULIA宣布,AMD已采用Abaqus有限元分析软件对倒装芯片进行封装的可靠性分析.
1960年由IBM开发用于大型计算机的倒装芯片,现在广泛用于各类电子设备中,包括手表、智能卡、无线射频识别标签和移动电话.倒装芯片是指芯片直接以面朝下的方式倒装在封装基板、电路板和载体上. 相似文献
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封装热应力是导致MEMS器件失效的主要原因之一,本文设计了一种MEMS高g加速度传感器,并仿真研究了传感器在封装过程中的热应力及影响其大小的因素。根据封装工艺,建立设计的高g加速度传感器封装的有限元模型,利用AN-SYS软件仿真传感器在不同的贴片工艺中受到的热应力及影响热应力的因素。结果显示,在封装中,与直接贴片到管壳底部相比,MEMS高g加速度传感器芯片底面键合高硼硅玻璃后再贴片到管壳底部时,封装热应力可从135MPa降低到33MPa;在贴片工艺中,基板的热膨胀系数和贴片胶的弹性模量、热膨胀系数及厚度是影响封装热应力的主要因素;在健合工艺中,基板和键合温度主要影响到热应力的大小。 相似文献
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《CAD/CAM与制造业信息化》2010,(Z1)
2010年03月1日,本刊讯,DS SIMULIA宣布,AMD已采用Abaqus有限元分析软件对倒装芯片进行封装的可靠性分析。1960年由IBM开发用于大型计算机的倒装芯片,现在广泛用于各类电子设备中,包括手表、智能卡、 相似文献
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提出了一种新型基于阳极氧化铝基板的板载芯片(Chip on Board)封装技术。在5 wt.%,30℃的草酸电解液中采用60 V直流电压,制备了0.1 mm厚度的阳极氧化铝基板圆片,铝导线最小线宽、电阻及导线间绝缘电阻分别为35μm、小于1Ω/cm与大于1×1010Ω。在超薄阳极氧化铝基板圆片进行了双层Flash裸芯片堆叠及金丝引线键合,实现了圆片级COB封装,成品率高于93%。最后,将COB单元进行三维堆叠封装,制备了32 Gb Flash模组。因此基于阳极氧化铝基板的板载芯片封装技术具有较大的应用前景。 相似文献
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MEMS封装是在微电子封装技术基础上发展起来的一项关键的MEMS技术。介绍了MEMS封装技术的功能、特点与分类。在此基础上,重点介绍了键合技术、上下球栅阵列技术、倒装芯片技术、多芯片技术以及3-D技术等几种重要的MEMS封装技术。最后,进一步探讨了MEMS封装的发展趋势及研究方向。 相似文献
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鲜飞 《电子制作.电脑维护与应用》2006,(1):8-8
QFN(Quad Flat No-lead Package,方形扁平无引脚封装)是一种焊盘尺寸小、体积小、以塑料作为密封材料的新兴的表面贴装芯片封装技术。由于底部中央的大暴露焊盘被焊接到PCB的散热焊盘上,这使得QFN具有极佳的电和热性能。QFN的主要特点有:·表面贴装封装·无引脚焊盘设计占有更小的PCB区域·非常薄的元件厚度(<1mm),可以满足对空间有严格要求的应用·非常低的阻抗、自感,可满足高速或者微波的应用·具有优异的热性能,主要是因为底部有大面积散热焊盘·重量轻,适合便携式应用 相似文献
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Tomohisa Hashimoto Tanifuji Shin-ichiro Koji Morinishi Nobuyuki Satofuka 《Computers & Fluids》2008,37(5):520-523
We developed a numerical method for simulating the underfill flow of conventional capillary flow and no-flow types in flip-chip packaging. The analytical models for the two types of underfill encapsulation processes are proposed. In the capillary flow type, the underfill material is driven into the cavity with solder bump by the surface tension with an effect of contact angle as the capillary action. In the no-flow type, the movement of IC chip during the reflow attachment is controlled by an appropriate loading to get the proper interconnect between IC chip and substrate. In both types, the flow behavior and filling time of underfill material in underfilling encapsulation process are investigated, taking the fluid dynamic force acting on the solder bump into account. It is found that the proposed analytical models have a considerable potential for predicting the underfill flow. 相似文献
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Dang B. Bakir M.S. Patel C.S. Thacker H.D. Meindl J.D. 《Journal of microelectromechanical systems》2006,15(3):523-530
Technology feasibility of MEMS-type chip I/O interconnects (namely Sea-of-Leads or SoL) is demonstrated. Acting like a spring, a MEMS lead can provide high mechanical compliance to compensate for mismatch of coefficient of thermal expansion (CTE) between a Si chip and a composite substrate. The compliant interconnects can provide low-stress connection between a chip and a PWB substrate, and, therefore, are promising to enable wafer-level packaging of IC chips with mechanically weak low-k interlayer dielectrics (ILD). The compliant interconnection also eliminates the need for an expensive underfilling process, which is one of the key challenges for scaling of conventional controlled collapse chip connection (C4) solder bumps in organic flip-chip packages. For the first time, SoL MEMS interconnects were investigated through the whole procedure of process integration, assembly, as well as reliability assessment. Without underfill, the SoL MEMS interconnects survived more than 500 thermal cycles indicating a promising improvement over a regular C4 solder joint. Failure analysis suggests that the MEMS leads do not fracture while failure occurs close to solder-Cu pad interface due to a nonreliable joining. Full reliability potential of the SoL MEMS interconnects may be demonstrated upon optimization of PWB metallurgy, soldermask design and lead compliance. 相似文献
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T. Waber W. Pahl M. Schmidt G. Feiertag S. Stufler R. Dudek A. Leidl 《Microsystem Technologies》2014,20(4-5):861-867
In order to miniaturize piezoresistive barometric pressure sensors, a new flip-chip packaging technology has been developed. The thermal expansions of chip and package are different. So in a standard flip-chip package the strong mechanical coupling by the solder bumps would lead to stress in the sensor chip, which is unacceptable for piezoresistive pressure sensors. To solve this problem, in the new packaging technology the chip is flip-chip bonded on compliant springs to decouple chip and package. As the first step of the packaging process an under bump metallization (UBM) is patterned on the sensor wafer. Then solder bumps are printed. After wafer-dicing the chips are flip-chip bonded on copper springs within a ceramic cavity housing. Due to the compliance of the springs, packaging stress is induced into the sensor chip. As sources of residual stress the UBM and the solder bumps on the sensor chip were identified. Different coefficients of thermal expansion of the silicon chip, the UBM and the solder lead to plastic straining of the aluminum metallization between UBM and chip. As a consequence the measurement accuracy is limited by a temperature hysteresis. The influence of the chip geometry, e.g., the thickness of the chip or the depth of the cavity, on the hysteresis was investigated by simulation and measurements. As a result of this investigation a sensor chip was designed with very low residual stress and a temperature hysteresis which is only slightly larger than the noise of the sensor. 相似文献
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A backside-etched silicon chip with a polysilicon diaphragm flip-chip attached on a printed wiring board and globally bumped
on a FR4 printed circuit board was investigated through a finite element analysis for determining three key parameters of
flip-chip chip size packaging, namely, the size of solder bump, and the thickness of the printed wiring board with/without
U8437-3 underfill. Four kinds of thermal-induced stresses and deformations in the diaphragm, solder bump, and printed wiring
board were evaluated for the parametric study. As the simulation results show, the thermal-induced stresses in the diaphragm
and solder bump can be reduced effectively if the printed wiring board is thinner. However, the printed wiring board is still
required to be sufficiently thick to prevent warping. In addition, the underfill material also can reduce the induced stress
occurring at the interface between the solder joint and the chip and improve reliability. In general, the parametric study
can provide a basis for the flip chip package of a MEMS device with a diaphragm, such as a MEMS microphone, MEMS pressure
sensor, etc. 相似文献
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应用于MEMS的芯片倒装技术 总被引:1,自引:0,他引:1
通过对芯片倒装技术尤其是凸点加工工艺在MEMS设计中的作用进行实例分析,指出倒装芯片不仅是一种高性能的封装模式,还能为MEMS器件提供立体通道或是力热载体,并形成许多特殊的结构.在MEMS的加工过程中,可以充分考虑芯片倒装技术所带来的加工便利. 相似文献
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We report here a novel approach called microelectromechanical systems (MEMS) microflex interconnect (MMFI) technology for packaging a new generation of bioMEMS devices that involve movable microelectrodes implanted in brain tissue. MMFI addresses the need for the following: (1) operating space for movable parts and (2) flexible interconnects for mechanical isolation. We fabricated a thin polyimide substrate with embedded bond pads, vias, and conducting traces for the interconnect with a backside dry etch, so that the flexible substrate can act as a thin-film cap for the MEMS package. A double-gold-stud-bump rivet-bonding mechanism was used to form electrical connections to the chip and also to provide a spacing of approximately 15-20 mum for the movable parts. The MMFI approach achieved a chip-scale package that is lightweight and biocompatible and has flexible interconnects and no underfill. Reliability tests demonstrated minimal increases of 0.35, 0.23, and 0.15 mOmega in mean contact resistances under high humidity, thermal cycling, and thermal shock conditions, respectively. High-temperature tests resulted in increases of > 90 and ~ 4.2 mOmega in resistance when aluminum and gold bond pads were used, respectively. The mean time to failure was estimated to be at least one year under physiological conditions. We conclude that MMFI technology is a feasible and reliable approach for packaging and interconnecting bioMEMS devices. 相似文献
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Guang-Ping Shen Ming Qin Qing-An Huang Hua Zhang Jian Wu 《Microsystem Technologies》2010,16(4):511-518
A two dimensional wind sensor was designed, fabricated and packaged on ceramic substrate instead of silicon substrate. The
Ti/Pt heater and thermistors were fabricated using single lift-off process. The gold bumps were then sputtered and patterned
on the chip using lift-off process again. Correspondingly, the Pb/Sn bumps were fabricated on the FR4 substrate using stencil
printing method after metallization. The sensor chip was flip-chip packaged on the FR4 substrate, and the gap was filled with
epoxy-based underfill to improve the structure strength. The packaged sensor was tested in wind tunnel in constant power mode.
The wind velocity and direction offsets of the sensor were compensated using software and hardware calibration. Both the simulation
and test results show that the thermal wind sensor can measure wind speeds up to 8 m/s with an accuracy of 0.3 m/s, and wind
direction in a full range of 360° with a resolution within 5°. 相似文献