Feasibility of Localized Substrate Thinning for Reduced Dislocation Density in CdTe/Si Heterostructures

HgCdTe heteroepitaxy on low-cost, large-lattice-mismatched substrates such as Si continue to be plagued by large threading dislocation densities that ultimately reduce the operability of the thermal imaging detector array. Molecular-beam epitaxy (MBE) of 10 μm- to 15 μm-thick CdTe buffer layers has played a crucial role in reducing dislocation densities to current state-of-the-art levels. Herein, we examine the possibility that growth on locally back-thinned substrates could prove advantageous in further reducing dislocation densities in the CdTe/Si heteroepitaxial system. Using defect decoration techniques, a decrease in dislocation (etch-pit) density of up to ~42% has been measured in CdTe regions where the underlying Si substrate was chemically back-thinned to ~20 μm. A theoretical understanding is proposed, where a substrate-thickness-dependent dislocation image force is a likely cause for the experimentally observed reduction in threading dislocation density. These observations raise the prospect of combining localized substrate thinning with other techniques to further reduce dislocation densities to levels sought for HgCdTe/CdTe/Si and other large-lattice-mismatched systems.     

X-ray Diffraction Imaging of Improved Bulk-Grown CdZnTe(211) and Its Comparison with Epitaxially Grown CdTe Buffer Layers on Si and Ge Substrates

Large-area high-quality Hg_1–x Cd _x Te sensing layers for infrared imaging in the 8 μm to 12 μm spectral region are typically grown on bulk Cd_1–x Zn _x Te substrates. Alternatively, epitaxial CdTe grown on Si or Ge has been used as a buffer layer for high-quality epitaxial HgCdTe growth. In this paper, x-ray topographs and rocking-curve full-width at half-maximum (FWHM) data will be presented for recent high-quality bulk CdZnTe grown by the vertical gradient freeze (VGF) method, previous bulk CdZnTe grown by the vertical Bridgman technique, epitaxial CdTe buffer layers on Si and Ge, and a HgCdTe layer epitaxially grown on bulk VGF CdZnTe.     

Dislocation profiles in HgCdTe(100) on GaAs(100) grown by metalorganic chemical vapor deposition

We studied dislocation etch pit density (EPD) profiles in HgCdTe(lOO) layers grown on GaAs(lOO) by metalorganic chemical vapor deposition. Dislocation profiles in HgCdTe(lll)B and HgCdTe(lOO) layers differ as follows: Misfit dislocations in HgCdTe(lll)B layers are concentrated near the HgCdTe/CdTe interfaces because of slip planes parallel to the interfaces. Away from the HgCdTe/CdTe interface, the HgCdTe(111)B dislocation density remains almost constant. In HgCdTe(lOO) layers, however, the dislocations propagate monotonically to the surface and the dislocation density decreases gradually as dislocations are incorporated with increasing HgCdTe(lOO) layer thicknesses. The dislocation reduction was small in HgCdTe(lOO) layers more than 10 μm from the HgCdTe/CdTe interface. The CdTe(lOO) buffer thickness and dislocation density were similarly related. Since dislocations glide to accommodate the lattice distortion and this movement increases the probability of dislocation incorporation, incorporation proceeds in limited regions from each interface where the lattice distortion and strain are sufficient. We obtained the minimum EPD in HgCdTe(100) of 1 to 3 x 10⁶ cm^-2 by growing both the epitaxial layers more than 8 μm thick.     

Long wavelength infrared, molecular beam epitaxy, HgCdTe-on-Si diode performance

In the past several years, we have made significant progress in the growth of CdTe buffer layers on Si wafers using molecular beam epitaxy (MBE) as well as the growth of HgCdTe onto this substrate as an alternative to the growth of HgCdTe on bulk CdZnTe wafers. These developments have focused primarily on mid-wavelength infrared (MWIR) HgCdTe and have led to successful demonstrations of high-performance 1024×1024 focal plane arrays (FPAs) using Rockwell Scientific’s double-layer planar heterostructure (DLPH) architecture. We are currently attempting to extend the HgCdTe-on-Si technology to the long wavelength infrared (LWIR) and very long wavelength infrared (VLWIR) regimes. This is made difficult because the large lattice-parameter mismatch between Si and CdTe/HgCdTe results in a high density of threading dislocations (typically, >5E6 cm⁻²), and these dislocations act as conductive pathways for tunneling currents that reduce the R_oA and increase the dark current of the diodes. To assess the current state of the LWIR art, we fabricated a set of test diodes from LWIR HgCdTe grown on Si. Silicon wafers with either CdTe or CdSeTe buffer layers were used. Test results at both 78 K and 40 K are presented and discussed in terms of threading dislocation density. Diode characteristics are compared with LWIR HgCdTe grown on bulk CdZnTe.     

High-Performance LWIR MBE-Grown HgCdTe/Si Focal Plane Arrays

We have been actively pursuing the development of long-wavelength infrared (LWIR) HgCdTe grown by molecular beam epitaxy (MBE) on large-area silicon substrates. The current effort is focused on extending HgCdTe/Si technology to longer wavelengths and lower temperatures. The use of Si versus bulk CdZnTe substrates is being pursued due to the inherent advantages of Si, which include available wafer sizes (as large as 300 mm), lower cost (both for the substrates and number of die per wafer), compatibility with semiconductor processing equipment, and the match of the coefficient of thermal expansion with silicon read-out integrated circuit (ROIC). Raytheon has already demonstrated low-defect, high-quality MBE-grown HgCdTe/Si as large as 150 mm in diameter. The focal plane arrays (FPAs) presented in this paper were grown on 100 mm diameter (211)Si substrates in a Riber Epineat system. The basic device structure is an MBE-grown p-on-n heterojunction device. Growth begins with a CdTe/ZnTe buffer layer followed by the HgCdTe active device layers; the entire growth process is performed in␣situ to maintain clean interfaces between the various layers. In this experiment the cutoff wavelengths were varied from 10.0 μm to 10.7 μm at 78 K. Detectors with >50% quantum efficiency and R ₀ A ∼1000 Ohms cm² were obtained, with 256 × 256, 30 μm focal plane arrays from these detectors demonstrating response operabilities >99%. Work supported by the Missile Defense Agency (MDA) through CACI Technologies, Inc. subcontract no. 601-05-0088, NVESD technical task order no. TTO-01, prime contract no. DAAB07-03-D-C214, (delivery order no. 0016)     

Growth of high quality CdTe and ZnTe on Si substrates using organometallic vapor phase epitaxy

Epitaxial (100) CdTe and ZnTe layers with high crystalline quality have been grown on Si substrates by atmospheric pressure organometallic vapor phase epitaxy (OMVPE). A thin Ge interfacial layer grown at low temperature was used as a buffer layer prior to ZnTe and CdTe growth. The layers were characterized by Nomarski optical microscopy and double crystal x-ray diffraction. Double crystal rocking curves with full width at half maximum of about 110 and 250 arc-sec have been obtained for a 7 μm thick ZnTe layer and a 4 μm thick CdTe layer, respectively. The results presented demonstrate a novel method ofin-situ Si cleaning step without a high temperature deoxidation process to grow high quality CdTe and ZnTe on Si in a single OMVPE reactor.     

LWIR HgCdTe Detectors Grown on Ge Substrates

Long-wavelength infrared (LWIR) HgCdTe p-on-n double-layer heterojunctions (DLHJs) for infrared detector applications have been grown on 100 mm Ge (112) substrates by molecular beam epitaxy (MBE). The objective of this current work was to grow our baseline p-on-n DLHJ detector structure (used earlier on Si substrates) on 100 mm Ge substrates in the 10 μm to 11 μm LWIR spectral region, evaluate the material properties, and obtain some preliminary detector performance data. Material characterization techniques included are X-ray rocking curves, etch pit density (EPD) measurements, compositional uniformity determined from Fourier-transform infrared (FTIR) transmission, and doping concentrations determined from secondary-ion mass spectroscopy (SIMS). Detector properties include resistance-area product (RoA), spectral response, and quantum efficiency. Results of LWIR HgCdTe detectors and test structure arrays (TSA) fabricated on both Ge and silicon (Si) substrates are presented and compared. Material properties demonstrated include X-ray full-width of half-maximum (FWHM) as low as 77 arcsec, typical etch pit densities in mid 10⁶ cm⁻² and wavelength cutoff maximum/minimum variation <2% across the full wafer. Detector characteristics were found to be nearly identical for HgCdTe grown on either Ge or Si substrates.     

Reduction of Dislocation Density in HgCdTe on Si by Producing Highly Reticulated Structures

HgCdTe, because of its narrow band gap and low dark current, is the infrared detector material of choice for several military and commercial applications. CdZnTe is the substrate of choice for HgCdTe as it can be lattice matched, resulting in low-defect-density epitaxy. Being often small and not circular, layers grown on CdZnTe are difficult to process in standard semiconductor equipment. Furthermore, CdZnTe can often be very expensive. Alternative inexpensive large circular substrates, such as silicon or gallium arsenide, are needed to scale production of HgCdTe detectors. Growth of HgCdTe on these alternative substrates has its own difficulty, namely a large lattice mismatch (19% for Si and 14% for GaAs). This large mismatch results in high defect density and reduced detector performance. In this paper we discuss ways to reduce the effects of dislocations by gettering these defects to the edge of a reticulated structure. These reticulated surfaces enable stress-free regions for dislocations to glide to. In the work described herein, HgCdTe-on-Si diodes have been produced with R ₀ A ₀ of over 400 Ω cm² at 78 K and cutoff of 10.1 μm. Further, these diodes have good uniformity at 78 K at both 9.3 μm and 10.14 μm.     

Recent Progress in MBE Growth of CdTe and HgCdTe on (211)B GaAs Substrates

Alternate substrates for molecular beam epitaxy growth of HgCdTe including Si, Ge, and GaAs have been under development for more than a decade. MBE growth of HgCdTe on GaAs substrates was pioneered by Teledyne Imaging Sensors (TIS) in the 1980s. However, recent improvements in the layer crystal quality including improvements in both the CdTe buffer layer and the HgCdTe layer growth have resulted in GaAs emerging as a strong candidate for replacement of bulk CdZnTe substrates for certain infrared imaging applications. In this paper the current state of the art in CdTe and HgCdTe MBE growth on (211)B GaAs and (211) Si at TIS is reviewed. Recent improvements in the CdTe buffer layer quality (double crystal rocking curve full-width at half-maximum?≈?30?arcsec) with HgCdTe dislocation densities of ≤10⁶?cm^?2 are discussed and comparisons are made with historical HgCdTe on bulk CdZnTe and alternate substrate data at TIS. Material properties including the HgCdTe majority carrier mobility and dislocation density are presented as a function of the CdTe buffer layer quality.     

MBE growth of HgCdTe on silicon substrates for large-area infrared focal plane arrays: A review of recent progress

We review the rapid progress that has been made during the past three years in the heteroepitaxial growth of HgCdTe infrared detector device structures on Si substrates by molecular-beam epitaxy. The evolution of this technology has enabled the fabrication of high performance, large-area HgCdTe infrared focal-plane arrays on Si substrates. A key element of this heteroepitaxial approach has been development of high quality CdTe buffer layers deposited on Si(112) substrates. We review the solutions developed by several groups to address the difficulties associated with the CdTe/Si(112) heteroepitaxial system, including control of crystallographic orientation and minimization of defects such as twins and threading dislocations. The material quality of HgCdTe/Si and the performance of HgCdTe detector structures grown on CdTe/Si(112) composite substrates is reviewed. Finally, we discuss some of the challenges related to composition uniformity and defect generation encountered with scaling the MBE growth process for HgCdTe to large-area Si substrates.     

Cyclic Annealing During Metalorganic Vapor-Phase Epitaxial Growth of (211)B CdTe on (211) Si Substrates

High-quality (211)B CdTe buffer layers on Si substrates are required to enable Hg_1–x Cd _x Te growth and device fabrication on lattice-mismatched Si substrates. Metalorganic vapor-phase epitaxy (MOVPE) of (211)B CdTe on Si substrates using Ge and ZnTe interlayers has been achieved. Cyclic annealing has been used during growth of thick CdTe layers in order to improve crystal quality. The best (211)B CdTe/Si films grown in this study display a low x-ray diffraction (XRD) rocking-curve full-width at half-maximum (FWHM) of 85 arcsec and etch pit density (EPD) of 2 × 10⁶ cm⁻². These values are the best reported for MOVPE-grown (211) CdTe/Si and are comparable to those for state-of-the-art molecular beam epitaxy (MBE)-grown CdTe/Si.     

Lattice Relaxation and Dislocation Reduction in MBE CdTe(211)B/Ge(211)

We have used x-ray diffraction to assess the thickness dependence of strain in molecular-beam epitaxial (MBE) CdTe(211)/Ge(211). For 25-nm-thick layers, we find tensile stress of 100 MPa and in-plane strain of ~1.5 × 10⁻³. This stress relaxes during growth and becomes zero beyond 1 μm. We use the Dunn and Koch formula to estimate the threading dislocation density from the full-width at half-maximum of the (224) rocking curve. We then estimate the annihilation radius of MBE-grown CdTe(211)B/Ge(211) to be ~10 nm. Our layers have etch pit densities between 5 × 10⁷ cm⁻² and 5 × 10⁶ cm⁻² for a thickness of 10 μm. The lowest densities were obtained by periodic annealing epitaxy. We discuss mechanisms for the saturation of the dislocation density.     

High-Performance MWIR/LWIR Dual-Band 640 × 480 HgCdTe/Si FPAs

HgCdTe grown on large-area Si substrates allows for larger array formats and potentially reduced focal-plane array (FPA) cost compared with smaller, more expensive CdZnTe substrates. The goal of this work is to evaluate the use of HgCdTe/Si for mid-wavelength/long-wavelength infrared (MWIR/LWIR) dual-band FPAs. A series of MWIR/LWIR dual-band HgCdTe triple-layer n-P-n heterojunction (TLHJ) device structures were grown by molecular-beam epitaxy (MBE) on 100-mm (211)Si substrates. The wafers showed low macrodefect density (<300 cm⁻²) and was processed into 20-μm-unit-cell 640 × 480 detector arrays which were mated to dual-band readout integrated circuits (ROICs) to produce FPAs. The measured 80-K cutoff wavelengths were 5.5 μm for MWIR and 9.4 μm for LWIR, respectively. The FPAs exhibited high pixel operabilities in each band, with noise equivalent differential temperature (NEDT) operabilities of 99.98% for the MWIR band and 99.6% for the LWIR band demonstrated at 84 K.     

Growth and properties of Hg1-xCdxTe on GaAs,with x − 0.27

The organometallic vapor phase epitaxy of HgCdTe onto (100)2°-(110) GaAs substrates is described in this paper. A buffer layer of CdTe has been grown prior to the growth of HgCdTe, to take up the large lattice mismatch with the GaAs. Considerations for the thickness of this buffer layer are outlined, and it is shown by quantitative Secondary Ion Mass Spectroscopy that there is negligible diffusion of gallium from the GaAs substrate for the growth conditions described. Hall effect measurements give mobilities comparable to those reported for bulk grown crystals. An extrinsicn-type carrier concentration of 2 × 10¹⁶/cm³ is obtained, and is mainly due to residual impurities in the starting chemicals. The alloy composition has been determined at 298 K by Fourier transform infrared transmission (FTIR) spectrometry; this is found to be extremely uniform over a 15 × 7 mm area, as evidenced by an overlapping of FTIR plots taken over this area. HgCdTe layers have been grown on buffer layers varying in thickness from 0.1 to 1.9μm. It is found that a buffer thickness of about 1.9μm or larger is required to obtain high quality HgCdTe, both in terms of the electrical characteristics (mobility and carrier concentration) and the infrared transmission curves (peak transmission).     

High-Quality (211)B CdTe on (211)Si Substrates Using Metalorganic Vapor-Phase Epitaxy

High-quality (211)B CdTe buffer layers are required during Hg_1−x Cd _x Te heteroepitaxy on Si substrates. In this study, direct metalorganic vapor-phase epitaxy (MOVPE) of (211)B CdTe on Si, as well as CdTe on Si using intermediate Ge and ZnTe layers, has been achieved. Tertiary butyl arsine was used as a precursor to enable As surfactant action during CdTe MOVPE on Si. The grown CdTe/Si films display a best x-ray diffraction rocking-curve full-width at half-maximum of 64 arc-s and a best Everson etch pit density of 3 × 10⁵ cm⁻². These values are the best reported for MOVPE-grown (211)B CdTe/Si and match state-of-the-art material grown using molecular-beam epitaxy.     

Microstructural Characterization of CdTe Surface Passivation Layers

The microstructure of CdTe (CT) surface passivation layers deposited on HgCdTe (MCT) heterostructures has been evaluated using transmission electron microscopy (TEM). The MCT heterostructures were grown by liquid-phase epitaxy and consisted of thick (approximately 10 μm to 20 μm) n-type MCT layers and thin (approximately 1 μm to 3 μm) p-type MCT layers. The final CT (approximately 0.3 μm to 0.6 μm) capping layers were grown either by hot-wall epitaxy (HWE) or molecular-beam epitaxy (MBE). One of the wafers with the CT layer grown by MBE was also annealed in Hg atmosphere at 250°C for 96 h. The as-deposited CT passivation layers were polycrystalline and columnar. The CT grains were larger and more irregular when deposited by HWE, whereas those deposited by MBE were generally well textured with mostly vertical grain boundaries. Observations and measurements with several TEM abrupt structurally after annealing techniques showed that the CT/MCT interface became considerably more abrupt structurally after annealing, and the crystallinity of the CT layer was also improved.     

Molecular beam epitaxy grown long wavelength infrared HgCdTe on Si detector performance

The use of silicon as a substrate alternative to bulk CdZnTe for epitaxial growth of HgCdTe for infrared (IR) detector applications is attractive because of potential cost savings as a result of the large available sizes and the relatively low cost of silicon substrates. However, the potential benefits of silicon as a substrate have been difficult to realize because of the technical challenges of growing low defect density HgCdTe on silicon where the lattice mismatch is ∼19%. This is especially true for LWIR HgCdTe detectors where the performance can be limited by the high (∼5×10⁶ cm⁻²) dislocation density typically found in HgCdTe grown on silicon. We have fabricated a series of long wavelength infrared (LWIR) HgCdTe diodes and several LWIR focal plane arrays (FPAs) with HgCdTe grown on silicon substrates using MBE grown CdTe and CdSeTe buffer layers. The detector arrays were fabricated using Rockwell Scientific’s planar diode architecture. The diode and FPA and results at 78 K will be discussed in terms of the high dislocation density (∼5×10⁶ cm²) typically measured when HgCdTe is grown on silicon substrates.     

Heteroepitaxy of HgCdTe(112) infrared detector structures on Si(112) substrates by molecular-beam epitaxy

High-quality, single-crystal epitaxial films of CdTe(112)B and HgCdTe(112)B have been grown directly on Si(112) substrates without the need for GaAs interfacial layers. The CdTe and HgCdTe films have been characterized with optical microscopy, x-ray diffraction, wet chemical defect etching, and secondary ion mass spectrometry. HgCdTe/Si infrared detectors have also been fabricated and tested. The CdTe(112)B films are highly specular, twin-free, and have x-ray rocking curves as narrow as 72 arc-sec and near-surface etch pit density (EPD) of 2 × 10⁶ cm⁻² for 8 μm thick films. HgCdTe(112)B films deposited on Si substrates have x-ray rocking curve FWHM as low as 76 arc-sec and EPD of 3-22 × 10⁶ cm⁻². These MBE-grown epitaxial structures have been used to fabricate the first high-performance HgCdTe IR detectors grown directly on Si without use of an intermediate GaAs buffer layer. HgCdTe/Si infrared detectors have been fabricated with 40% quantum efficiency and R₀A = 1.64 × 10⁴ Ωm₂ (0 FOV) for devices with 7.8 μm cutoff wavelength at 78Kto demonstrate the capability of MBE for growth of large-area HgCdTe arrays on Si.     

Status of LWIR HgCdTe-on-Silicon FPA Technology

The use of silicon as an alternative substrate to bulk CdZnTe for epitaxial growth of HgCdTe for infrared detector applications is attractive because of potential cost savings as a result of the large available sizes and the relatively low cost of silicon substrates. However, the potential benefits of silicon as a substrate have been difficult to realize because of the technical challenges of growing low-defect-density HgCdTe on silicon where the lattice mismatch is ∼19%. This is especially true for long-wavelength infrared (LWIR) HgCdTe detectors where the performance can be limited by the high (∼5 × 10⁶ cm⁻²) dislocation density typically found in HgCdTe grown on silicon. The current status of LWIR (9 μm to 11 μm at 78 K) HgCdTe on silicon focal-plane arrays (FPAs) is reviewed. Recent progress is covered including improvements in noise equivalent differential temperature (NEDT) and array operability. NEDT of <25 mK and NEDT operability >99% are highlighted for 640 × 480 pixel, 20-μm-pitch FPAs.     

<Emphasis Type="Italic">Ex Situ</Emphasis> Thermal Cycle Annealing of Molecular Beam Epitaxy Grown HgCdTe/Si Layers

We present the results of ex situ thermal cycle annealing (TCA) of molecular beam epitaxy grown mercury cadmium telluride (HgCdTe) on Cd(Se)Te/Si(211) composite substrates. We examined the variation in the etch pit density (EPD) and overall crystalline quality with respect to annealing temperature, number of annealing cycles, total annealing time, pre-annealed EPD/crystal quality, buffer layer quality, and buffer layer lattice constant. Using TCA we observed an order of magnitude reduction in the dislocation density of the HgCdTe layers and a corresponding decrease in x-ray full width at half maximum, when the as-grown layer EPD was on the order of 1 × 10⁷ cm⁻². Among all the parameters studied, the one with the greatest influence on reducing EPD was the number of annealing cycles. We also noticed a saturation point where the HgCdTe/Si EPD did not decrease below ∼1 × 10⁶ cm⁻², regardless of further TCA treatment or the as-grown EPD value.