A model-based clustering approach to the recognition of the spatial defect patterns produced during semiconductor fabrication

Defects on semiconductor wafers tend to cluster and the spatial defect patterns of these defect clusters contain valuable information about potential problems in the manufacturing processes. This study proposes a model-based clustering algorithm for automatic spatial defect recognition on semiconductor wafers. A mixture model is proposed to model the distributions of defects on wafer surfaces. The proposed algorithm can find the number of defect clusters and identify the pattern of each cluster automatically. It is capable of detecting defect clusters with linear patterns, curvilinear patterns and ellipsoidal patterns. Promising results have been obtained from simulation studies.     

The effect of a space charge on the operation of a high-power semiconductor current interrupter

A theoretical model has been developed that describes operation of a high-power semiconductor current interrupter (SOS diode) with allowance for the space charge formation. According to this model, as well as to the models based on the quasineutral approximation, the process of current breakage in a semiconductor structure of the SOS diode is related to the formation of strong field regions in highly doped parts of the structure. The space charge decreases the role of avalanche multiplication, thus providing for higher switching characteristics of the diode.     

Improved customer satisfaction with a hybrid dispatching rule in semiconductor back-end factories

On-time delivery is a vital factor for customer satisfaction in the competitive semiconductor manufacturing industry, and to optimize on-time delivery manufacturers must continuously improve their management of work-in-progress (WIP). However, in undertaking to optimize WIP, managers are also concerned with short cycle times, high throughput, and high utilization. In an attempt to find the most satisfactory solution to these potentially conflicting requirements with regard to WIP, the present study employs fuzzy analytic hierarchy process (AHP) to determine an appropriate set of acceptable WIP deviation levels (AWDLs). These AWDLs are then used in a proposed hybrid dispatching rule to determine the operational priorities of jobs. A simulation model using real-world data is then constructed to examine the proposed mechanism for improving customer satisfaction. The findings of the study confirm that the proposed mechanism is capable of simultaneous consideration of various goals and the achievement of enhanced performances with respect to due-date delivery from semiconductor back-end processes.     

Using an optimized queueing network model to support wafer fab design

We develop an Optimized Queueing Network (OQNet) capacity planning tool for supporting the design of new and reconfigured semiconductor fabrication facilities that makes use of queueing network approximations and an optimization routine. The basic problem addressed by this tool is to minimize the facility cost required to meet specified volume and cycle time targets. Features common to semiconductor environments, such as batch processes, re-entrant flows, multiple product classes, and machine setups, are incorporated into the model. Comparisons with simulation show that the queueing and other approximations are reasonably accurate. Tests of the optimization routine demonstrate that it can find good solutions quickly.     

Development of a real-time multi-objective scheduler for a semiconductor fabrication system

Semiconductor wafer fabrication involves possibly one of the most complex manufacturing processes ever used. This causes a number of decision problems. A successful system control strategy would assign appropriate decision rules for decision variables. Therefore, the goal of this study is to develop a scheduler for the selection of decision rules for decision variables in order to obtain the desired performance measures given by a user at the end of a certain production interval. In this proposed methodology, a system control strategy based on a simulation technique and a competitive neural network is suggested. A simulation experiment was conducted to collect the data containing the relationship between the change of decision rule set and current system status and the performance measures in the dynamic nature of semiconductor manufacturing fabrication. Then, a competitive neural network was applied to obtain the scheduling knowledge from the collected data. The results of the study indicate that applying this methodology to obtaining a control strategy is an effective method considering the complexity of semiconductor wafer fabrication systems.     

面向半导体制造业的统计过程分析与控制

传统的统计过程控制方法不能完全适应半导体制造业生产形式需要。本文在分析半导体光电封装制造模式的特点和实施过程控制所面临的问题的基础上,提出一种基于聚类分析的统计质量控制方法。通过实证分析,证实了该方法的可操作性并取得了良好的实际效果。     

General run-to-run (R2R) control framework using self-tuning control for multiple-input multiple-output (MIMO) processes

During recent years, run-to-run (R2R) control techniques have been developed and used to control various semiconductor manufacturing processes. The R2R control methodology combines response surface modelling, engineering process control, and statistical process control. The main objective of such control is to manipulate the recipe to maintain the process output of each run as close to the nominal target as possible. The primary focus of this research is on the multiple-input multiple-output self-tuning control of R2R processes. A general control scheme is presented that can compensate for a variety of noise disturbances frequently encountered in semiconductor manufacturing. The controller can also compensate for various system dynamics, including autocorrelated responses, deterministic drifts, and varying process gains and offsets. Self-tuning controllers are developed to provide on-line parameter estimation and control. A recursive least squares algorithm is normally used to provide on-line parameter estimation to the controller. This type of control strategy used in the proposed self-tuning controller applies the principle of minimizing total cost (in the form of an expected off-target and controllable factors adjustment) to obtain a recipe for the next run. It is shown through the simulation study that even if the control model is non-linear, the self-tuning controller offers satisfactory control performance for R2R applications as compared with those of the control actions provided by the optimizing adaptive quality controller module. At last, a relevant application to chemical mechanical planarization in semiconductor manufacturing, a critical fabrication step involving two quality characteristics (removal rate and within-wafer non-uniformity), is used to illustrate the proposed controller. In this case study, a multivariate statistical process control technique via the Hotelling T?² statistic is also used as a dead-band for further investigation.     

A framework for determining MIMO process parameters by a neuro-DM&ACO approach

A framework combining artificial neural network (ANN) modelling technique, data mining and ant colony optimisation (ACO) algorithm is proposed for determining multiple-input multiple-output (MIMO) process parameters from the initial chemical-mechanical planarisation (CMP) processes used in semiconductor manufacturing. Owing to the invisibility of the ANN in the solution procedures, the decision tree approach of data mining is adopted to provide the necessary information for a real-valued ACO. The simulation result demonstrates that the proposed method can be an efficient tool for selecting properly defined parameter combination with the CMP process.     

Virtual welding equipment for simulation of GMAW processes with integration of power source regulation

A two dimensional transient numerical analysis and computational module for simulation of electrical and thermal characteristics during electrode melting and metal transfer involved in Gas-Metal-Arc-Welding (GMAW) processes is presented. Solution of non-linear transient heat transfer equation is carried out using a control volume finite difference technique. The computational module also includes controlling and regulation algorithms of industrial welding power sources. The simulation results are the current and voltage waveforms, mean voltage drops at different parts of circuit, total electric power, cathode, anode and arc powers and arc length. We describe application of the model for normal process (constant voltage) and for pulsed processes with U/I and I/I-modulation modes. The comparisons with experimental waveforms of current and voltage show that the model predicts current, voltage and electric power with a high accuracy. The model is used in simulation package SimWeld for calculation of heat flux into the work-piece and the weld seam formation. From the calculated heat flux and weld pool sizes, an equivalent volumetric heat source according to Goldak model, can be generated. The method was implemented and investigated with the simulation software SimWeld developed by the ISF at RWTH Aachen University.     

半导体微腔激光器瞬态特性的分析

建立了反映半导体微腔激光器特性的模型,借助计算机手段,运用Matlab软件直接给出了半导体微腔激光器瞬态响应的仿真结果及载流子密度和光子密度的相图,分析了自发辐射因子、注入电流和腔长对微腔器的激射阈值、延迟时间、驰豫振荡频率和光输出等参量的影响。该模型及有关结合为半导体微胶激光器的工艺制作,改善的高频调制特性和优化器件提供了理论依据。     

Peridynamic Simulation of Electromigration

A theoretical framework, based upon the peridynamic model, is presented for analytical and computational simulation of electromigration. The framework allows four coupled physical processes to be modeled simultaneously: mechanical deformation, heat transfer, electrical potential distribution, and vacancy diffusion. The dynamics of void and crack formation, and hillock and whisker growth can potentially be modeled. The framework can potentially be applied at several modeling scales: atomistic, crystallite, multiple crystallite, and macro. The conceptual simplicity of the model promises to permit many phenomena observed in microchips, including electromigration, thermo-mechanical crack formation, and fatigue crack formation, to be analyzed in a systematic and unified manner. Interfacial behavior between dissimilar crystallites and materials can also be handled in a natural way. A computational implementation of the theoretical framework is proposed, and a one-dimensional example is presented.     

Level set approach for the simulation of focused ion beam processing on the micro/nano scale

The level set method, introduced by Osher and Sethian (1988 J. Comput. Phys. 79 12-49), has recently become popular in the simulation of etching, deposition and photolithography processes in semiconductor manufacturing, as it is a highly robust and accurate computational technique for tracking moving interfaces. In this paper, the level set approach is applied to focused ion beam fabrication, allowing for the first time the simulation of targets with sub-regions that change their connectivity during processing. It is implemented in the code AMADEUS-level set (advanced modelling and design environment for sputter processes), which is capable of simulating surface topography changes in two dimensions taking re-deposition fluxes into account. We present two examples of comparisons between simulation and experiment that demonstrate the predictive capability of the code.     

Neuro-space mapping technique for semiconductor device modeling

This paper presents an application of the space mapping concept in the modeling of semiconductor devices. A recently proposed device modeling technique, called neuro-space mapping (Neuro-SM), is described to meet the constant need of new device models due to rapid progress in the semiconductor technology. Neuro-SM is a systematic method allowing us to exceed the present capabilities of the existing device models. It uses a neural network to map the voltage and current signals between an existing device model (coarse model) and the actual device behavior (fine model), such that the mapped model becomes an accurate representation of the new device. An efficient training method based on analytical sensitivity analysis for such mapping neural network is also addressed. The trained Neuro-SM model can retain the speed of the existing device model while improving the model accuracy. The benefit of the Neuro-SM method is demonstrated by examples of SiGe HBT and GaAs MESFET modeling and use of the models in harmonic balance simulation.     

Modelling and simulation of automated manufacturing systems for evaluation of complex schedules

Automated manufacturing systems have been studied widely in terms of scheduling. As technology evolves, the behaviour of tools in automated manufacturing systems has become complicated. Therefore, mathematical approaches to the analysis of complex schedules no longer reflect reality. In this paper, we propose a systematic way of conducting simulation experiments to evaluate the complex operating schedules of automated manufacturing systems. A simulation model is based on a timed Petri net to take advantage of its mathematical strength. Since a Petri net cannot itself have token firing rules, we introduce additional states called operational states. Operational states are not directly related to a Petri net, and are only used for decision making. In addition, a decision function that is responsible for the conflict resolution of a Petri net model and an operational state transition function are introduced. The parallel simulation concept is also suggested by dividing a Petri net into several independent decision sub-nets. A multi-cluster tool system for semiconductor manufacturing is analysed as an application.     

Future challenges in CMOS process modeling

Development and optimization of electronic devices in industrial and academic environments would hardly be conceivable without the numerical simulation of their processing and electronic behavior. In the past, model development efforts aimed especially at predicting junction depths. With the paradigm shift towards ultra-thin body silicon-on-insulator devices and FinFET architectures, the main emphasis changed to activation and lateral diffusion. Based on simulations of the electrical behavior of such advanced devices, the requirements on simulation of doping profiles will be explained. To achieve the high dopant activation needed to reduce contact and channel access resistances, active concentrations if possible above solid solubility are required. The concepts pursued involve annealing with low thermal budgets as well as defect engineering. A further paradigm shift concerns the semiconductor material used for future devices. While silicon, especially in a strained state, is still in the lead, research is also looking for alternative materials like germanium, germanium-rich silicon-germanium alloys, and III-V compounds. In order to be helpful, models for such processes and materials have to be provided as soon as possible even if the complexity of models for alternative materials lags behind contemporary models for silicon. The personal view of the authors is guided also by the International Technology Roadmap for Semiconductors for which one of us coordinates the modeling and simulation chapter.     

Aberration evaluation of alignment optics in lithographic tools by use of a step-height structure highly sensitive to the asymmetry of an optical image

To satisfy the increasing demand for extremely tight overlay accuracy in semiconductor manufacturing processes, all the measurement error factors in alignment systems and overlay measurement tools need be identified and eliminated. The principle of most alignment systems is based on image processing of target marks on the wafer under bright-field illumination. Although the phenomenon that the sensitivity to the alignment error varies with the step height (SH) of the mark has been known and used for evaluating the performance of the alignment optics, no investigation has been made into the origin and the physical mechanism of the phenomenon. We propose a simplified optical model that can account for the origin of the asymmetric image and clarify its relation to the SHs. The model is validated with simulation and experimental results. The improved performance of an alignment system using marks with optimally designed SHs is demonstrated.     

Rejoinder

A closed-loop identification procedure for pure gain-plus noise processes is presented for a family of disturbances that model drift in a discrete-part manufacturing system. Tuning techniques for the identified disturbance are provided for proportional integral (PI)controllers. These include the particular case of exponentially weighted moving average controllers, popular in semiconductor manufacturing. Expressions are derived for the mean squared deviation of the quality characteristic and for the variance of the adjustments. An optimization model is presented that balances adjustment variance with output variance. The optimal trade-off solution for a constrained PI controller is shown to depend on the assumption of no drift.     

Soft error modeling and analysis of the Neutron Intercepting Silicon Chip (NISC)

Soft errors are transient errors caused due to excess charge carriers induced primarily by external radiations in the semiconductor devices. Soft error phenomena could be used to detect thermal neutrons with a neutron monitoring/detection system by enhancing soft error occurrences in the memory devices. This way, one can convert all semiconductor memory devices into neutron detection systems. Such a device is being developed at The Pennsylvania State University and named Neutron Intercepting Silicon Chip (NISC). The NISC is envisioning a miniature, power efficient, and active/passive operation neutron sensor/detector system. NISC aims to achieve this goal by introducing ¹⁰B-enriched Borophosphosilicate Glass (BPSG) insulation layers in the semiconductor memories. In order to model and analyze the NISC, an analysis tool using Geant4 as the transport and tracking engine is developed for the simulation of the charged particle interactions in the semiconductor memory model, named NISC Soft Error Analysis Tool (NISCSAT). A simple model with ¹⁰B-enriched layer on top of the lumped silicon region is developed in order to represent the semiconductor memory node. Soft error probability calculations were performed via the NISCSAT with both single node and array configurations to investigate device scaling by using different node dimensions in the model. Mono-energetic, mono-directional thermal and fast neutrons are used as the neutron sources. Soft error contribution due to the BPSG layer is also investigated with different ¹⁰B contents and the results are presented in this paper.     

On-line tuning system of multivariate dEWMA control based on a neural network approach

The double exponentially weighted moving average (EWMA) controller is a popular algorithm for on-line quality control of semiconductor manufacturing processes. The performance of the closed-loop system hinges on the adequacy of the two weight parameters of the double EWMA equations. In 2004, Su and Hsu presented an approach based on the neural technique for ‘on-line’ tuning the weight of the single EWMA equation in the single-input single-output (SISO) system. The present paper extends the neural network on-line tuning scheme to the double EWMA controller for the non-squared multiple-input multiple-output (MIMO) system, and validates the control performance by means of a simulated chemical–mechanical planarization (CMP) process in semiconductor manufacturing. Both linear and non-linear equipment models are considered to evaluate the proposed controller, coupling with the deterministic drift, the Gaussian noise and the first-order integrated moving average (IMA) disturbance. It has been shown from a variety of simulation studies that the proposed method exhibits quite competitive control performance as compared with the previous control system. The other merit of the proposed approach is that the tuning system, if sufficient training in a neural network is available, can be practicably applied to complex semiconductor processes without undue difficulty.     

Simulation study on discrete charge effects of SiNW biosensors according to bound target position using a 3D TCAD simulator

We introduce a simulation method for the biosensor environment which treats the semiconductor and the electrolyte region together, using the well-established semiconductor 3D TCAD simulator tool. Using this simulation method, we conduct electrostatic simulations of SiNW biosensors with a more realistic target charge model where the target is described as a charged cube, randomly located across the nanowire surface, and analyze the Coulomb effect on the SiNW FET according to the position and distribution of the target charges. The simulation results show the considerable variation in the SiNW current according to the bound target positions, and also the dependence of conductance modulation on the polarity of target charges. This simulation method and the results can be utilized for analysis of the properties and behavior of the biosensor device, such as the sensing limit or the sensing resolution.