CDMA2000 1x EV-DV中具有功率控制的H-ARQ

在CDMA2000 1x EV DV中新应用的混合自动重传请求(Hybrid Automatic Repeat Request,H ARQ)技术在本质上与快速功率控制非常相似,二者都用于减小对其他用户的干扰。为了平衡H ARQ增益和分组时延,H ARQ定义了4种操作模式:正常模式(normal mode)、简约模式(reduction mode)、增强模式(boost mode)和增强简约模式(boost re-duction mode)。4种模式的定义是根据H ARQ操作中信道增益的设置方式来定义的。仿真的结果表明简约模式在分组差错率(Packet Error Rate,PER)和分组时延两个方面都有较好的性能。增强模式比非增强模式有更低的PER和分组时延,但是其代价是需要更多的能量。     

160 Gb/s variable length packet/10 Gb/s-label all-optical label switching with wavelength conversion and unicast/multicast operation

We report on the first demonstration of all-optical label switching (AOLS) with 160 Gb/s variable length packets and 10 Gb/s optical labels. This result demonstrates the transparency of AOLS techniques from previously demonstrated 2.5 Gb/s to this 160 Gb/s demonstration using a common routing and packet lookup framework. Packet forwarding/conversion, optical label erasure/re-write and signal regeneration at 160 Gb/s is achieved using a WDM Raman enhanced all-optical fiber cross-phase modulation wavelength converter. It is also experimentally shown that this technique enables packet unicast and multicast operation at 160 Gb/s. The packet bit-error-rate is measured for all optical label switched 16 /spl times/ 10 Gb/s channels and error free operation is demonstrated after both label swapping and packet forwarding.     

Hybrid ARQ with Cross-Packet Channel Coding

We describe hybrid automatic repeat request/forward error correction (H-ARQ) with cross-packet channel coding which extends current H-ARQ schemes for point-to-point communications. In contrast to current H-ARQ schemes, the transmission of two consecutive packets of information bits is considered jointly. If a retransmission for the first packet is necessary, we encode the first and a second packet jointly. For fading channels, this allows diversity gain from retransmissions without decreasing the total code rate. We describe an encoder and a decoder which can be decoded iteratively for a system with H-ARQ with cross-packet channel coding     

A Soft Combining Hybrid-ARQ Technique Applied to Throughput Maximization Within 3G Satellite IP Networks

This paper deals with the application of Hybrid-Automatic-Repeat-reQuest (H-ARQ) techniques to reliable end-to-end data communications in satellite networks, whose applications have to cope with accurate Quality-of-Service (QoS) requirements. Particularly, we face this problem by introducing a modified H-ARQ scheme based on the use of the turbo codes' error-correction capabilities. According to our scheme, each packet is turbo coded, and packet retransmissions are lowered by keeping track of previous erroneous packet-decoding results. Moreover, two kinds of these techniques are proposed and applied, respectively, to consecutive received packet replicas or to decoding algorithm outputs. The benefits achieved through this approach have a positive effect both on the error-recovery strategies and, above all, on the congestion-control protocols, since they rely on a retransmission scheme. By means of analytical derivations carried out under the assumption of a wideband-code-division multiple-access communications, it has been possible to highlight noticeable performance improvements in terms of bit- and frame-error rates and link throughput. Computer simulations performed focusing on a typical satellite-universal-mobile-telecommunication-system environment validate analytical predictions and point out a remarkable gain without requiring a significant hardware-complexity increase. As a result, it has been possible to allow active users a better QoS, in terms of error rate, throughput, and delivery delay, or to increase access-network capacity, besides avoiding transmitted-power wasting     

分组协同中继系统性能研究以及分组长度性能影响分析

针对AF(amplify-and-forward)和DF(decode-and-forward)2种转发模式,分析了分组协同中继通信系统在高信噪比下的误帧率性能,并研究了帧长对误帧率的影响。研究表明,以误帧率为准则,AF和DF模式都取得了相同的分集增益,但是编码增益不一样,并且编码增益与帧长有关。与现有的研究结论不一样,考虑到实际的分组长度,DF总是能够获得较AF更好的性能,帧越短DF的优势越明显;当帧长足够大时AF能够获得和DF相近的性能。还研究了最优的中继位置,对于AF系统,最优的中继位置总是位于源和目的节点中点处;而对于DF系统,当帧长增大时最优的中继位置将从靠近源处逐渐移至中点处。     

I/SUP 2/L with a self-aligned double-diffused injector

Reports the structure topology, and characterization of integrated injection logic (I/SUP 2/L/MTL) with a self-aligned double-diffused injector. It is shown that using the new structure, a lateral p-n-p transistor with effective submicron base width can be realized even by using standard photolithographic techniques. One of the features of the approach is the high injection efficiency. Another feature is the high current gain capability for n-p-n transistors. A power delay product of 0.06 pJ, a propagation delay time of 10 ns at the power dissipation of 80 /spl mu/W, and a packing density of 420 gates/mm/SUP 2/ have been obtained by single layer interconnections of 6 /spl mu/m details. A J-K flip-flop with clear and preset terminals has been fabricated to demonstrate the superiority of S/SUP 2/L to conventional I/SUP 2/L.     

On the design of high-performance wide-band continuous-time sigma-delta converters using numerical optimization

Continuous-time (CT) sigma-delta (/spl Sigma//spl Delta/) modulators are growing increasingly popular in wide-band analog-digital conversion. High orders of quantization noise shaping, and multibit quantizers, are used to compensate for the low oversampling ratios in wide-band applications. These, however, add circuit complexities and excess loop delay that are detrimental to the /spl Sigma//spl Delta/ control loop. This paper presents an exact mathematical analysis technique, based on the CT-discrete time equivalence, that can take these effects into account. A design-by-optimization approach based on that analysis is used to compensate for these effects, avoid intractability issues and to gain flexibility in the design. It is also shown that it is advantageous not to fix the position of the quantization noise-shaping zeros in the signal band.     

HSDPA中的H-ARQ技术分析

HSDPA（High Speed Downlink Packet Access）即高速下行分组接入技术是3G中的一项重要技术。它作为一种无线增强技术极大的提高了系统的下行数率，而且同时适用于WCDMA和TD—SCDMA系统。HSDPA中引入了自适应调制和编码技术（AMC）、混合自动请求重发（H—ARQ）、快速小区选择（FCSS）、MIMO技术等关键技术。主要研究其中的H—ARQ（Hybrid Automatic Repeat reQuest）技术。首先介绍H—ARQ的起源及三种不同类型H—ARQ的特点，其次研究了H—ARQ在HSDPA中的应用，最后对不同H—ARQ方案的性能进行了分析。     

Limitation of DC currents by YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta//-Au superconducting films

The limitation of dc fault currents is one of the issues for the development of dc networks or links. This paper shows for the first time the high potential of YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta//-Au bilayers for the design of dc current limiters. Such devices are based on the transition into the normal state of the superconducting YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// films above a current I/sup */>I/sub c/, where I/sub c/ is the critical current at the onset of dissipation. The study of the transition under current pulses shows that a thermally driven transition into the normal state can occur after a delay t/sub trans/. This duration is defined by the amplitude of the current pulse. For I/sup *//spl ap/3I/sub c/, this delay is less than 10 /spl mu/s. The abrupt transition into the normal state allows an efficient current limitation. A recovery of the superconducting state can also occur under current. This property can be extremely interesting for autonomous operation of a current limiter in an electrical network in case of transient over-currents coming from the starting of high-power devices.     

Lasing characteristics of GaInAsP-InP strained quantum-well microdisk injection lasers with diameter of 2-10 /spl mu/m

We have obtained pulsed lasing operation in 2-5-/spl mu/m diameter microdisk injection lasers using GaInAsP-InP compressively-strained multiple-quantum-well (MQW) wafers around room temperature. The effective cavity volume of the 2-/spl mu/m-diameter device is the smallest among those for any type of electrically-pumped lasers. The threshold current of this device was as low as 0.2 mA. Cavity modes in emission spectra observed under CW conditions coincide well with theoretically predicted whispering gallery modes. Further reduction of diameter to less than 1.5 /spl mu/m will realize the condition for spontaneous emission almost coupling into a single mode, which results in thresholdless lasing operation.     

All-optical packet compression of variable length packets from 40 to 1500 B using a gated fiber loop

A scalable loop-based packet compression scheme capable of handling variable length Internet protocol packets, from 40 to 1500 B, is proposed and demonstrated. The technique uses per packet variable compression ratio to achieve fixed compressed output packet size independent of input packet size. This technique allows variable length packets to be stored in fixed delay optical buffers and has application to optical packet switching, optical multiplexing, and optical grooming. These results demonstrate the largest packet size compressed to date. Error-free compression and verification of 1500-B packets compression from 2.5 to 10 Gb/s is demonstrated with a measured power penalty of /spl sim/2.2 dB.     

OFDMA-CDM performance enhancement by combining H-ARQ and interference cancellation

In this paper, superimposed packet allocation for orthogonal frequency-division multiple-access code-division multiplexing (OFDMA-CDM) is presented, where each transmitted packet is associated with one spreading code. An iterative algorithm which is a combination of parallel interference cancellation and hybrid automatic repeat request (H-ARQ) based on soft value combining (SVC) is proposed, and its performance is studied and compared with other existing H-ARQ schemes. The proposed algorithm exploits the reliability information of erroneously received copies of the same data packet to improve the performance of interference cancellation. The interference of correctly received packets is ideally reconstructed and subtracted. Thus, the overall system performance improves iteratively. As a result, the proposed algorithm outperforms conventional H-ARQ based on SVC, as well as H-ARQ based on maximum ratio combining.     

Gain and offset mismatch calibration in time-interleaved multipath A/D sigma-delta modulators

We propose a digital background adaptive calibration technique for correcting offset and gain mismatches in time-interleaved multipath analog-digital (A/D) sigma-delta (/spl Sigma//spl Delta/) modulators. The proposed technique allows us to cancel the spurious tones introduced by offset and gain mismatches among the paths only by processing the digital output, without interfering with the operation of the modulator. This solution is also effective for any other time-interleaved A/D converter topology. Simulation results on a high-performance four-path bandpass /spl Sigma//spl Delta/ modulator, operating on a 5-MHz band at a clock frequency of 320 MHz, demonstrate the effectiveness of the proposed calibration technique, which allows us to achieve significant improvements of the signal-to-noise ratio and the spurious-free dynamic range in the presence of mismatches.     

Doping-type dependence of turn-on delay time in 1.3-/spl mu/m InGaAsP-InP modulation-doped strained quantum-well lasers

The dependence of turn-on delay time on doping type in 1.3-/spl mu/m InGaAsP-InP modulation-doped (MD) strained quantum-well (QW) lasers is theoretically investigated, based on the detailed band structure model including the band mixing effects. It is found that the turn-on delay time in n-type MD lasers is reduced to 1/4 that of undoped lasers due to both a lower threshold current and a reduced carrier lifetime. The reduction of the delay time is smaller in p-type MD lasers, however, because of the increased threshold current. These results show that the n-type MD-QW lasers are superior for high-speed modulation under zero-bias conditions.     

A low-voltage folded-switching mixer in 0.18-/spl mu/m CMOS

Scaling of CMOS technologies has a great impact on analog design. The most severe consequence is the reduction of the voltage supply. In this paper, a low voltage, low power, AC-coupled folded-switching mixer with current-reuse is presented. The main advantages of the introduced mixer topology are: high voltage gain, moderate noise figure, moderate linearity, and operation at low supply voltages. Insight into the mixer operation is given by analyzing voltage gain, noise figure (NF), linearity (IIP3), and DC stability. The mixer is designed and implemented in 0.18-/spl mu/m CMOS technology with metal-insulator-metal (MIM) capacitors as an option. The active chip area is 160 /spl mu/m/spl times/200 /spl mu/m. At 2.4 GHz a single side band (SSB) noise figure of 13.9 dB, a voltage gain of 11.9 dB and an IIP3 of -3 dBm are measured at a supply voltage of 1 V and with a power consumption of only 3.2 mW. At a supply voltage of 1.8 V, an SSB noise figure of 12.9 dB, a voltage gain of 16 dB and an IIP3 of 1 dBm are measured at a power consumption of 8.1 mW.     

A 3-mW 74-dB SNR 2-MHz continuous-time delta-sigma ADC with a tracking ADC quantizer in 0.13-/spl mu/m CMOS

A third-order continuous-time multibit (4 bit) /spl Delta//spl Sigma/ ADC for wireless applications is implemented in a 0.13-/spl mu/m CMOS process. It is shown that the power consumption can be considerably reduced by using a tracking ADC composed of three comparators with interpolation instead of using a 4-bit flash quantizer. Moreover, the usage of a tracking ADC opens the door to a new forward-looking dynamic element matching (DEM) technique, which helps to reduce the loop delay time and consequently improves the loop stability. The SNR is 74 dB over a bandwidth of 2 MHz. The ADC consumes 3 mW from a 1.5-V supply when clocked at 104 MHz. The active area is 0.3 mm/sup 2/.     

A new single-chip C/SUP 2/MOS A/D converter for microprocessor systems-Penta-Phase Integrating C/SUP 2/MOS A/D converter

A new unique conversion technique named the `Penta-Phase Integration' method, applied to a single-chip C/SUP 2/MOS 12-bit analog-to-digital converter designed for microprocessor system, is introduced and described. The newly developed device, fabricated with a standard metal gate CMOS process including an 8-channel multiplexer and TTL compatibility, has several features: unipolar- and ratiometric-conversion can be performed; conversion accuracy within /spl plusmn/0.05 percent of full scale over the -35/spl deg/C-+85/spl deg/C temperature range can be obtained; conversion time is 1.1 ms at a 20 MHz clock frequency, and the device can be operated with a single 5 V power supply and 6 mW power consumption at a 4 MHz clock frequency. The new technique essentially incorporated several methods which divide one conversion cycle into five-phases, accomplish minimization of the error caused by comparator response delay, provide several narrow flat phases to eliminate switching errors due to parasitic capacitance, and enable high clock frequency operation in digital circuits by utilizing C/SUP 2/MOS circuit technology and a synchronized configuration for counters.     

A cross-layer optimized adaptive modulation and coding scheme for transmission of streaming media over wireless links

In this paper, a novel cross-layer Adaptive Modulation and Coding scheme that optimizes the overall packet loss (by both transmission errors and excessive delays) probability under a given arrival process is developed. To this end, an improved Large Deviations approximation for the fraction of packets that suffer from excessive queuing delay is proposed. This approximation is valid for G/G/1 queues with infinite buffers that are driven by stationary arrival and service processes which satisfy certain conditions. Such models can capture the time correlations in the amount of traffic generated by streaming media sources and the time varying service capacity of a wireless link. Through numerical examples, the proposed AMC policy is shown to achieve a significant reduction in the overall packet loss rate compared to previously proposed schemes. This algorithmic performance gain can be translated into a sizeable decrease in the required transmit power or an analogous increase in the rate of the arrival process, subject to a given maximum packet loss rate Quality of Service constraint. Furthermore, the proposed AMC policy can be combined with ARQ in order to achieve an even lower overall packet loss probability.     

Performance comparison of a slotted ALOHA DS/SSMA network and amultichannel narrow-band slotted ALOHA network

Throughput, delay, and stability for two slotted ALOHA packet radio systems are compared. One system is a slotted direct-sequence spread-spectrum multiple-access (DS/SSMA) network where each user employs a newly chosen random signature sequence for each bit in a transmitted packet. The other system is a multiple-channel slotted narrow-band ALOHA network where each packet is transmitted over a randomly selected channel. Accurate packet success probabilities for the code-division multiple-access (CDMA) system are computed using an improved Gaussian approximation technique which accounts for bit-to-bit error dependencies. Average throughput and delay results are obtained for the multiple-channel slotted ALOHA system and CDMA systems with block error correction. The first exit time (FET) is computed for both systems and used as a measure of the network stability. The CDMA system is shown to have better performance than the multiple-channel ALOHA system in all three areas     

A rail-to-rail amplifier input stage with /spl plusmn/0.35%g/sub m/ fluctuation

A new scheme for achieving rail-to-rail input to an amplifier is introduced. Constant g/sub m/ is obtained by using tunable level shifters and a single differential pair. Feedback circuitry controls the level shifters in a manner that fixes the common-mode input of the differential pair, resulting in consistent and stable operation for rail-to-rail inputs. As the new technique avoids using complimentary input differential pairs, this method overcomes problems such as common-mode rejection ratio and gain-bandwidth product degradation that exist in many other designs. The circuit was fabricated in 0.5-/spl mu/m process. The resulting differential pair had a constant transconductance that varied by only /spl plusmn/0.35% for rail-to-rail input common-mode levels. The input common-mode range extended well past the supply levels of /spl plusmn/1.5V, resulting in only /spl plusmn/1% fluctuation in g/sub m/ for input common modes from -2 to 2 V.