Turn-On Principles of the MOS-GTO

MOS-GTO's (GTO thyristors which are turned off by the action of a MOS-gate) represent a new generation of controllable thyristors offering considerable advantages in turn-off behavior as compared to conventional GTO's. However, MOS-GTO's generally require one control electrode for turn-on and another control electrode for turn-off, which might be regarded as a disadvantage. It is shown that in MOS-GTO's with a p-channel cathode structure it is possible to turn the thyristor on and off by controlling just one MOS gate electrode. As a triggering current for turn-on, the MOS capacitor charging current is used.     

A 30 V Self-Aligned Metal/Poly-Si Replacement Gate Planar DMOS for DC/DC Converters

In this letter, a novel self-aligned metal/poly-Si gate planar double-diffused MOS (DMOS) is proposed and demonstrated for high-switching-speed and high-efficiency dc/dc converter applications. The self-aligned metal/poly-Si gate is realized by a replacement gate technology. The fabricated metal/poly-Si gate planar DMOS has a breakdown voltage of 36 V and a threshold voltage of 2.1 V. The gate sheet resistance of the metal/poly-Si gate is around 0.2 Omega/square, which is 50 times lower than that of the polysilicon gate. The low sheet resistance reduces the switching time as well as the power loss of the device during switching. For a device with a drain current of 69 A/cm², the turn-on and turn-off times are reduced from 29 to 25 ns and from 36 to 31 ns, respectively. The turn-on and turn-off switching energy losses are reduced by 22% and 15%, respectively     

Characteristics of bilateral MOS-controlled thyristors (BMCT)

The operation of the continuous-gate-control BMCT and the interrupted-gate-control BMCT is described and compared. Particular attention is focused on the analysis of the turn-on and turn-off characteristics. The result provides useful guidelines for designing these devices. Parameters such as the minimum MOS gate voltages required for turn-on and turn-off and the maximum controllable current are analytically derived and experimentally verified. Switching tests using fabricated devices indicate that BMCT is capable of handling current exceeding 800 A/cm² with a turn-off time less than 1 μs for discrete devices     

Insulated Gate P-I-N Transistor-a new MOS controlled switchingpower device

In this paper, a new monolithic MOS controlled power transistor structure called the Insulated Gate P-I-N Transistor (IGPT) is described for the first time and its operation is verified by two-dimensional numerical simulation. IGPT achieves an on-state voltage drop similar to that of a PIN diode, yet also provides insulated gate turn-off capability up to several thousand amperes per centimeter square. The turn-off of the IGPT is achieved by the MOS depletion of a high level injection region, verified also for the first time. IGPT is therefore a very attractive device to be used in high power switching applications because it is superior to current generation power devices such as the Insulated Gate Bipolar Transistor (IGBT) and MOS Controlled Thyristor (MCT)     

Dual MOS gate controlled thyristor (DMGCT) structure withshort-circuit withstand capability superior to IGBT

A dual MOS gate controlled thyristor (DMGCT) structure is analyzed with experimental data and shown to have superior performance over insulated-gate bipolar transistor (IGBT) for power switching applications. The DMGCT device structure consists of a thyristor structure with the thyristor current constrained to flow via the channel region of a MOSFET. Although this increases the on-state voltage drop in the thyristor current path by a small amount due to the voltage drop across the low-voltage series MOSFET, this structure allows control of the thyristor current by the gate voltage applied to the MOSFET even after latch-up of the thyristor. This configuration allows uniform turn-off in the device with no current crowding. The DMGCT does not have any parasitic thyristor structure. In contrast to the IGBT, the saturation current of the DMGCT can be controlled independently of the on-state voltage drop     

Theoretical and experimental characteristics of the base resistancecontrolled thyristor (BRT)

Described are the characteristics of a new MOS gated thyristor structure called the base resistance controlled thyristor (BRT), in which the turn-off of a thyristor built with an N drift region is achieved by reducing the resistance of the p-base region under MOS gate control. A p-channel MOSFET used to achieve turn-off is formed in the N drift region. The device is designed so that, when the p-channel MOSFET is switched on, holes are diverted from the p-base region of the thyristor into the adjacent p⁺ region, raising the holding current of the thyristor above the operating current level, and turning off the thyristor. Results of extensive 2-D numerical simulations that have been performed to demonstrate operation of this new device concept are discussed. Experimental results on 600-V devices fabricated with an IGBT process have corroborated theoretical predictions. Current densities above 900 A/cm² have been turned off at room temperature with a gate bias of -10 V     

Comparison of 300-, 600-, and 1200-V n-channel insulated gate transistors

The performance of insulated gate transistors with 300-, 600-, and 1200-V ratings were experimentally investigated. A comparison of several device characteristics, such as forward conduction, forward drop versus turn-off time tradeoff, and the dependence of turn-off time and leakage current upon electron irradiation dosage, is provided.     

A new gate drive circuit for high-speed operation of GTO thyristors

This paper presents a new gate turn-off drive circuit for GTO thyristors, which can accomplish faster turn-off switching for high-speed operation of the GTO. The switching characteristics of GTO's can be improved by use of the gate drive circuit that is able to make a very high rate of the negative gate current. The major disadvantage of the conventional gate turn-off driving technique is that it has a difficulty in realizing higher negative di_G/dt due to the maximum reverse gate-cathode voltage and the stray inductances within the gate turn-off drive circuit. This paper shows that this problem can be overcome by adding another gate turn-off drive circuit to the conventional gate turn-off drive circuit. Simulation and experimental results in conjunction with chopper circuit verify the performance of the proposed gate drive circuit     

Influence of the gate internal impedance on losses in a power MOStransistor switching at a high frequency in the ZVS mode

In order to use a power metal oxide semiconductor (MOS) transistor switching in the zero voltage mode at high frequencies, the output capacitance has to be maximal and the input capacitance minimal. These characteristics are available in the datasheets. Nevertheless, to choose a transistor ideal for such an application, having minimal losses, additional characterizations have to be done in order to complete the datasheets. In particular, it is necessary to make sure that all the cells of the MOS transistor can be opened in a time shortly before the voltage rise time at turn-off, in order to reduce as low as possible the turn-off losses. The present paper points out that the gate to source impedance characterizes the ability of the device to turn-off very quickly and the knowledge of that parameter is useful to choose a MOS transistor having minimal losses in very high frequency zero voltage switching (ZVS) applications     

The MOS inversion layer as a minority carrier injector

In this paper we report the first experimental demonstration of the concept of MOS inversion layer injection (ILI). The new physical concept is based on the use of a MOS inversion layer as a minority carrier injector as part of a dynamic junction. The carrier injection of such a junction is entirely controlled by the MOS gate. Moreover, when the gate potential is reduced under the MOS threshold voltage, the junction collapses ensuring a very efficient turn-off mechanism. Based on this concept we propose two novel lateral three-terminal structures termed inversion layer diode (ILD) and inversion layer bipolar transistor (ILBT). The concept of inversion layer injection can be applied in power devices where effective MOS gate control of the active junctions is important     

The MOS depletion-mode thyristor: a new MOS-controlled bipolarpower device

A new MOS-bipolar power device in which forced-gate turn-off is achieved using a depletion region formed by an MOS gate structure is described. This device, called the depletion-mode thyristor (DMT), offers many highly desired features for high-voltage power switching applications: a) low ON-state drop, b) high input impedance, c) three-terminal operation, d) equivalent complementary devices, and e) high maximum controllable current. Experimental verification of device operation has been achieved using a UMOS gate technology     

The effect of MOS Channel length on the performance of insulated gate transistors

The effect of MOS channel length on n-channel 600-V insulated gate transistors (IGT's) is evaluated. When the channel length was decreased from 1.9 to 0.8 µm, a doubling of the forward conduction current was measured at a forward drop of 2 V for IGT's with a turn-off time of 2 µs. Also, a better forward drop versus turnoff time tradeoff were observed. However, a 25-50-percent decrease in latching current was measured for the short-channel devices under dynamic switching conditions at 150°C.     

High gain power switching using field controlled thyristors

A technique for high gain power switching using field controlled thyristors is described. This technique uses a MOSFET connected in series with the FCT to control the current flow. The circuit exhibits normally-off behavior and is capable of operation at high voltages. The current through the FCT can be turned on and off by the application of a low voltage gate signal to the MOSFET. Turn-on and turn-off times of less than 1 μs have been observed at a current gain of over 30. The new gating technique offers the advantage of the large operating current density of the FCT even at high breakdown voltages and the high input impedance of the MOS gate used to trigger the device during power switching.     

4H-SiC power devices for use in power electronic motor control

Silicon carbide (SiC) is an emerging semiconductor material which has been widely predicted to be superior to both Si and GaAs in the area of power electronic switching devices. This paper presents an overview of SiC power devices and concludes that the MOS turn-off thyristor (MTO™), comprising of a hybrid connection of SiC gate turn-off thyristor (GTO) and MOSFET, is one of the most promising near term SiC switching device given its high power potential, ease of turn-off, 500°C operation and resulting reduction in cooling requirements. The use of a SiC and an anti-parallel diode are primary active components which can then be used to construct an inverter module for high-temperature, high-power direct current (d.c.) motor control.     

A new Insulated-Gate Thyristor structure with turn-off achieved bycontrolling the base-resistance

A new Insulated-Gate Thyristor (IGTH) design for achieving high controllable current capability is described. The design consists of square cells with high density of MOS-channels modulating the resistance of the base region of the NPN transistor of the thyristor structure. The diagonal regions between the square cells is used as the turn-on regions while the other regions under the MOS gate between the cell diffusions are connected by P^- diffusion to obtain a MOS-gate controlled low resistance path for turn-off. The IGTH was fabricated using a double-diffused DMOS process and 1200 V devices with controllable currents in excess of 150 A was obtained     

一种积累型沟道的半超结结构绝缘栅双极型晶体管

A high performance trench insulated gate bipolar transistor which combines a semi-superjunction struc- ture and an accumulation channel （sSJTAC-IGBT） is proposed for the first time. Compared with the TAC-IGBT, the new device not only retains the advantages of the accumulation channel, but also obtains a larger breakdown voltage （BV）, a faster turn-off speed and a smaller saturation current level while keeping the on-state voltage drop lower as the TAC-IGBT does as well. Therefore, the new structure enlarges the short circuit safe operating area （SCSOA） and reduces the energy loss during the turn-off process.     

A review of gate tunneling current in MOS devices

Gate current in metal–oxide–semiconductor (MOS) devices, caused by carriers tunneling through a classically forbidden energy barrier, is studied in this paper. The physical mechanisms of tunneling in an MOS structure are reviewed, along with the particularities of tunneling in modern MOS transistors, including effects such as direct tunneling, polysilicon depletion, hole tunneling and valence band tunneling and gate current partitioning. The modeling approach to gate current used in several compact MOS models is presented and compared. Also, some of the effects of this gate current in the performance of digital, analog and RF circuits is discussed, and it is shown how new effects and considerations will come into play when designing circuits that use MOSFETs with ultra-thin oxides.     

Oxide current in MOS transistors operated under charge pumping conditions

The present paper describes an alternative approach for isolating the oxide current from the gate current (GC) and its use for characterizing the bulk oxide in MOS transistors. The method is based on measurements of the gate as well as the substrate currents of MOS transistors pulsed by a train of square wave pulses under charge pumping conditions.The measurements are done on various experimental devices and different gate and drain/source voltage biasing. The GC has been measured and was found to be of typical behavior when it is plotted with respect to the gate voltage. Moreover, the gate and substrate currents are found to be of complementary shapes when plotted with respect to gate voltage. This behavior is made useful in studying and characterizing the oxide and the interface of MOS transistors.     

Temperature behavior and annealing of insulated gate transistors subjected to localized lifetime control by proton implantation

Localized lifetime control by proton implantation can result in a considerable improvement in the trade-off between device turn-off time and forward voltage when compared with the unlocalized method of electron irradiation. After a proton dose of 3 × 10¹¹cm⁻² at 3.1 MeV implanted here into insulated gate transistors, turn-off time is reduced by more than an order of magnitude compared to unimplanted devices. When the implanted devices are operated as high voltage switches at a current of 152 A cm⁻² and at a forward blocking voltage of 400 V, the following increases are observed by increasing device operating temperatures from 20 to 150°C, (a) forward voltage: 2.5 V to 2.7 V; (b) turn-off time: 0.78 μs to 1.23 μs; (c) leakage current: 20 nA to 1 mA. The physical mechanisms responsible for the qualitative temperature dependences are identified: MOS channel resistance for forward voltage, carrier capture cross-section for turn-off time, and generation and diffusion components of leakage current. Since no catastrophic or unrecoverable behavior is observed, normal device operation within the tested temperature range is possible. Isothermal annealing curves of turn-off time measured after annealing, and corresponding to a few hours annealing time, reveal that a constant turn-off time is reached after about an hour. The constant value increases with temperature, but is still below the unimplanted value after 4 h at 525°C. The turn-off time was verified to be constant even after 24 h of annealing at 200°C. Lifetime control by proton implantation seems to be more thermally stable than that caused by electon irradiation.     

A novel single gate MOS controlled current saturated thyristor

A novel single gate MOS controlled current saturation thyristor (MCST) device is proposed. In the on-state the MCST operates in thyristor-like mode at low anode voltage and enters the IGBT-like mode automatically with increasing anode voltage, offering a low on-state voltage drop and current saturation capability. Simulation results based on 6.5 kV trench devices indicate the turn-off energy loss of the MCST is reduced by over 35% compared to the IGBT. The saturation current density of the MCST is strongly dependent on the on-set voltage of the p ⁺ buffer/n-well junction, leading to its excellent safe operation area (SOA) and making it suitable for high power applications