Plasma-assisted chemical vapor deposited silicon oxynitride as an alternative material for gate dielectric in MOS devices

Silicon oxynitride films have been deposited on Si substrates at 200 °C by a remote-plasma-assisted process in a RF-plasma CVD reactor using Si(OC₂H₅)₄ (TEOS) as a precursor and nitrogen as gas ambient. During deposition the Si substrates were biased with negative voltages of −120 and −600 V or were under no DC bias and the influence of this voltage on the film properties has been considered. Film parameters, such as density, chemical bonds, refractive index, composition, oxide and interface charge densities of the deposited dielectric films have been estimated by analysis of the results from the infrared (IR) spectroscopy, spectral ellipsometry (SE) and capacitance-voltage (C-V) measurements. The IR and SE results have proven the films are oxynitrides of silicon with predominantly oxide network. The analysis of the capacitance-voltage characteristics has shown that the dielectric charge densities increase with increasing DC bias but they remain considerably low in comparison to that for a standard SiO₂/Si structure before any annealing steps.     

Thermal and plasma enhanced atomic layer deposition ruthenium and electrical characterization as a metal electrode

Ruthenium thin films were grown by thermal and plasma-enhanced atomic layer deposition (PE-ALD) using O₂ and ammonia (NH₃) plasma, respectively. RuCp₂ and Ru(EtCp)₂ were used as Ru precursors. Pure and low resistivity (<20 μΩ cm) Ru films were grown by PE-ALD as well as thermal ALD. PE-ALD Ru showed no nucleation delay on various substrates including TaN_x, Si, and SiO₂, in contrast to thermal ALD Ru. And the root-mean-square (RMS) roughness of PE-ALD Ru was lower than that of thermal ALD Ru. Additionally, metal-oxide-semiconductor (MOS) capacitor composed of p-Si/ALD Ta₂O₅/ALD Ru (35 nm) was fabricated and C-V measurements were performed for as-deposited sample. Very small hysteresis of 20 mV was obtained, and effective work function difference to Si substrate was minimal as −0.03 V. For comparison, MOS capacitor was fabricated using sputtered Ru and large hysteresis of 0.5 V and flat band voltage (V_FB) shift to negative value were observed. This result indicates that ALD process produces more reliable, damage free Ru gate compared to sputtering process.     

Investigation of RF sputtered PSG films for MEMS and semiconductor devices

In this work, we report the preparation of phospho-silicate-glass (PSG) films using RF magnetron sputtering process and its application as a sacrificial layer in surface micromachining technology. For this purpose, a 76 mm diameter target of phosphorus-doped silicon dioxide was prepared by conventional solid-state reaction route using P₂O₅ and SiO₂ powders. The PSG films were deposited in a RF (13.56 MHz) magnetron sputtering system at 200-300 W RF power, 10-20 mTorr pressure and 45 mm target-to-substrate spacing without external substrate heating. To confirm the presence of phosphorus in the deposited films, hot-probe test and sheet resistance measurements were performed on silicon wafers following deposition of PSG film and a drive-in step. As a final confirmatory test, a p-n diode was fabricated in a p-type Si wafer using the deposited film as a source of phosphorus diffusion. The phosphorus concentration in the target and the deposited film were analyzed using energy dispersive X-rays (EDAX) tool. The etch rate of the PSG film in buffered HF was measured to be about 30 times higher as compared to that of thermally grown SiO₂ films. The application of RF sputtered PSG film as sacrificial layer in surface micromachining technology has been explored. To demonstrate the compatibility with MEMS process, micro-cantilevers and micro-bridges of silicon nitride were fabricated using RF sputtered PSG as a sacrificial layer in surface micromachining. It is envisaged that the lower deposition temperature in RF sputtering (<150 °C) compared to CVD process for PSG film preparation is advantageous, particularly for making MEMS on temperature sensitive substrates.     

Optical characteristics of Si/SiO2 multilayers prepared by magnetron sputtering

Si/SiO₂ multilayers have been successfully prepared by magnetron sputtering and subsequently thermal annealed in an Ar atmosphere at a temperature of more than 500 °C. The surface of the as-deposited films is compact and smooth, and the distribution of grain size estimated to be 20 nm is uniform. For Si/SiO₂ multilayers annealed at 1100 °C, the Si sublayer sandwiched between potential barrier SiO₂ is crystalline structure by means of the analysis of Raman spectra and XRD data. The visible PL peak accompanying to a blue-shift with the decrease of Si sublayer thickness has been observed, and the intensity of this peak enhances with the increase of annealing temperature. The visible luminescence properties of Si/SiO₂ multilayers can be ascribed to quantum confinement of electron-hole pairs in quantum wells with grain size lower than 4.5 nm. In Si/SiO₂ multilayers, not only quantum confinement but also Si-SiO₂ interface states play an important role in the optical transition. The PL peak located at 779 nm is independent of the thickness of Si sublayer, so it may be ascribed to interface mediated transition. Typical Si dangling bonds defect could be a dominating obstacle to high luminescence efficiencies.     

Thermal stability of Ni silicide films on heavily doped n and p Si substrates

Electrical and structural properties of Ni silicide films formed at various temperatures ranged from 200 °C to 950 °C on both heavily doped n⁺ and p⁺ Si substrates were studied. It was found that surface morphology as well as the sheet resistance properties of the Ni silicide films formed on n⁺ and p⁺ Si substrates at the temperatures higher than 600 °C were very different. Agglomerations of Ni silicide films on n⁺ Si substrates begin to occur at around 600 °C while there is no agglomeration observed in Ni silicide films on p⁺ Si substrates up to a forming temperature of 700 °C. It was also found that the phase transition temperature from NiSi phase to NiSi₂ phase depend on substrate types; 900 °C for NiSi film on n⁺ Si substrate and 750 °C for NiSi film on p⁺ Si substrate, respectively. Our results show that the agglomeration is, especially, important factor in the process temperature dependency of the sheet resistance of Ni silicides formed on n⁺ Si substrates.     

Metalorganic chemical vapor deposition of silver thin films for future interconnects by direct liquid injection system

Deposition of Ag films by direct liquid injection-metal organic chemical vapor deposition (DLI-MOCVD) was chosen because this preparation method allows precise control of precursor flow and prevents early decomposition of the precursor as compared to the bubbler-delivery. Silver(I)-2,2-dimethyl-6,6,7,7,8,8,8-heptafluoro-3,5-octanedionato-triethylphosphine [Ag(fod)(PEt₃)] as the precursor for Ag CVD was studied, which is liquid at 30 °C. Ag films were grown on different substrates of SiO₂/Si and TiN/Si. Argon and nitrogen/hydrogen carrier gas was used in a cold wall reactor at a pressure of 50–500 Pa with deposition temperature ranging between 220 °C and 350 °C. Ag films deposited on a TiN/Si diffusion barrier layer have favorable properties over films deposited on SiO₂/Si substrate. At lower temperature (220 °C), film growth is essentially reaction-limited on SiO₂ substrate. Significant dependence of the surface morphology on the deposition conditions exists in our experiments. According to XPS analysis pure Ag films are deposited by DLI-MOCVD at 250 °C by using argon as carrier gas.     

Effect of Si/Ta and nitrogen ratios on the thermal stability of Ta-Si-N thin films

Ta-Si-N thin films were fabricated by using reactive magnetron cosputtering at different Si/Ta power ratios and nitrogen (N₂) to total gas (Ar + N₂) flow ratios (FN₂% = FN₂/(FAr + FN₂) × 100%). Both levels of high-vacuum furnace annealing (FA) and low vacuum rapid thermal annealing (RTA) were performed to investigate the thermal stability of films. The microstructure, morphology and electrical property of the Ta-Si-N thin films were characterized by grazing incidence X-ray diffraction, scanning electron microscope and four-point probe method, respectively. Ta-Si-N thin films at low FN₂% could endure temperature up to 900 °C for 1 h under high-vacuum FA at 6.5 × 10⁻³ Pa while their phase and morphology had changed under RTA at 750-900 °C for 1 min at 2.6 Pa. The resistivity increased with increasing both FN₂% and Si/Ta power ratios. However, the variation percentage of resistivity of Ta-Si-N films at high-temperature annealing decreased with increasing Si/Ta power ratio and inversely increased with increasing FN₂%. In brief, the thermal stability of Ta-Si-N films increased with increasing level of vacuum and Si/Ta power ratio. Increasing FN₂% and Si/Ta power ratio could enhance the thermal stability of films at RTA but also increased the resisitivity of films. Therefore, Ta-Si-N films prepared at 2 FN₂% and Si/Ta power ratio of 2/1 can be a good candidate for the application of diffusion barrier with low resistivity, low variation percentage and high stability of microstructure.     

Texture of atomic layer deposited ruthenium

Ruthenium films were grown by plasma enhanced atomic layer deposition (ALD) on Si(1 0 0) and ALD TiN. X-ray diffraction (XRD) showed that the as-deposited films on Si(1 0 0) were polycrystalline, on TiN they were (0 0 2) oriented. After annealing at 800 °C for 60 s, all Ru films were strongly (0 0 2) textured and very smooth. Electron backscatter diffraction (EBSD) and transmission electron microscopy (TEM) demonstrated that the lateral grain size of the annealed films was several 100 nm, which was large compared to the 10 nm thickness of the films. No ruthenium silicide was formed by annealing the ALD Ru films on Si(1 0 0). Comparison with sputter deposited films learned that this occurred because the ammonia plasma created a SiO_xN_y reaction barrier layer prior to film growth.     

Fabrication and electrical characteristics of ultrathin (HfO2)x(SiO2)1−x films by surface sol-gel method and reaction-anneal treatment

Hafnium oxide (HfO₂) films were deposited on Si substrates with a pre-grown oxide layer using hafnium chloride (HfCl₄) source by surface sol-gel process, then ultrathin (HfO₂)_x(SiO₂)_1−x films were fabricated due to the reaction of SiO₂ layer with HfO₂ under the appropriate reaction-anneal treatment. The observation of high-resolution transmission electron microscopy indicates that the ultrathin films show amorphous nature. X-ray photoelectron spectroscopy analyses reveal that surface sol-gel derived ultrathin films are Hf-Si-O alloy instead of HfO₂ and pre-grown SiO₂ layer, and the composition was Hf_0.52Si_0.48O₂ under 500 °C reaction-anneal. The lowest equivalent oxide thickness (EOT) value of 0.9 nm of film annealed at 500 °C has been obtained with small flatband voltage of −0.31 V. The experimental results indicate that a simple and feasible solution route to fabricate (HfO₂)_x(SiO₂)_1−x composite films has been developed by means of combination of surface sol-gel and reaction-anneal treatment.     

Characterisation of titanium disilicide thin films

Properties of TiN/TiSi₂ thin films prepared on phosphorus-doped Si (1 0 0) substrates by sputtering of Ti film followed by a rapid thermal annealing in NH₃ atmosphere at different conditions were studied. Thickness of as-deposited Ti layers was 40 and 60 nm and the annealing duration was set to 10 s at temperatures from 750 to 900 °C. Formation of a compact TiN/TiSi₂/Si structure by rapid thermal annealing has been analysed by Auger electron spectroscopy and time-of-flight secondary ion mass spectroscopy depth profiling. Different amounts of oxygen in TiN layers and phosphorus redistribution in both TiN and TiSi₂ layers have also been detected. Both C54 and C49 TiSi₂ phases were identified by micro-Raman spectroscopy in samples annealed at 750 °C, whereas single C54 phase has been observed in samples annealed at higher temperatures. Creation of TiSi₂ grains of sub-micrometer size at the TiSi₂/Si substrate, explaining the depth dependence of the sheet resistance of silicide layers has been revealed by the scanning electron microscopy.     

Electrical characterisation of SiON/n-Si structures for MOS VLSI electronics

In the present work, we examine the properties of SiON films grown on Si substrates by CVD in order to investigate their suitability as potential materials in replacing SiO₂ in metal-oxide-semiconductor (MOS) devices. Suitable metallization created MOS devices and electrical characterisation took place in order to identify their electrical properties. Electrical measurements included current-voltage (I-V), capacitance-conductance-voltage (C-V) measurements and admittance spectroscopy (Y−ω) allowing determination of the bulk charges and the dielectric response of the films. The analysis of the data also took into account the presence of traps at the Si/SiON interface calculated by a fast conductance technique. The interface states density was of the order of 10¹² eV⁻¹ cm⁻². The dielectric constant was found to lie between 16 and 4.5 and the corresponding bulk trapped charges were found between 8 and 113 μCb cm⁻². Post deposition annealing altered these values showing an improvement of the device behaviour. A short explanation of the above is also provided.     

Effects of post-annealing on thermoelectric properties of bismuth-tellurium thin films deposited by co-sputtering

This paper reports the microstructure evolution of Bi-Te thermoelectric films upon post-annealing and its effects on the thermoelectric properties. Bi-Te films with the composition of around 61 at.% Te and the thickness of 300 nm were deposited onto SiO₂-coated Si substrates by using bismuth and tellurium targets in a radio frequency (RF) magnetron sputtering system. We annealed the films at different temperatures (100, 150 and 200 °C) under N₂ ambient for 8 h, and characterized the crystallinity and morphology of the Bi-Te films. Microstructure characterization using X-ray diffraction and scanning electron microscopy disclosed that the post-annealing treatment entailed a drastic microstructural evolution by inducing the development of a strong texture of grains with their c-axis oriented normal to the substrate. In addition, we measured the electrical transport and thermoelectric properties of the films to reveal their close link with the microstructure changes. The electron mobility and Seebeck coefficient increase significantly, leading to a remarkable improvement in the power factor from 3.3 μW/K² cm for the as-deposited sample to 24.1 μW/K² cm for the 200 °C-annealed sample.     

Investigation of atomic vapour deposited TiN/HfO2/SiO2 gate stacks for MOSFET devices

HfO₂ films were grown by atomic vapour deposition (AVD) on SiO₂/Si (1 0 0) substrates. The positive shift of the flat band voltage of the HfO₂ based metal-oxide-silicon (MOS) devices indicates the presence of negative fixed charges with a density of 5 × 10¹² cm⁻². The interface trap charge density of HfO₂/SiO₂ stacks can be reduced to 3 × 10¹¹ eV⁻¹ cm⁻² near mid gap, by forming gas annealing. The extracted work function of 4.7 eV preferred the use of TiN as metal gate for PMOS transistors. TiN/HfO₂/SiO₂ gate stacks were integrated into gate-last-formed MOSFET structures. The extracted maximum effective mobility of HfO₂ based PMOS transistors is 56 cm²/Vs.     

A novel thermally-stable zirconium amidinate ALD precursor for ZrO2 thin films

ZrO₂ thin films were deposited by the atomic layer deposition process on Si substrates using tetrakis(N,N′-dimethylacetamidinate) zirconium (Zr-AMD) as a Zr precursor and H₂O as an oxidizing agent. Tetrakis (ethylmethylamino) zirconium (TEMA-Zr) was also evaluated for a comparative study. Physical properties of ALD-derived ZrO₂ thin films were studied using ellipsometry, grazing incidence XRD (GI-XRD), high resolution TEM (HRTEM), and atomic force microscopy (AFM). The ZrO₂ deposited using Zr-AMD showed a better thermal stability at high substrate temperature (>300 °C) compared to that using TEMA-Zr. GI-XRD analysis reveals that after 700 °C anneal both ZrO₂ films enter tetragonal phase. The electrical properties of N₂-annealed ZrO₂ film using Zr-AMD exhibit an EOT of 1.2 nm with leakage current density as low as 2 × 10⁻³ A/cm² (@V_fb−1 V). The new Zr amidinate is a promising ALD precursor for high-k dielectric applications.     

Breakdown kinetics at nanometer scale of innovative MOS devices by conductive atomic force microscopy

The breakdown (BD) kinetics of dielectrics represent a crucial issue for the reliability of microelectronics devices. In this paper, we report on an innovative and practical approach based on Conductive Atomic Force Microscopy (C-AFM) for the determination of the BD kinetics on a bare insulator surface. This technique has been applied to Pr₂O₃ films grown by Metal-Organic Chemical Vapour Deposition (MOCVD) on Si(0 0 1) and to thermally grown SiO₂ on 4H-SiC substrates. C-AFM clearly visualizes single breakdown spots under constant voltage stresses. The stress time on the C-AFM tip was varied from 1 × 10⁻³ to 1 × 10⁻¹ s. The density of BD spots, upon increasing the stress time, exhibits in both cases an exponential trend. The Weibull slope of the dielectric BD statistics has been determined by direct measurements at nanometer scale on different dielectrics having different physical thicknesses. The comparison of the Weibull slopes obtained for different dielectric thicknesses with literature data points out intrinsic and extrinsic BD events in the SiO₂/SiC system and Pr₂O₃ based layers, respectively. In the case of the SiO₂/SiC system, BD kinetics have been demonstrated to follow the percolation model, while the role of extrinsic phenomena in the BD of Pr₂O₃ films has been proved.     

RTD characteristics for micro-thermal sensors

The physical and electrical characteristics of MgO (medium layer) and Pt (sensor material) thin films deposited by a reactive RF sputtering method and a magnetron sputtering method, respectively, were analyzed as a function of the annealing temperature and time by using a four-point probe, SEM, and XRD. After being annealed at 1000 °C for 2 h, the MgO layer showed good adhesive properties on both layers (Pt and SiO₂ layers) without any chemical reactions, and the surface resistivity and the resistivity of the Pt thin film were 0.1288 Ω/□ and 12.88 μΩ cm, respectively. Pt resistance patterns were made on MgO/SiO₂/Si substrates by the lift-off method, and Pt resistance thermometer devices (RTDs) for micro-thermal sensor applications were fabricated by using Pt-wire, Pt-paste, and spin-on-glass (SOG). From the Pt RTD samples having a Pt thin film thickness of 1.0 μm, we obtained a temperature coefficient of resistor (TCR) value of 3927 ppm/°C, which is close to the Pt bulk value, and the ratio variation of the resistance value was highly linear in the temperature range of 25-400 °C.     

Optimization of Pb(Zr0.53,Ti0.47)O3 films for micropower generation using integrated cantilevers

Lead zirconate titanate, Pb(Zr_0.53,Ti_0.47)O₃ or PZT, thin films and integrated cantilevers have been fabricated for energy harvesting applications. The PZT films were deposited on PECVD SiO₂/Si substrates with a sol-gel derived ZrO₂ buffer layer. It is found that lead content in the starting solution and ramp rate during film crystallization are critical to achieving large-grained films on the ZrO₂ surface. The electrical properties of the PZT films were measured using metal-ferroelectric-metal and inter-digital electrode structures, and revealed substantial improvement in film properties by controlling the process conditions. Functional cantilevers are demonstrated using the optimized films with output of 1.4 V peak-to-peak at 1 kHz and 2.5 g.     

Fully strained Si0.75Ge0.25 epitaxial films with HfSiO gate dielectrics for high mobility channel metal-oxide semiconductor devices

The authors report on fully strained Si_0.75Ge_0.25 metal-oxide-semiconductor capacitors with HfSiO₂ high-k gate dielectric and TaN metal gate fabricated on Si substrates. Fully strained Si_0.75Ge_0.25 films are directly grown on Si substrates below the critical thickness. HfSiO₂ high-k gate dielectrics exhibit an equivalent oxide thickness of 13-18 Å with a permittivity of 17.7 and gate leakage current density lower than SiO₂ gate oxides by >100×. Interfacial oxide of the HfSiO₂/Si_0.75Ge_0.25 stack consists primarily of SiO₂ with a small amount of Ge and Hf. High performance SiGe field effect transistors are highly manufacturable with excellent electrical characteristics afforded by the fully strained HfSiO₂/SiGe gate stack.     

Study of ultrathin vanadium nitride as diffusion barrier for copper interconnect

Ultrathin Vanadium nitride (VN) thin film with thickness around 10 nm was studied as diffusion barrier between copper and SiO₂ or Si substrate. The VN film was prepared by reactive ion beam sputtering. X-ray diffraction, Auger electron spectroscopy, scanning electron microscopy and current-voltage (I-V) technique were applied to characterize the diffusion barrier properties for VN in Cu/VN/Si and Cu/VN/SiO₂ structures. The as-deposited VN film was amorphous and could be thermal stable up to 800 °C annealing. Multiple results show that the ultrathin VN film has good diffusion barrier properties for copper.     

Post deposition UV-induced O2 annealing of HfO2 thin films

UV-assisted annealing processes for thin oxide films is an alternative to conventional thermal annealing and has shown many advantages such as low annealing temperature, reducing annealing time and easy to control. We report in this work the deposition of ultra-thin HfO₂ films on silicon substrate by two CVD techniques, namely thermal CVD and photo-induced CVD using 222 nm excimer lamps at 400 °C. As-deposited films of around 10 nm in thickness with refractive indices from 1.72 to 1.80 were grown. The deposition rate measured by ellipsometry was found to be about 2 nm/min by UV-CVD, while the deposition rate by thermal CVD is 20% less than that by UV-CVD. XRD showed that the as-deposited HfO₂ films were amorphous. This work focuses on the effect of post deposition UV annealing in oxygen on the structural, optical and electrical properties of the HfO₂ films at low temperature (400 °C). Investigation of the interfacial layer by FTIR revealed that thickness of the interfacial SiO₂ layer slightly increases with the UV-annealing time and UV annealing can convert sub-oxides at the interface into stoichiometric SiO₂, leading to improved interfacial qualities. The permittivity ranges in 8–16, are lower than theoretical values. However, the post deposition UV O₂ annealing results in an improvement in effective breakdown field and calculated permittivity, and a reduction in leakage current density for the HfO₂ films.