广播电视发射台播出信号检测报警器设计制作

介绍一套自行设计制作的报警器。报警器利用施密特触发器的回差特性设计制作而成,通用于中波、调频、电视发射台,能够对发射机的载频进行检测。报警器用到的核心器件是一种用途十分广泛的施密特触发器,利用其电位触发特性(又称回差特性)进行信号幅度的鉴别。只要信号幅度达到回差电压值以上,触发器就会翻转,报警器件发出报警。本文就报警器的结构、原理、调试方法作详细的论述。     

基于开关信号理论的电流型CMOS多值施密特电路设计

以开关信号理论为指导,建立了描述电流型CMOS多值施密特电路中阈值控制电路的电流传输开关运算.在此基础上,提出了新的电流型CMOS三值和四值施密特触发器设计.所设计的电路可提供多值电流和电压输出信号,回差电流的大小只需通过改变MOS管的尺寸比来调节.所提出的电路较之以往设计具有结构简单,回差值调整容易以及可在较低电压下工作等特点.采用TSMC 0.25 μ m CMOS工艺参数和1.5V电压的HSPICE模拟结果验证了所提出设计方案的有效性和电路所具有的理想回差特性.     

施密特电路的回差对控制精度的影响

本文主要以分立元件施密特电路为例,通过理论计算分析了施密特电路的回差在自动化控制中对控制精度的影响问题,以及提高控制精度的具体方法.在此基础上进一步分析了用集成运算放大器作施密特触发器其回差对控制精度的影响问题.     

用于GaN HEMT栅驱动芯片的高性能过温保护电路

设计了一种用于GaN HEMT器件栅驱动芯片的高性能温度保护电路,能精确响应并输出保护信号以确保电路安全.过温保护采用两路温度检测电路来采集温度信号电压值并对电压差值进行放大,比较滤波后经过具有滞回功能的施密特触发器输出整形保护信号,可以克服共模噪声和温度应力的影响.基于CSMC 0.18μm BCD工艺,完成了电路设计验证与测试,结果显示电路功能正确,可满足GaN HEMT器件栅驱动芯片应用要求.     

高速箝位结构用于脉冲形成电路

正反馈放大器是信号级脉冲形成电路的基础。这种装置确保了输入信号超过输入阈值时的类触发作用：在大多数情况下．输入信号为电压信号。最著名的触发器为施密特触发器（今年它将迎来70周年生日）。英国科学家OH Schmltt在1938年以两级运放带电流反馈的形式，发明了施密特触发器，其中的两个有源器件为电子管。     

一种高速低耗全摆幅BiCMOS集成施密特触发器

通过分析国外流行的一种 Bi CMOS集成施密特触发门 ,提出了一种高速、低功耗、全摆幅输出的Bi CMOS施密特触发器。该器件中单、双极型电路优势互补 ,电源电压为 1 .5 V,实现了优于同类产品的全摆幅输出 ,且其开关速度高于同类 CMOS产品的 1 3倍以上 ,因此特别适用于高速数字通信系统中     

用于SPICE-Ⅱ程序的耗尽型MOS器件模型

分析了SPICEⅡ程序模拟耗尽型MOS器件所遇到的限制及其原因,用线性区阈电压和饱和区阈电压描述耗尽型器件线性区和饱和区特性,讨论了饱和区阈电压与线性区阈电压之差随衬偏电压变化的关系,建立了耗尽型MOS器件模型及其参数提取的新方法.模拟结果与实验基本吻合.     

测量光耦响应时间的简单电路

本例中的电路可以用于测量光敏电阻型光耦的启动与恢复时间(图1)。这些光耦器件一般用于音频压缩器或音量控制电路。本设计使用了一只振荡的施密特触发器,在其反馈回路中有光耦DUT(待测器件)。光敏电阻与电阻R,构成一个分压器,控制施密特触发器的输入。光耦的LED连接到触发器的输出端。用示波器或数字万用表就可以测量输出脉冲的周期。负输出脉冲的周期等于开关导通时间,或启动时间。正脉冲     

基于多值逻辑方法的二值神经元MOS电路设计技术

提出一种通过引入多值求和信号指导设计二值神经元MOS电路的方法.对每个神经元MOS管的逻辑功能均采用传输开关运算予以表示.在此基础上设计了实现常用二变量逻辑函数的神经元MOS电路和全加器等电路.采用所提出的方法综合得到的电路结构十分简单,而且很容易确定各耦合电容之间的取值比例.设计结果同时表明,利用浮栅电压信号易于实现求和的优点,通过引人求和辅助变量可显著简化对电路的综合过程.采用TSMC0.35μm双层多晶硅CMOS工艺参数的HSPICE模拟结果验证了所提出设计方案的正确性.     

基于1-of-2共振隧穿数据选择器的可置位复位D触发器设计

文章以共振隧穿RT器件为主要器件,设计了上边沿触发的共振隧穿D触发器.该触发器以1-of-2共振隧穿数据选择器为核心电路,带预先置位和复位功能.此共振隧穿数据选择器电路的设计方法还能用于实现其他触发器电路,为采用基于RT器件设计触发器电路提供了一种新的并且有效简单的方法,弥补了共振隧穿电路中只能用MOBILE单元来设计时序电路的单一性,丰富了量子电路中触发器的类型.     

Differential CMOS Schmitt trigger with tunable hysteresis

This letter presents a new differential Schmitt trigger with tunable hysteresis. The hysteresis is generated using a cross-coupled inverter pair. The amount of hysteresis can be adjusted by varying the current of the symmetrical load. The proposed Schmitt trigger has been designed in TSMC-0.18 μm 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. Simulation results demonstrate that the triggering voltage of the Schmitt trigger can be adjusted from 0.95 to 1.35 V approximately.     

A high-speed differential CMOS Schmitt trigger with regenerative current feedback and adjustable hysteresis

This paper presents a brief overview of Schmitt triggers and proposes a new differential current-feedback Schmitt trigger. The hysteresis of the proposed Schmitt trigger is generated using regenerative current feedback and can be adjusted by varying the current of the regenerative feedback network. The center of the hysteresis can also be adjusted by varying the common-mode input voltage. The proposed Schmitt trigger has the characteristics of current-mode circuits, making it particularly attractive for low-voltage high-speed applications. The proposed Schmitt trigger has been designed in TSMC-0.18 μm 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. Simulation results are presented.     

Design techniques for ASK demodulators of passive wireless microsystems: a state-of-the-art review

This paper presents a brief overview of Schmitt triggers and proposes a new differential current-feedback Schmitt trigger. The hysteresis of the proposed Schmitt trigger is generated using regenerative current feedback and can be adjusted by varying the current of the regenerative feedback network. The center of the hysteresis can also be adjusted by varying the common-mode input voltage. The proposed Schmitt trigger has the characteristics of current-mode circuits, making it particularly attractive for low-voltage high-speed applications. The proposed Schmitt trigger has been designed in TSMC-0.18 μm 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. Simulation results are presented.     

Design and Enactment of Diverse Low Power Techniques Based Schmitt Trigger

In the present-day VLSI system, low power design plays a noteworthy role. As we know that, a circuit with higher power consumption can ruin the performance of the system because in the modern world most of the systems are portable. Subsequently, they are functioned by the batteries. Therefore, it is desirable to have a system which operates at lower supply voltages along with maintaining the performance of the system. This low power system can be attained by abating the leakages of the devices up-to an enormous magnitude. In the contemporary VLSI system, a major role is being contributed by the Schmitt trigger circuit. Schmitt trigger is fundamentally a comparator. It is implemented by using a positive feedback. The Schmitt trigger circuit is used in various devices such as buffer, sub-threshold SRAM, sensors and PWM circuit. It is also used in analog to digital converter. The most significant property of the Schmitt trigger is that they provide hysteresis in their voltage transfer curve. Consequently, they provide better noise immunity as compared to their counterparts. Therefore it becomes quite important to enhance the performance of the Schmitt trigger circuit. The power dissipation of the device can be minimized by minimizing the sub-threshold current. The Schmitt trigger circuit is very imperative in producing a clean pulse from the input signal comprising of noise. There are various applications of Schmitt trigger circuit such as in scheming the oscillator circuit, analog to digital converter, function generator, signal conditioning and numerous applications. Thus, it becomes noteworthy to boost its performance by plummeting the leakages and power consumption of the Schmitt trigger circuit. We have realized the Schmitt trigger circuit by the use of FinFET. Therefore, we have got some optimum output in the parameters such as hysteresis width, power consumption and total noise of the Schmitt trigger circuit, but the leakages have been augmented. Thereafter, we have implemented several techniques on the Schmitt trigger circuit to shrink the leakage current, leakage power and other parameters further. We have applied Self Controllable Voltage Level, Adaptive voltage level and MTCMOS technique on the Schmitt trigger circuit using FinFET to further augment the presentation. All the circuits have been simulated in the virtuoso tool of the cadence in 45 nm VLSI domain. We have applied 0.7 V of the supply voltage to perform the simulation and got some tremendous outcome.     

Schmitt trigger circuit with picosecond risetimes

A Schmitt trigger circuit is described which overcomes some of the stability problems associated with the wide hysteresis loop of more conventional arrangements. A low level of hysteresis is achieved, thereby reducing the threshold voltage while also affording increased stability during switching. Operational risetimes of 200 ps are demonstrated.     

Low-voltage low VDD sensitivity relaxation oscillator for passive wireless microsystems

A low-voltage relaxation oscillator for passive wireless microsystems is proposed. The oscillator employs a current pulse generator to generate effective hysteresis for oscillation without using a Schmitt trigger, avoiding the drawback of the high sensitivity of the frequency of Schmitt trigger relaxation oscillators to supply voltage fluctuation. The proposed oscillator has been implemented in TSMC-0.18 mum 1.8 V six-metal one-poly CMOS technology. The performance of the oscillator is validated using measurement results.     

Wide Voltage Input Receiver with Hysteresis Characteristic to Reduce Input Signal Noise Effect

In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 0.35‐μm standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of (V_CC/2) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, V_CC is the fixed voltage supply of 3.3 V.     

Novel CMOS Schmitt trigger

A novel CMOS Schmitt trigger circuit has been realised, using only five MOS transistors. The circuit always guarantees hysteresis, even with very large process variations. The switching speed of the new Schmitt trigger is higher, compared to previously reported CMOS Schmitt triggers.     

Novel CMOS Schmitt trigger with controllable hysteresis

A novel CMOS Schmitt trigger with controllable hysteresis based on the standard CMOS circuit with three transistor pairs is proposed. With the addition of only one transistor pair a Schmitt trigger with two selectable hysteresis characteristics can be achieved. Simulation results are compared with theory and a possible application is presented.<>