深亚微米光学光刻设备制造技术

相对于其它“后光学”光刻技术 ,在 0 1 3μm甚至 0 1 3μm以下集成电路制造水平上 ,光学光刻仍然具有强大的吸引力。随着光学光刻极限分辨率的不断提高 ,当代光学光刻设备正面临着越来越严重的挑战。论述了深亚微米光学光刻设备的技术指标和面临的技术困难 ,对其中一些关键的技术解决方案进行了分析。     

三维微电子学综述

三维微电子学主要研究三维集成电路的设计与制造。文章讨论了三维集成电路的概念、发明思想、结构、优点、制造及其挑战和应用等。三维微电子技术必将成为未来发展的新兴技术。     

A 3.5-mW, 2.5-GHz diversity receiver and a 1.2-mW, 3.6-GHz VCO insilicon on anything

In this paper, first results of radio-frequency (RF) circuits processed in a novel silicon bipolar technology called silicon on anything (SOA) are presented. This technology was developed with the application of low-power, high-frequency circuits in mind. Three test ICs are discussed: a fully integrated 3.6-GHz voltage-controlled oscillator, a fully integrated 2.5-GHz diversity receiver front end, and an intermediate-frequency IC containing channel selectivity and demodulation circuits. Measurement results show that using this technology, significant power savings are possible for RF circuits     

CMOS射频集成电路：成果与展望

CMOS射频集成电路的研究和制作将大大拓展集成电路的应用空间,文章介绍了采用CMOS工艺集成射频电路研究中所取得的成果,评述了其中存在的问题,最后指出了该领域中未来的几个研究方向。     

6Gbit/s multiplexer and regenerating demultiplexer ICs for optical transmission systems based on a standard bipolar technology

Time-division 4:1 multiplexing and 1:4 demultiplexing as well as signal regeneration are important functions in high-speed optical fibre transmission systems. It has been shown by experiments that these tasks can be solved up to about 6Gbit/s by using monolithic integrated circuits fabricated with a 2 ?m standard bipolar technology.     

微波集成电路技术—回顾与展望

半个多世纪来 ,微波电路技术经历了从分立电路、两维微波集成电路、三维微波集成电路等阶段。在回顾这一发展历程后 ,介绍多层微波集成电路和三维微波集成电路。阐述其产生背景、关键技术及发展方向。文中将涉及微加工技术以及从直流至射频的多芯片全集成新概念。瞻望二十一世纪前景。     

Current-mode CMOS integrated circuits for analog computation and signal processing: A tutorial

This paper presents an overview of design techniques for a broad range of current-mode analog integrated circuits implemented in CMOS technology at a tutorial level. Primarily, emphasis is placed on circuit configurations, first-order analysis, and approximate design equations for analog integrated circuits operating in current domain for signal computation and processing applications.     

Integrated silicon anemometer

At present, planar silicon technology allows one to construct very sophisticated integrated circuits for the processing of electronic signals. In the letter, an integrated silicon sensor for the measurement of gas flow is introduced.     

A 2.45-GHz Near-Field RFID System With Passive On-Chip Antenna Tags

The design of a 2.45-GHz near-field RF identification (RFID) system with passive on-chip antenna (OCA) tags is very challenging as the efficiency of RF power conversion is very low. It poses multidisciplinary research challenges such as ultra-low-power circuits design, semiconductor process technology, and integrated antenna design. This paper describes the designs of such an RFID system, the reader, and OCAs, as well as the passive tag integrated circuits in detail. The passive tag chip with 128-bit nonvolatile memory has been realized using CMOS 0.13- technology. The OCA is fabricated on top of the chip using post-processing technology. The complete RFID tag with an integrated OCA is smaller than 0.5- with a thickness of 0.1 mm. With the reader generating an output power of 0.5 W, the RFID system is able to perform with RF read/write functions at a distance of .     

Capacitors made by anodisation of aluminium for wideband GaAs ICs

The letter explains first how a capacitor made with anodic oxidations of aluminium can improve the bandwidth of GaAs integrated circuits. The technology of this capacitor is described with emphasis on the crossing of the edge of the capacitor by the upper metallisation. Capacitances of about 1500 pF/mm2 have been obtained with a breakdown voltage in the 5?10 V region.     

MOS晶体管技术

简要回顾MOS晶体管一些具有代表性的技术进展,分析了其在将来超大规模集成电路(ULSI)应用中的主要限制.从材料以及器件结构两个方向分别阐述了突破现有MOS技术而最有希望被将来ULSI工业所采用的新型晶体管技术.     

CODYMOS frequency dividers achieve low power consumption and high frequency

Frequency dividers made with complementary dynamic m.o.s. (CODYMOS) circuits require only a small number of transistors and interconnections, a single input signal and operate with a minimum number of successive transitions. This leads to a drastic reduction in stray capacitance and current consumption, and to an increase in speed. A simplified analysis of these quantities is given for binary and ternary dividers. An experimental circuit, integrated with silicon-gate technology, operates from a 1.35 V battery, divides by 3 up to an input frequency in excess of 20 MHz and draws a current of 0.4 ?A/MHz.     

High-speed signal switching with a monolithic integrated p-i-n/amp/switch on indium phosphide

Operation of an optoelectronic integrated circuit which includes two p-i-n photodetectors, preamplifiers, a 2*2 crosspoint switch, and output buffers has been demonstrated. These circuits are fabricated in semi-insulating InP:Fe substrates by vapor-phase epitaxy and ion implantation using a planar horizontally integrated technology. Signals modulated at 150 MHz are shown to be switched at 15 MHz, with the circuits capable of detecting and passing data modulated at approximately 1 GHz.<>     

Switching phenomenon observed in lateral p?n?p transistors

This letter describes an unusual phenomenon observed in lateral-geometry p?n?p transistors in monolithic integrated circuits. The collector current falls almost to zero when the collector-emitter voltage exceeds a critical value. A hypothesis is advanced to explain the effect, and applications are outlined.     

Computer-aided design of VLSI circuits

With the rapid evolution of integrated circuit (IC) technology to larger and more complex circuits, new approaches are needed for the design and verification of these very-large-scale integrated (VLSI) circuits. A large number of design methods are currently in use. However, the evolution of these computer aids has occurred in an ad hoc manner. In most cases, computer programs have been written to solve specific problems as they have exist and no truly integrated computer-aided desisn (CAD) systems exist for the design of IC's. A structured approach both to circuit desisn and to circuit verification, as well as the development of integrated design systems, is necessary to produce cost-effective error-free VLSI circuits. This paper presents a review of the CAD techniques which have been used in the design of IC's, as well as a number of design methods to which the application of computer aids has proven most successful. The successful application of design-aids to VLSI circuits requites an evolution from these techniques and design methods.     

高速光器件的光集成及光电集成

本文介绍了高速激光器的现状，并综述了高速激光器的光集成和接收机的光电集成。最后，讨论了光集成和光电集居技术及今后的发展。     

Process technology for radiation-hardened CMOS integrated circuits

A process technology for radiation-hardened CMOS integrated circuits has been defined. Process parameters for the SiO/SUB 2/ gate insulator have been optimized for radiation hardness, and circuit latch-up due to parasitic p-n-p-n structures on the integrated circuits has been prevented by gold-doping the silicon substrate to reduce carrier lifetime. The device yields for the hardened technology have been evaluated and the reliability has been characterized by bias-temperature life testing.     

电子芯片冷却技术发展综述

从电子技术和电子芯片冷却技术发展背景出发，论述了微型电子芯片冷却技术的发展现状及前景．同时重点论述了微型换热器、微冷冻机、微流道热沉、微热管均热片和微型热声制冷模块技术，以及热声制冷模块的独有发展优势．指出要实现芯片冷却技术的协调发展，必须把冷却模块技术和芯片本身的发展综合考虑，才能有助于两者的协调发展．     

Picosecond Integrated Circuits in Germanium and Silicon

Recent advances in semiconductor technology make possible a planar technology for germanium similar to that used for silicon integrated circuits. Calculations based upon material properties indicate a considerable advantage to germanium over silicon for high-speed logic-switching applications.This is due largely to the better electron and hole mobilities for germanium. Switching circuit delays have been measured in both germanium and siliconin hybrid and integrated circuit form. For a given level of device sophistication (measured in terms of the stripe widths used on the devices) the germanium circuits are about three times faster than the equivalent silicon circuits.     

数字集成电路测试矢量的生成

电路的日益复杂和集成度的不断提高,使测试已成为集成电路设计中费用最高、难度最大的一个环节。文章主要讨论了测试中伪随机测试矢量的生成,并提出了改进其周期的办法,从而大大提高了故障的覆盖率。最后通过硬件描述语言Verilog在Quartus Ⅱ软件下进行仿真,验证了其正确性。