Comparison of InGaSb/InAs superlattice structures grown by MBE on GaSb, GaAs, and compliant GaAs substrates

This paper contains the characterization results for indium arsenide/indium gallium antimonide (InAs/InGaSb) superlattices (SL) that were grown by molecular beam epitaxy (MBE) on standard gallium arsenide (GaAs), standard GaSb, and compliant GaAs substrates. The atomic force microscopy (AFM) images, peak to valley (P-V) measurement, and surface roughness (RMS) measurements are reported for each sample. For the 5 μm×5 μm images, the P-V heights and RMS measurements were 37 ? and 17 ?, 12 ? and 2 ?, and 10 ? and 1.8 ? for the standard GaAs, standard GaSb, and compliant GaAs respectively. The high resolution x-ray diffraction (HRXRD) analysis found different 0^th order SL peak to GaSb peak spacings for the structures grown on the different substrates. These peak separations are consistent with different residual strain states within the SL structures. Depending on the constants used to determine the relative shift of the valance and conduction bands as a function of strain for the individual layers, the change in the InAs conduction band to InGaSb valance band spacing could range from +7 meV to −47 meV for a lattice constant of 6.1532 ?. The cutoff wavelength for the SL structure on the compliant GaAs, control GaSb, and control GaAs was 13.9 μm, 11 μm, and no significant response, respectively. This difference in cutoff wavelength corresponds to approximately a −23 meV change in the optical gap of the SL on the compliant GaAs substrate compared to the same SL on the control GaSb substrate.     

无掩模Si圆柱纳米图形衬底上GaAs的异变外延生长

采用金属有机化学气相沉积方法在无掩模的直径为400nm的圆柱Si(100)图形衬底上外延生长了GaAs薄膜。图形衬底采用纳米压印技术及反应离子刻蚀技术制作而成。运用两步法生长工艺在此图形衬底上制备了厚度为1.8μm的GaAs外延层。GaAs的晶体质量通过腐蚀坑密度和透射电镜表征。图形衬底上的GaAs外延层表面腐蚀坑密度约1×107 cm-2,比平面衬底上降低了两个数量级。透射电镜观测显示大部分产生于GaAs/Si异质界面的穿透位错被阻挡在圆柱顶部附近。     

两步生长和直接生长GaAs/Si单晶薄膜的比较

报道了采用热壁外延(HWE)技术,在(100),(111)和(211)三种典型Si表面通过两步生长和直接生长法制备GaAs单晶薄膜,经过拉曼光谱、霍尔测试和荧光光谱分析比较,得出结论:(1)相同取向Si衬底,两步生长法制备的GaAs薄膜结晶质量比直接生长法制备的GaAs薄膜的要好;(2)采用HWE技术在Si上异质外延GaAs薄膜,其表面缓冲层的生长是降低位错、提高外延质量的基础;(3)不同取向Si衬底对GaAs外延层结晶质量有影响, (211)面外延的GaAs薄膜质量最好,(100)面次之,(111)面最差.     

Si-implantation into GaAs grown on Si

200 keV Si implantations were performed in the dose range of 5 × 10¹² − 1 × 10¹⁴ cm⁻² in GaAs grown on Si. For comparison implants were also performed in GaAs layers grown on GaAs substrates. Implanted layers were annealed by both furnace and halogen lamp rapid thermal anneals. Significantly lower donor activations were observed in GaAs layers grown on Si substrates than in the layers grown on GaAs substrates. Extremely low dopant activations were obtained for Be implants in GaAs grown on Si. Photoluminescence and photoreflectance measurements were also performed on the implanted material.     

分子束外延GaAs/Si应变层的光致发光和光反射谱研究

研究了分子束外延GaAs/Si光致发光谱的激发强度和温度依赖关系。确定出2个本征发光峰,分别对应于导带至m_J=±3/2和m_J=±1/2价带的复合。这种价带的移动和分裂归因于由GaAs和Si的热膨胀系数不同所引起的GaAs层双轴张应力。还观测到4个非本征发光峰,分别为导带至m_J=±1/2碳受主态发光、可能与缺陷有关的发光以及可能由Mn和Cu受主杂质引起的发光。室温下将GaAs/Si和GaAs/GaAs材料的光反射谱进行比较,前者明显向低能移动约8meV,观测到3个特征谱结构,与光致发光结果相一致。     

Application of low temperature GaAs to GaAs/Si

Low Temperature grown GaAs (LT-GaAs) was incorporated as a buffer layer for GaAs on Si (GaAs/Si) and striking advantages of this structure were confirmed. The LT-GaAs layer showed high resistivity of 1.7 × 10⁷ ω-cm even on a highly defective GaAs/Si. GaAs/Si with the LT-GaAs buffer layers had smoother surfaces and showed much higher photoluminescence intensities than those without LT-GaAs. Schottky diodes fabricated on GaAs/Si with LT-GaAs showed a drastically reduced leakage current and an improved ideality factor. These results indicate that the LT-GaAs buffer layer is promising for future integrated circuits which utilize GaAs/Si substrates.     

Comparison of MBE Growth of InSb on Si (001) and GaAs (001)

We describe the epitaxial growth of InSb films on both Si (001) and GaAs (100) substrates using molecular-beam epitaxy and discuss the structural and electrical properties of the resulting films. The complete 2 μm InSb films on GaAs (001) were grown at temperatures between 340°C and 420°C and with an Sb/In flux ratio of approximately 5 and a growth rate of 0.2 nm/s. The films were characterized in terms of background electron concentration, mobility, and x-ray rocking curve width. Our best results were for a growth temperature of 350°C, resulting in room-temperature mobility of 41,000 cm²/V s.  For the growth of InSb on Si, vicinal Si(001) substrates offcut by 4° toward (110) were used. We investigated growth temperatures between 340°C and 430°C for growth on Si(001). In contrast to growth on GaAs, the best results were achieved at the high end of the range of T _S =  C, resulting in a mobility of 26,100 cm²/V s for a 2 μm film. We also studied the growth and properties of InSb:Mn films on GaAs with Mn content below 1%. Our results showed the presence of ferromagnetic ordering in the samples, opening a new direction in the diluted magnetic semiconductors.     

MOCVD GaAs/Si兼容技术及其应用

本文着重论述用MOCVD方法生长GaAs/Si的工艺技术及存在的问题。     

Low threading dislocation density GaAs on Si(100) with InGaAs/GaAs strained-layer superlattice grown by migration-enhanced epitaxy

This paper reports a promising approach for reducing the density of threading dislocations in GaAs on Si. In _x Ga_1-x As/GaAs strained-layer superlattices (SLSs) grown by migration-enhanced epitaxy at 300° C on GaAs/Si acted as barriers to threading dislocations. Unlike conventional high-temperature-grown SLSs, the low-temperature-grown SLSs were hardly relaxed by the formation of misfit dislocations at GaAs/SLS interfaces, and this allowed them to accumulate considerable strain. New threading dislocation generation due to the misfit dislocation was also suppressed. These factors caused effective bending of threading dislocations and significantly reduced the dislocation density. For the samples that had an SLS withx = 0.3, the average etch-pit density was 7 × 10⁴ cm^-2, which is comparable to that of GaAs substrates.     

Initial nanoheteroepitaxial growth of GaAs on Si(100) by OMVPE

Initial growth studies of GaAs on an array of Si islands nanostructured on (100) oriented silicon-on-insulator substrates show that growth occurs through a mixture of selective-area and 3D growth modes. An optimum initiation growth temperature must tune the growth conditions to the geometry of the seed array so that selective-area control is maintained while defect density is minimized. The optimum temperature for a square array of Si islands, 500 nm in pitch, and 100 nm to 280 nm in diameter, is ∼600 C. This temperature yields single-crystal nucleation on each Si island while maintaining selective-area growth mode control. Transmission electron microscope (TEM) analysis of optimized and non-optimized grown GaAs/Si heterostructures show that they accommodate 0.4–0.7% strain. Further reduction in stacking-fault defects attributed to side wall growth may be possible through masking of side wall or annealing.     

Properties of a poly-Si/GaAs layered structure on Si for Si heterojunction bipolar transistor

The properties of poly-Si/GaAs layered films on Si for use in wide bandgap emitters for Si heterojunction bipolar transistors (Si-HBTs), were studied. A smooth GaAs film surface grown on Si was obtained at low temperature (200° C) from the initial stage of growth. The x-ray diffraction (XRD) results indicated that strong GaAs orientation (111) was obtained for the poly-Si/GaAs/Si-substrate layered structure after annealing at 800° C for 20 sec. Secondary ion mass spectroscopy (SIMS) profiles indicated that impurity diffusion from the GaAs layer into the p-type Si substrate was negligible at 800° C. The electrical characteristics forn-poly-Si/n-GaAs/p-Si-substrate heterojunction diodes were also investigated.     

High quality AIN and GaN grown on compliant Si/SiC substrates by gas source molecular beam epitaxy

Epitaxial layers of AlN and GaN were grown by gas source molecular-beam epitaxy on a composite substrate consisting of a thin (250 nm) layer of silicon (111) bonded to a polycrystalline SiC substrate. Two dimensional growth modes of AlN and GaN were observed. We show that the plastic deformation of the thin Si layer results in initial relaxation of the AlN buffer layer and thus eliminates cracking of the epitaxial layer of GaN. Raman, x-ray diffraction, and cathodoluminescence measurements confirm the wurtzite structure of the GaN epilayer and the c-axis crystal growth orientation. The average stress in the GaN layer is estimated at 320 MPa. This is a factor of two less than the stress reported for HVPE growth on 6H-SiC (0001).     

Ion-assisted molecular beam epitaxy of GaAs on Si(100)

GaAs was grown by molecular beam epitaxy (MBE) and ion-assisted MBE on Si(100) substrates. Three-dimensional (3D) island nucleation, observed during MBE growth, was eliminated during ion-assisted MBE when the ion energyE was >25 eV and the product ofE and the current densityJ was ≈6-12 eV mA/cm². IncreasingEJ to ≈15 eV mA/ cm² resulted in excessive ion damage. Decreasing the substrate temperature from 280 to 580° C during ion-assisted MBE yielded a slight decrease in surface roughness, and flatter surfaces were obtained for lower As⁴/Ga flux ratios. The suppression of 3D island nucleation led to an improvement in the crystalline perfection of thicker GaAs films. For example, the x-ray diffraction rocking-curve full-width-at-half-maximum values for 0.5 μm thick films grown at 380° C decreased from 1700 arcsec to 1350 arcsec when ion irradiation was used during nucleation. IAMBE allowed nucleation of thin, relatively flat-surfaced GaAs films even at 580° C, resulting in FWHM values of 1850 arcsec for 0.14 /μm thick films.     

MOCVD grown CdZn Te/GaAs/Si substrates for large-area HgCdTe IRFPAs

Large-area HgCdTe 480×640 thermal-expansion-matched hybrid focal plane arrays were achieved by substituting metalorganic chemical vapor deposition (MOCVD)-grown CdZnTe/GaAs/Si alternative substrate in place of bulk CdZnTe substrates for the growth of HgCdTe p-on-n double-layer heterojunctions by controllably-doped mercury-melt liquid phase epitaxy (LPE). (100) CdZnTe was grown by MOCVD on GaAs/Si using a vertical-flow high-speed rotating disk reactor which incorporates up to three two-inch diameter substrates. Layers having specular surface morphology, good crystalline structure, and surface macro defect densities <50 cm⁻² are routinely achieved and both the composition uniformity and run-to-run reproducibility were very good. As the composition of the CdZnTe layers increases, the x-ray full width at half maximum (FWHM) increases; this is a characteristic of CdZnTe grown by VPE techniques and is apparently associated with phase separation. Despite a broader x-ray FWHM for the fernary CdZnTe, the FWHM of HgCdTe grown by LPE on these substrates decreases, particularly for [ZnTe] compositions near the lattice matching condition to HgCdTe. An additional benefit of the ternary CdZnTe is an improved surface morphology of the HgCdTe layers. Using these silicon-based substrates, we have demonstrated 78K high-performance LWIR HgCdTe 480×640 arrays and find that their performance is comparable to similar arrays fabricated on bulk CdZnTe substrates for temperatures exceeding approximately 78K. The performance at lower temperatures is apparently limited by the dislocation density which is typically in the low-mid 10⁶ cm⁻² range for these heteroepitaxial materials.     

Optical properties of Cl-doped ZnSe epilayers grown on GaAs substrates

We have determined the optical properties of a series of Cl-doped ZnSe epilayers grown on GaAs substrates using ellipsometry and prism coupling. Initially, the carrier concentrations were determined using Hall measurements for samples between 6.30×10¹⁶ cm⁻³ and 9.50×10¹⁸ cm⁻³. Using a variable angle spectroscopic ellipsometer in the energy range between 0.7 eV and 6.5 eV, we then obtained experimental spectra for each of the samples. By incorporating a three-layer model to simulate the experimental data, we determined the complex dielectric functions for these Cl-doped ZnSe epilayers. In order to facilitate this modeling procedure, we have complemented the ellipsometric results with prism coupling experiments that measured the film thickness and the index of refraction (at discrete wavelengths) very precisely. For the fundamental band gap, we observe a blue shift with respect to the doping concentration, which can be explained by the Burstein-Moss effect. In addition, we have determined the critical point parameters related to these specimens by fitting the second derivatives of both the real and the imaginary parts of the dielectric functions. Similar to several doped III-V semiconductors reported thus far, we find that in Cl-doped ZnSe epilayers, both E₁ and E₁ + Δ ₁ red shift, as well as a broadening with respect to the doping concentration.     

Large area depositon of Cd1-xZnxTe on GaAs and Si substrates by metalorganic chemical vapor deposition

Results of large-area (up to 1000 cm²/run) Cd_1-xZn_xTe heteroepitaxy on both GaAs and GaAs/Si substrates by metalorganic chemical vapor deposition (MOCVD) are presented. Cd_1-xZn_xTe (x = 0-0.1) films exhibited specular surface morphology, 1% thickness uniformity (standard deviation), and compositional uniformity (Δx) of ±0.002 over 100 mm diam substrates. For selected substrate orientations and deposition conditions, the only planar defects exhibited by (lll)B Cd_1-xZn_xTe/GaAs/Si films were lamella twins parallel to the CdTe/GaAs interface; these do not propagate through either the Cd_1-xZn_xTe layer or subsequently deposited liquid phase epitaxy (LPE) HgCdTe layer(s). Background Ga and As-impurity levels for Cd_1-xZn_xTe on GaAs/Si substrates were below the secondary ion mass spectroscopy detection limit. Preliminary results of HgCdTe liquid phase epitaxy using a Te-rich melt on Si-based substrates resulted in x-ray rocking curve linewidths as narrow as 72 arc-sec and etch-pit densities in the range 1 to 3 x 10⁶ cm².     

Epitaxial necking in GaAs grown on pre-pattemed Si substrates

We report a new method for the natural reduction of threading dislocations in GaAs on Si by growing on patterned Si substrates. We also explore other effects of patterning on dislocation formation during growth: stress relief near the mesa edges at high aspect ratios, and limited dislocation nucleation and propagation. Prior to growth, the Si substrates were processed to produce a plurality of mesas varying in width (5-170 μm) and geometry (circular, rectangular, and square mesas). After growth of the GaAs, the material was characterized with cathodoluminescence (CL) and secondary electron microscopy. For a GaAs growth temperature of 570° C and a thickness of 10 μm, the GaAs grown on the 40μ-wide Si mesas show a factor of 1.6 increase in luminescence intensity over the luminescence intensity from the unpatterned control area. Also, the emission wavelength from the smaller mesas is shifted to shorter wavelengths as compared to GaAs/GaAs and the unpatterned control area. The emission wavelength and CL intensity varies across the mesas; for 40 μm wide mesas, the emission wavelength is fairly constant across the mesa and the CL intensity decreases near the edges, whereas for larger mesas the emission wavelength decreases and the CL intensity increases at the mesa edges. For the 40 μm wide mesas, the integrated CL intensity is equal to that of a control GaAs/GaAs grown with the same doping level. No cracks were observed in the GaAs grown on the Si mesas, even though the thickness of the GaAs was 10 μ,m.     

Selected-area GaAs epitaxial growth on Si free from detrimental sidewall interactions

The growth of GaAs on patterned Si trenches is essential for the realization of planarized monolithic co-integration of GaAs and Si devices. The patterned boundary regions also provide lateral sinks for stresses and defect propagation so long as the undesirable sidewall growth interactions are suppressed. In this study, we developed a cantilever patterning mask structure, with feature sizes ranging from 1.5 to 100 μm using overhung SiO₂ masks sitting on top of 3-μm-tall undercutting poly-Si patterns. The Si growth surface is protected and unetched. Patterned molecular beam epitaxial (MBE) grown GaAs layers are then prepared with complete elimination of sidewall interactions. Cross-sectional transmission electron microscopy (XTEM) results show there are reduced-defect areas in the regions 2 to 3 μm from the pattern edges compared to blanket grown areas. Combining the near-edge defect-reduction feature with other defect-reduction schemes incorporated during growth, patterned GaAs with sizes of 10 μm or under exhibits significant material quality improvements compared to blanket layer growth under the same conditions.     

Si衬底GaN基多量子阱外延材料的TEM研究

本文采用高分辨透射电子显微技术对在Si衬底生长的GaN基多量子阱外延材料的位错特征、外延层与衬底的晶体取向关系及界面的结晶形态等微观结构进行了分析和研究.结果表明:Si衬底生长的GaN与衬底有一定的取向关系;材料在MQW附近的穿透位错密度达108 cm-2量级,且多数为刃型位错;样品A的多量子阱下方可见平行于界面方向的...     

Lattice-mismatched InGaAs layers grown by OMVPE on GaAs based compliant substrates

Thin GaAs compliant substrates have been developed in order to reduce the strain in lattice-mismatched layers during epitaxial overgrowth. Using OMVPE a variety of (30–80Å) thin GaAs layers were grown and successfully fused at 660°C on a host GaAs substrate with twist-angles between 10° and 45°. The resulting compliant substrates were overgrown with up to 3.6% lattice-mismatched and 1200 nm thick InGaAs layers. Nomarski phase contrast microscopy, photoluminescence and x-ray diffraction (XRD) were used to characterize the heteroepitaxial layers. The smooth and cross-hatch free morphology and the reduced DXRD peakwidth of the heteroepitaxial layers indicate a substantial improvement of the quality of heteroepitaxial material using compliant substrates.