H.264中基于先验预测的帧间编码模式选择算法研究

帧间编码的模式选择算法是H.264视频编码器中计算量较大的部分。该文首先简要介绍了H.264帧间多模式编码原理,然后对帧间编码的最佳模式进行统计、分析,提出了一种基于先验预测的帧间编码模式选择快速算法。仿真实验结果表明该文提出的快速模式选择策略可以在保证视频编码质量的同时,很大程度上降低编码器的计算复杂度。     

基于伪随机码置乱的分布式视频残差编码端码率控制算法

提出一种基于伪随机码置乱的分布式视频残差编码端码率控制算法,利用伪随机码对残差视频帧的像素进行置乱处理,将信源图像与其边信息图像之间的差别均匀化,实现帧级别上的码率估计,即每一帧用同一码率发送。如果收端译码失败,利用提出的一种量化序号估计算法能显著提高译码成功率,解决码率低估问题。同时发端视频残差帧的特性能近似表示收发两端信号之间的相关性,因此,发端无需产生一个预测的边信息。仿真结果表明,该算法发端复杂度低、译码成功率高、系统延迟小、率失真性能良好。     

Codes based on a trellis cut-set transformation. I. Rotationallyinvariant codes

Let a trellis section 𝒯 generate a trellis code 𝒞. We study two trellis sections based on 𝒯, a “cut-set” trellis section 𝒯_cs and a “differential encoder” trellis section 𝒯_de. We show that 𝒯 can be transformed to a cut-set trellis section 𝒯_cs, which is equivalent to 𝒯 in the sense that both 𝒯 and 𝒯 _cs generate 𝒞 and both 𝒯 and 𝒯_cs have the same decoding complexity. A differential encoder trellis section is equivalent to the trellis section obtained by following 𝒯 with a differential encoder. It is shown that both 𝒯_cs and 𝒯_de have inverse transform trellis sections. A differential encoder trellis section generates a rotationally invariant (RI) code in a particularly simple and straightforward way. But an RI code need not have a differential encoder trellis section. However, for all of the RI codes examined here, we show that the cut-set trellis section can be arranged into a differential encoder trellis section. This means that these codes can be decomposed into an encoder followed by a differential encoder. Further we show that when 𝒯 is formed using a linear binary convolutional encoder and a mapping by set partitioning, then 𝒯 followed by a differential encoder gives an RI code which in some cases is as good as the best previously known codes, after applying the inverse transform to 𝒯_de     

统计复用发展综述

本文首先综述了统计复用的相关术语和概念;其次综述了可变比特率统计复用与固定比特率比较、开环和闭环统计复用的比较,以及MPEG-2和H.264/AVC统计复用的比较。     

基于 G.722.1 的分布式语音编码

在语音通信网络中，为获得良好的语音通信质量，抗丢包技术不可或缺。为此，本文基于 ITU G.722.1 语音编码器，提出一种分布式语音编码方法。该方法在 G.722.1 编码器的基础上，构建一个互补编码器；然后在编码端，对同一帧语音分别用 G.722.1 编码器和其互补编码器进行语音编码，并发送编码结果；在解码端，在接收到其中任一语音码流时，用 G.722.1 解码器进行解码，其语音质量不低于 G.722.1 编码器的解码结果，而在接收到两个语音码流时，用 G.722.1 解码器先分别对两个语音码流进行解码，然后对解码结果进行联合处理，其最终的语音质量有明显提升，即有一定编码增益。仿真实验结果表明，本文分布式语音编码方法的抗丢包效果明显，相对于原始编解码器其语音质量进一步提升。      

Theory of an Imperfect PCM Encoder-Decoder Pair Using Half-Channel Measures

A theory is presented for the quantization noise power and gain of a PCM channel in terms of static and dynamic errors in encoder decision levels and decoder output levels. Decision profiles are used in a statistical model for encoder imperfections, while conditional output distributions describe those of the decoder. The model describes the combined behavior of any encoder and decoder that have been characterized separately in terms of the CCITT-defined half-channel tests. A linear regression model is used and the noise powers and offsets are shown to obey addition laws, while the gains obey a multiplicative rule.     

基于H．263编码标准的H．264实时编码器的优化设计

从实时应用角度出发,参考H.263编码标准,对H.264视频编码器进行精简,并对耗时较大的算法进行改进.仿真结果表明,简化后的H.264编码器编码速度达到20f/s(帧/秒),达到实时编码要求,且编码性能优于H.263编码标准的编码器.     

H.264帧间模式选择优化算法

提出一种新的H.264快速模式选择算法：根据块的细节程度和纹理方向选择不同模式集,这些模式集比整个模式集模式数量大大减小,从而提高了模式搜索速度。信噪比的降低与比特率的增加都在可接受范围内,仿真结果证明了算法的有效性。     

H.264宏块模式的一种快速判决方案

H.264采用了可变块运动估计和率失真优化模式判决,极大地增加了编码器的复杂度.本文利用H.264参考软件对时间/空间相邻宏块模式之间的相关性进行了分析,相应地提出了一种快速算法以降低模式判决的运算复杂度.利用已编码相邻宏块的运动信息和模式类型比率信息预测当前宏块的候选模式类型,然后采用部分率失真优化决定当前宏块的编码模式.如果某些模式不在候选模式之列,就不再对其做运动估计.如果相邻宏块的平均失真超过了预定阈值,当前宏块就采用常规的率失真优化模式判决.实验结果表明,对于A、B类测试图像序列,采用本文方案可以明显降低编码复杂度,而编码质量只有轻微的下降.     

信源信道联合编码技术用于AVS传输的研究

针对误码信道和信源编码的统计特性,提出了一种基于AVS视频序列的联合编码技术,按照重要性对AVS视频层序列码流进行分组重排,信道编码器根据码流信息对其进行比重不等的保护措施,以较低复杂度的运算实现了码率的优化分配.实验表明,与现有的等差错保护相比,在高误码信道中能有效提高AVS码流抗误码性能.     

H.264编码器典型方案分析及应用研究

对H.264编码器在不同平台的典型实现进行了介绍,对其多种优化方式和软件、硬件设计进行分析.总结了基于模型的编码器开发过程,并结合正在开发的H.264编码系统,研究了参考模型代码转换和复杂度高的模块的算法优化.     

基于DSP平台的H.264编码器的优化与实现

针对H.264编码器的复杂度很高和基于DSP平台的H.264编码器的实时处理实现难度很大的问题,该文首先介绍了H.264标准基本档次的编码结构,对影响编码速度的原因进行了深入的分析。然后针对TMS320DM642芯片的特点,提出一些优化实现方案,最终在DSP平台上实时实现了H.264基本档次编码器。测试结果表明,经过优化,H.264编码器的处理速度有了很大的提高,对于CIF格式的视频序列能够满足视频编码的实时处理要求。     

H.264算法的DSP移植与优化

在TMS320DM643平台上实现H.264基档次编码器的移植与优化显得格外实用和必要。基于对DSP平台的结构特性和H.264的计算复杂度分析,主要从核心算法、数据传输和存储器/Cache使用几方面对H.264编码器进行了优化。实验结果表明,对于C IF格式的视频序列,优化后的H.264编码器能够达到每秒高于24帧的编码速度,满足了视频处理对于实时性的要求。     

基于ASIC的H.264编码器设计及其ADSP验证策略

提出了H.264/AVC硬件编码器的一种3级流水结构,以此来提高硬件加速电路的处理能力和利用效率。鉴于H.264编码芯片验证的复杂性,还提出了一种基于ADSP-BF537的新型多媒体SoC验证平台,并讨论了如何利用BF537,对H.264编码芯片进行全面、高效的软硬件协同验证。     

基于DM642的X．264编码器优化

X．264编码器注重实效性,在不明显降低编码性能的前提下,降低编码的计算复杂度,摒弃了JM中一些耗时相对较大但对性能的提升影响很小的模块,因此嵌入式系统中常选用X．264编码器。移植到DSP平台的X．264编码器,编码效率不佳,平均只有0．7f／s。为了能够在DSP平台上进行高效率的编码,采用了代码优化以及DM642优化2种优化方式来优化移植到DM642平台的X．264编码器。对优化过后的X．264编码器在DM642平台上进行了实验。实验结果表明,优化过后的X．264编码器对CIF格式视频序列的编码时间大幅度的降低。     

On the statistics of the error in predictive coding for stationaryOrnstein-Uhlenbeck processes

Explicit expression are derived for the conditional expectation and variance of the encoder in a predictive DPCM coder with an N-level quantizer, when a stationary Ornstein-Uhlenbeck process is a source. A representation of the encoder in terms of a stochastic integral is presented. These expressions yield a nonlinear stochastic difference equation for the decoding error process and a stochastic differential equation (SDE) as a weak limit for the error process. The statistical properties of the error obtained as a solution of the limiting SDE are interpreted in terms of the slope overload error     

H.264视频编码器的VLSI实现

介绍了几种H．264硬件编码器及其特点,设计了支持1080i视频格式的H．264编码器,简介了运动估计、运动补偿等模块的设计要点,进行了VLSI实现。经FPGA验证与分析,整体设计占用逻辑资源较少,功耗约为850mW。     

Combining hidden Markov source models and parallel concatenatedcodes

We present here a framework for modifying a decoder for parallel concatenated codes to incorporate a general hidden Markov source model. This allows the receiver to utilize the statistical characteristics of the source during the decoding process, and leads to significantly improved performance relative to systems in which source statistics are not exploited. One of the constituent decoders makes use of a modified trellis which jointly describes the source and the encoder. The number of states in this modified trellis is the product of the number of states in the hidden Markov source and the number of states in the encoder     

基于TMS320C6416芯片的H.264编码器设计和实现

描述了基于TMS320C6416 DSP平台的H.264编码器的设计和实时实现.在提出该编码器实时实现中的关键问题之后,介绍了该编码器的硬件平台和所采用的多种代码移植和优化方法.试验结果表明:该编码器在保持很高的图像质量和压缩效率的同时极大地提高了运行速度,可以应用于实时应用场合.     

Implementation of SDTV Video Encoder with Real-Time Constant and Variable Bit-Rate Control

The digital standard definition television (SDTV) encoder is a very important part of the digital TV broadcast chain. Most real-time MPEG-2 encoders are designed to perform in a constant bit-rate (CBR) mode. But an even better compressed stream can be created by employing a variable bit-rate (VBR) encoding algorithm. VBR can be exploited as a means of achieving statistical multiplexing for digital broadcast satellites. This paper suggests an implementation procedure of an SDTV video encoder and proposes a novel VBR bit-allocation strategy that could be implemented in this encoder system. First, using a rate-quantization model and rate-quantization perceptual model, a real-time VBR bit-allocation strategy is deduced. In this strategy, more (or fewer) bits are allocated to "difficult-to-encode" (or "easy-to-encode") groups of pictures (GOPs), which are distinguished according to the estimated encoding complexity of the GOPs. After allocating an appropriate number of bits to each GOP by using this VBR bit-allocation strategy, we use a CBR rate control algorithm to allocate a number of bits and select a quantization scaler for each picture of a GOP. Then smooth visual quality is achieved not only in a GOP but also in the whole video sequence. Second, the system implementation of an SDTV video encoder including a video input module, a video encoding module, a system control and rate control module (SCRCM), and a PES packetizing module is described. We also discuss in detail how to implement our real-time VBR bit-allocation strategy in the SCRCM. Finally, experimental results demonstrate that our proposed VBR encoder displays a better performance than the CBR encoder.