An improved topology of inductor-switching DC-DC converter

An improved version of an inductor-switching fast-response dc-dc converter is presented that will provide the requirements and features of the new generation of microprocessor and digital systems. Lower output voltage, higher output current, and smaller output voltage ripple requirements have greatly increased the difficulty of the power supply design. To further increase the problem, power-saving "stop-clock" modes of the microprocessor has demanded faster and more stable transient response from the dc-dc converter. A novel method of inductor switching is applied to a dc-dc converter, and it provides the prominent features of current amplification and absorption during the heavy burden of load transients. The design and simulation of the concept is verified by experiment with a 12-V input and 3.3-V/30-A output converter.     

Interleaved soft switching resonant converter with a small input ripple current

ABSTRACT

An interleaved frequency control soft switching converter is studied for solar power or fuel cell power applications. The proposed circuit topology contains two parallel current-fed circuit cells with interleaved pulse-width modulation operation. Thus, the ripple currents at input and output terminals are decreased. In each circuit cell, the proposed current-fed dc-dc converter includes boost circuit and resonant circuit to achieve current ripple-free on low voltage side and less switching losses on active devices. The boost circuit and the resonant circuit have same active devices to decrease power switches. Due to the resonant behaviour, the reverse recovery current loss on secondary diodes is removed. The voltage doubler circuit topology is accomplished on secondary-side to reduce diode counts and conduction loss. The performance and effectiveness of the developed interleaved PWM current-fed converter are verified and confirmed by experiments.     

A novel self-oscillating, boost-derived DC-DC converter with load regulation

This paper proposes a novel self-oscillating, boost-derived (SOBD) dc-dc converter with load regulation. This proposed topology utilizes saturable cores (SCs) to offer self-oscillating and output regulation capabilities. Conventionally, the self-oscillating dc transformer (SODT) type of scheme can be implemented in a very cost-effective manner. The ideal dc transformer provides both input and output currents as pure, ripple-free dc quantities. However, the structure of an SODT-type converter will not provide regulation, and its oscillating frequency will change in accordance with the load. The proposed converter with SCs will allow output-voltage regulation to be accomplished by varying only the control current between the transformers, as occurs in a pulse-width modulation (PWM) converter. A control network that combines PWM schemes with a regenerative function is used for this converter. The optimum duty cycle is implemented to achieve low levels of input- and output-current ripples, which are characteristic of an ideal dc transformer. The oscillating frequency will spontaneously be kept near-constant, regardless of the load, without adding any auxiliary or compensation circuits. The typical voltage waveforms of the transistors are found to be close to quasisquare. The switching surges are well suppressed, and the voltage stress of the component is well clamped. The turn-on/turn-off of the switch is zero-voltage switching (ZVS), and its resonant transition can occur over a wide range of load current levels. A prototype circuit of an SOBD converter shows 86% efficiency at 48-V input, with 12-V, 100-W output, and presents an operating frequency of 100 kHz.     

A Multistage Interleaved Synchronous Buck Converter With Integrated Output Filter in 0.18 μm SiGe Process

The design and analysis of a fully integrated multistage interleaved synchronous buck dc-dc converter with on-chip filter inductor and capacitor is presented. The dc-dc converter is designed and fabricated in 0.18 mum SiGe RF BiCMOS process technology and generates 1.5 V-2.0 V programmable output voltage supporting a maximum output current of 200 mA. High switching frequency of 45 MHz, multiphase interleaved operation, and fast hysteretic controller reduce the filter inductor and capacitor sizes by two orders of magnitude compared to state-of-the-art converters and enable a fully integrated converter. The fully integrated interleaved converter does not require off-chip decoupling and filtering and enables direct battery connection for integrated applications. This design is the first reported fully integrated multistage interleaved, zero voltage switching synchronous buck converter with monolithic output filters. The fully integrated buck regulator achieves 64% efficiency while providing an output current of 200 mA.     

A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package

We demonstrate an integrated buck dc-dc converter for multi-V/sub CC/ microprocessors. At nominal conditions, the converter produces a 0.9-V output from a 1.2-V input. The circuit was implemented in a 90-nm CMOS technology. By operating at high switching frequency of 100 to 317 MHz with four-phase topology and fast hysteretic control, we reduced inductor and capacitor sizes by three orders of magnitude compared to previously published dc-dc converters. This eliminated the need for the inductor magnetic core and enabled integration of the output decoupling capacitor on-chip. The converter achieves 80%-87% efficiency and 10% peak-to-peak output noise for a 0.3-A output current and 2.5-nF decoupling capacitance. A forward body bias of 500 mV applied to PMOS transistors in the bridge improves efficiency by 0.5%-1%.     

Power Converter EMI Analysis Including IGBT Nonlinear Switching Transient Model

It is well known that very high dv/dt and di/dt during the switching instant is the major high-frequency electromagnetic interference (EMI) source. This paper proposes an improved and simplified EMI-modeling method considering the insulated gate bipolar transistor switching-behavior model. The device turn-on and turn-off dynamics are investigated by dividing the nonlinear transition by several stages. The real device switching voltage and current are approximated by piecewise linear lines and expressed using multiple dv/dt and di/dt superposition. The derived EMI spectra suggest that the high-frequency noise is modeled with an acceptable accuracy. The proposed methodology is verified by experimental results using a dc-dc buck converter     

Dual-bridge DC-DC converter: a new topology characterized with no deadtime operation

Two new topologies characterized by no deadtime and small valued filter inductor, the Dual-Bridge dc-dc converter and the Dual-Bridge dc-dc converter with ZVS, are presented and analyzed. Compared to the conventional Full-Bridge converter, the dc-dc converters with the proposed topologies have lower input current ripple, less stress on power switching components and smaller output filter inductor. Simple self-driven synchronous rectification can be used in the new topologies for high efficiency implementation. Prototype dc-dc converters have been tested for the verification of the principles. Both simulations and experiments verify the feasibility and advantages of the new topologies. The advantages and disadvantages of the topologies are discussed.     

A Bidirectional Isolated DC–DC Converter as a Core Circuit of the Next-Generation Medium-Voltage Power Conversion System

This paper describes a bidirectional isolated dc-dc converter considered as a core circuit of 3.3-kV/6.6-kV high-power-density power conversion systems in the next generation. The dc-dc converter is intended to use power switching devices based on silicon carbide (SiC) and/or gallium nitride, which will be available on the market in the near future. A 350-V, 10-kW and 20 kHz dc-dc converter is designed, constructed and tested. It consists of two single-phase full-bridge converters with the latest trench-gate insulated gate bipolar transistors and a 20-kHz transformer with a nano-crystalline soft-magnetic material core and litz wires. The transformer plays an essential role in achieving galvanic isolation between the two full-bridge converters. The overall efficiency from the dc-input to dc-output terminals is accurately measured to be as high as 97%, excluding gate drive and control circuit losses from the whole loss. Moreover, loss analysis is carried out to estimate effectiveness in using SiC-based power switching devices. Loss analysis clarifies that the use of SiC-based power devices may bring a significant reduction in conducting and switching losses to the dc-dc converter. As a result, the overall efficiency may reach 99% or higher     

Low-voltage-swing monolithic dc-dc conversion

A low-voltage-swing MOSFET gate drive technique is proposed in this paper for enhancing the efficiency characteristics of high-frequency-switching dc-dc converters. The parasitic power dissipation of a dc-dc converter is reduced by lowering the voltage swing of the power transistor gate drivers. A comprehensive circuit model of the parasitic impedances of a monolithic buck converter is presented. Closed-form expressions for the total power dissipation of a low-swing buck converter are proposed. The effect of reducing the MOSFET gate voltage swings is explored with the proposed circuit model. A range of design parameters is evaluated, permitting the development of a design space for full integration of active and passive devices of a low-swing buck converter on the same die, for a target CMOS technology. The optimum gate voltage swing of a power MOSFET that maximizes efficiency is lower than a standard full voltage swing. An efficiency of 88% at a switching frequency of 102 MHz is achieved for a voltage conversion from 1.8 to 0.9 V with a low-swing dc-dc converter based on a 0.18-/spl mu/m CMOS technology. The power dissipation of a low-swing dc-dc converter is reduced by 27.9% as compared to a standard full-swing dc-dc converter.     

A nonlinearity compensation method for a matrix converter drive

This paper presents a new method to compensate the nonlinearities for matrix converter drives. The nonlinearities of matrix converter drives such as commutation delay, turn-on and turn-off time of the switching devices, and on-state switching device voltage drop is corrected by a new matrix converter model using the direction of current. The proposed method does not need any additional hardware or complicated software and it is easy to realize by applying the algorithm to the conventional vector control. The proposed compensation method is applied for high-performance induction motor drives using a 3-kW matrix converter system without a speed sensor. Experimental results show the proposed method provides good compensating characteristics.     

Characterization and comparison of noise generation forquasi-resonant and pulsewidth-modulated converters

A buck converter with a given output filter is operated with pulse-width modulated and quasi-resonant switching schemes at the same nominal load and switching frequency. Electromagnetic interference generated by the natural switching action of the converter is examined by spectral analysis. Interference caused by excitation of parasitic elements is examined experimentally. Quasi-resonant converters are found to have a lower switching frequency harmonic bandwidth than the equivalent pulse-width modulated converter, even with switching frequency control. The most significant parasitic responses are the turn-on current and turn-off voltage of the catch diode and the gate current of the MOSFET. A significant decrease in radiated and conducted noise occurs when the gate drive voltage rise and fall times are increased, which is possible without loss of efficiency using quasi-resonant switching     

Design and Implementation of an Accurately Regulated Multiple Output ZVS DC–DC Converter

An accurately regulated multiple-output zero-voltage switching (ZVS) DC-DC converter is proposed. The converter is composed of three outputs altogether. The first and second outputs are regulated through the duty cycle control of two asymmetrical half bridge converters, while the third output is regulated through the phase shift of the two asymmetrical half bridge converters. The characteristic of this multiple-output dc-dc converter is analyzed and design process is investigated. ZVS is realized for all the main switches. Therefore this multiple-output dc-dc converter can operate with higher efficiency at higher switching frequency. The operation stages, ZVS condition and control detail are also presented. A 400 V input, 48 V/10 A, 5 V/20 A, 12 V/5 A outputs prototype is built to verify the design. The efficiency at rated input voltage full load is 93.36%.     

DC-DC converter: four switches V/sub pk/=V/sub in//2, capacitive turn-off snubbing, ZV turn-on

A new four-switch full-bridge dc-dc converter topology is especially well-suited for power converters operating from high input voltage: it imposes only half of the input voltage across each of the four switches. The two legs of a full-bridge converter are connected in series with each other, across the dc input source, instead of the usual topology in which each leg is connected across the dc source. The topology reduces turn-off switching losses by providing capacitive snubbing of the turn-off voltage transient, and eliminates capacitor-discharge turn-on losses by providing zero-voltage turn-on. (Switching losses are especially important in converters operating at high input voltage because turn-on losses are proportional to the square of the input voltage, and turn-off losses are proportional to the input voltage). The topology is suitable for resonant and nonresonant converters. It adds one bypass capacitor and one commutating inductor to the minimum-topology full-bridge converter (that inductor is already present in many present-day converters, to provide zero-voltage turn-on, or is associated with one or two capacitors to provide resonant operation), and contains a dc-blocking capacitor in series with the output transformer, primary winding, and some nonresonant converters (that capacitor is already present in resonant power converters). The paper gives a theoretical analysis, and experimental data on a 1.5-kW example that was built and tested: 600-Vdc input, 60-Vdc output at up to 25A, and 50-kHz switching frequency. The measured performance agreed well with the theoretical predictions. The measured efficiency was 93.6% at full load, and was a maximum of 95.15% at 44.8% load.     

Multiple Slope Switching Waveform Approximation to Improve Conducted EMI Spectral Analysis of Power Converters

An improved and simplified electromagnetic interference (EMI) modeling method based on multiple slope approximation of device-switching transitions for EMI analysis of power converters is presented. The traditional noise source modeling method, which uses single slope for rise and fall transition, is studied, and the criteria for reasonable modeling in the frequency range is analyzed. The turn-on and turn-off dynamics are investigated by dividing the nonlinear transitions into several stages based on an insulated gate bipolar transistor (IGBT) behavior circuit model. Real device-switching voltage and current waveforms are approximated by piece-wise linear lines and modeled by multiple dv/dt and di/dt slopes. The predicted EMI spectra suggest that high-frequency EMI noise is modeled with an acceptable accuracy. The proposed method was verified experimentally for a dc-dc buck converter     

The bang-bang hysteresis current waveshaping control technique used to implement a high power factor power supply

This work reports the operation and development of a high power factor power supply that operates at high switching frequency. An optimum power factor correction is obtained using an ac-dc boost converter associated to a nondissipative snubber as a pre-regulator circuit, which presents reduced commutation losses. The same nondissipative snubber is associated to a Forward converter and then used as a dc-dc stage. The proposed switched mode power supply presents high power factor (0.998), high efficiency (91%), low harmonic content (current and voltage total harmonic distortion rates equal to 2.84% and 2.83%, respectively), and also satisfactory regulation. The converter has been theoretically analyzed, designed, simulated and implemented, where experimental results show that soft commutation in all switches is achieved.     

Current Injected Equivalent Circuit Approach to Modeling of Switching DC-DC Converters in Discontinuous Inductor Conduction Mode

A new current injected equivalent circuit approach (CIECA) to modeling switching dc-dc converter power stages is developed, which starts with current injected approach, and results in a set of equations which describe completely input and output properties and an equivalent linear circuit model valid at small signal low frequency levels.     

Multibit Σ–∆ PWM Digital Controller IC for DC–DC Converters Operating at Switching Frequencies Beyond 10 MHz

An integrated digital controller for dc-dc switch-mode power supplies (SMPS) used in portable applications is introduced. The controller has very low power consumption, fast dynamic response, and can operate at programmable constant switching frequencies exceeding 10 MHz. To achieve these characteristics, three novel functional blocks, a digital pulse-width modulator based on second-order sigma-delta concept (Sigma-Delta DPWM), dual-clocking mode compensator, and nonlinear analog-to-digital converter are combined. In steady state, to minimize power consumption, the controller is clocked at a frequency lower than SMPS switching frequency. During transients the clock rate is increased to the switching frequency improving transient response. The controller integrated circuit (IC) is fabricated in a standard 0.18-mum process and tested with a 750-mW buck converter prototype. Experimental results show the controller current consumption of 55 muA/MHz and verify closed-loop operation at programmable switching frequencies up to 12.3 MHz. Simulation results indicating that this architecture can potentially support operation at switching frequencies beyond 100 MHz are also presented.     

Soft Switching Circuit for Interleaved Boost Converters

A zero-voltage switching-zero-current switching interleaved boost converter is proposed in this paper. An active circuit branch in parallel with the main switches is added and it is composed of an auxiliary switch and a snubber capacitor. By using this interleaved converter topology, zero current turn-on and zero voltage turn-off of the main switches can be achieved and the reverse-recovery loss of boost diode can be reduced. In addition, the auxiliary switches are zero-voltage transmission during the whole switching transition. A prototype of boost converter rated at 1.2kW has been built to confirm the effectiveness of the converter     

Analysis and Design for a New ZVS DC–DC Converter With Active Clamping

A new zero voltage switching (ZVS) boost converter is presented in this paper. By using an auxiliary switch and a capacitor, ZVS for all switches is achieved with an auxiliary winding in one magnetic core. A small diode is added to eliminate the voltage ringing across the main rectifier diode. This clamping technique can also be utilized in other dc-dc converters, and a family of new ZVS dc-dc converter is derived. A prototype (500 W/193 kHz) is made to verify the theoretical analysis. The efficiency is higher than 94% at 90-V input at full load     

A new lateral MOS-gated thyristor with controlling base-current

A new lateral MOS-gated thyristor, called the Base-Current-Controlled Thyristor, is described. This device is designed so that most holes at the on-stage reach the P base through the floating P⁺ region adjacent to the P base and the on-state MOSFET. At the turn-off stage, the interruption of the hole current to the P base due to switching off the above MOSFET occurs simultaneously with the conventional turn-off operation. The concept of this device is verified experimentally by using the fabricated lateral device with the external MOSFET. This device exhibits a better trade-off relation between the on-state voltage and the turn-off time compared uith the conventional MOS-gated thyristor