Room-temperature self-organised In/sub 0.5/Ga/sub 0.5/As quantum dot laser on silicon

The first room-temperature operation of In/sub 0.5/Ga/sub 0.5/As quantum dot lasers grown directly on Si substrates with a thin (/spl les/2 /spl mu/m) GaAs buffer layer is reported. The devices are characterised by J/sub th//spl sim/1500 A/cm/sup 2/, output power >50 mW, and large T/sub 0/ (244 K) and constant output slope efficiency (/spl ges/0.3 W/A) in the temperature range 5-95/spl deg/C.     

Improvement of InGaN/GaN laser diodes by using a Si-doped In/sub 0.23/Ga/sub 0.77/N/GaN short-period superlattice tunneling contact layer

InGaN/GaN multiple-quantum-well laser diode (LD) structures, including an Si-doped n/sup +/-In/sub 0.23/Ga/sub 0.77/N/GaN short-period superlattice (SPS) tunneling contact layer, are grown on c-face sapphire substrates by metalorganic vapor-phase epitaxy. The In/sub 0.23/Ga/sub 0.77/N/GaN(n/sup +/)-GaN(p) tunneling junction, which uses a low-resistivity n/sup +/-In/sub 0.23/Ga/sub 0.77/N/GaN SPS instead of a high-resistivity p-type GaN as a top contact layer, allows the reverse-biased tunnel junction to form a "quasi-ohmic" contact. Experimental results indicate that LDs with n/sup +/-In/sub 0.23/Ga/sub 0.77/N/GaN SPS contacting layers can achieve a lower threshold current and longer lasing duration under pulsed operation. Moreover, when the input pulse width is lengthened from 300 ns to 2 /spl mu/s, the lasing duration of the LD with Pt ohmic contact is three times longer than that of the LD with Ni/Au ohmic contacts. Therefore, we conclude that nitride-based LDs with an SPS reversed-tunneling contact layer may significantly reduce the contact resistance of an anode electrode and thereby increase the thermal stability of the device reliability.     

Nitride-based LEDs with an SPS tunneling contact Layer and an ITO transparent contact

The indium-tin-oxide [ITO(80 nm)] and Ni(5 nm)-Au(10 nm) films were separately deposited on glass substrates, p-GaN layers, n/sup +/-InGaN-GaN short-period-superlattice (SPS) structures, and nitride-based light-emitting diodes (LEDs). It was found that ITO on n/sup +/-SPS structure could provide us an extremely high transparency (i.e., 93.2% at 465 nm) and also a reasonably small specific contact resistance of 1.6/spl times/10/sup -3//spl Omega//spl middot/cm/sup 2/. Although the forward voltage which corresponds to 20-mA operating current for LED with ITO on n/sup +/-SPS upper contact was slightly higher than that of the LED with Ni-Au on n/sup +/-SPS upper contact, a 30% higher output intensity could still be achieved by using ITO on n/sup +/-SPS upper contact. Moreover, the output power of packaged LED with ITO was about twice as large as that of the other conventional Ni-Au LEDs.     

Ultralow leakage In/sub 0.53/Ga/sub 0.47/As p-i-n photodetector grown on linearly graded metamorphic In/sub x/Ga/sub 1-x/P buffered GaAs substrate

A novel top-illuminated In/sub 0.53/Ga/sub 0.47/As p-i-n photodiodes (MM-PINPD) grown on GaAs substrate by using linearly graded metamorphic In/sub x/Ga/sub 1-x/P (x graded from 0.49 to 1) buffer layer is reported. The dark current, optical responsivities, noise equivalent power, and operational bandwidth of the MM-PINPD with aperture diameter of 60 /spl mu/m are 13 pA, 0.6 A/W, 3.4/spl times/10/sup -15/ W/Hz/sup 1/2/, and 7.5 GHz, respectively, at 1550 nm. The performances of the MM-PINPD on GaAs are demonstrated to be comparable to those of a similar device made on InGaAs-InP substrate.     

Novel FRESURF LDMOSFET devices with improved BV/sub dss/-R/sub dson/

In this letter, we propose and demonstrate a novel device based on a floating reduced surface field (FRESURF) concept which allows the realization of significantly higher breakdown voltage in a thin epitaxy-based power IC technology. The newly proposed device with the floating buried layer pulled back from the source side is able to realize an enhanced breakdown voltage (BV/sub dss/) without degrading the specific on-resistance (R/sub dson/A). BV/sub dss/-R/sub dson/A values like 47 V-0.28 m/spl Omega//spl middot/cm/sup 2/ or 93 V-0.82 m/spl Omega//spl middot/cm/sup 2/ have been realized with a conventional power IC technology without any added process complexity.     

Highly linear Al/sub 0.3/Ga/sub 0.7/N-Al/sub 0.05/Ga/sub 0.95/N-GaN composite-channel HEMTs

We report an Al/sub 0.3/Ga/sub 0.7/N-Al/sub 0.05/Ga/sub 0.95/N-GaN composite-channel HEMT with enhanced linearity. By engineering the channel region, i.e., inserting a 6-nm-thick AlGaN layer with 5% Al composition in the channel region, a composite-channel HEMT was demonstrated. Transconductance and cutoff frequencies of a 1 /spl times/100 /spl mu/m HEMT are kept near their peak values throughout the low- and high-current operating levels, a desirable feature for linear power amplifiers. The composite-channel HEMT exhibits a peak transconductance of 150 mS/mm, a peak current gain cutoff frequency (f/sub T/) of 12 GHz and a peak power gain cutoff frequency (f/sub max/) of 30 GHz. For devices grown on sapphire substrate, maximum power density of 3.38 W/mm, power-added efficiency of 45% are obtained at 2 GHz. The output third-order intercept point (OIP3) is 33.2 dBm from two-tone measurement at 2 GHz.     

Turn-on voltage investigation of GaAs-based bipolar transistors with Ga/sub 1-x/In/sub x/As/sub 1-y/N/sub y/ base layers

The fundamental lower limit on the turn on voltage of GaAs-based bipolar transistors is first established, then reduced with the use of a novel low energy-gap base material, Ga/sub 1-x/In/sub x/As/sub 1-y/N/sub y/. InGaP/GaInAsN DHBTs (x/spl sim/3y/spl sim/0.01) with high p-type doping levels (/spl sim/3/spl times/10/sup 19/ cm/sup -3/) and dc current gain (/spl beta//sub max//spl sim/68 at 234 /spl Omega///spl square/) are demonstrated. A reduction in the turn-on voltage over a wide range of practical base sheet resistance values (100 to 400 /spl Omega///spl square/) is established relative to both GaAs BJTs and conventional InGaP/GaAs HBTs with optimized base-emitter interfaces-over 25 mV in heavily doped, high dc current gain samples. The potential to engineer turn-on voltages comparable to Si- or InP-based bipolar devices on a GaAs platform is enabled by the use of lattice matched Ga/sub 1-x/In/sub x/As/sub 1-y/N/sub y/ alloys, which can simultaneously reduce the energy-gap and balance the lattice constant of the base layer when x/spl sim/3y.     

A novel InGaP/Al/sub x/Ga/sub 1-x/As/GaAs CEHBT

A new and interesting InGaP/Al/sub x/Ga/sub 1-x/As/GaAs composite-emitter heterojunction bipolar transistor (CEHBT) is fabricated and studied. Based on the insertion of a compositionally linear graded Al/sub x/Ga/sub 1-x/As layer, a near-continuous conduction band structure between the InGaP emitter and the GaAs base is developed. Simulation results reveal that a potential spike at the emitter/base heterointerface is completely eliminated. Experimental results show that the CEHBT exhibits good dc performances with dc current gain of 280 and greater than unity at collector current densities of J/sub C/=21kA/cm/sup 2/ and 2.70/spl times/10/sup -5/ A/cm/sup 2/, respectively. A small collector/emitter offset voltage /spl Delta/V/sub CE/ of 80 meV is also obtained. The studied CEHBT exhibits transistor action under an extremely low collector current density (2.7/spl times/10/sup -5/ A/cm/sup 2/) and useful current gains over nine decades of magnitude of collector current density. In microwave characteristics, the unity current gain cutoff frequency f/sub T/=43.2GHz and the maximum oscillation frequency f/sub max/=35.1GHz are achieved for a 3/spl times/20 /spl mu/m/sup 2/ device. Consequently, the studied device shows promise for low supply voltage and low-power circuit applications.     

Highly reliable nitride-based LEDs with SPS+ITO upper contacts

Nitride-based blue light emitting diodes (LEDs) with an n/sup +/-short period superlattice (SPS) tunnel contact layer and an indium tin oxide (ITO) transparent contact were fabricated. Compared with conventional nitride-based LEDs with Ni/Au upper contacts, it was found that we could achieve a 60% increase in electroluminescence (EL) intensity by using ITO upper contacts. However, it was also found that the lifetime of ITO LEDs were much shorter. Furthermore, it was found that we could achieve a longer lifetime and a smaller reverse leakage current (I/sub R/) by the deposition of a SiO/sub 2/ layer on top of the ITO LEDs.     

Long-wavelength In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As large-area avalanche photodiodes and arrays

Large-area (500-/spl mu/m diameter) mesa-structure In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As avalanche photodiodes (APDs) are reported. The dark current density was /spl sim/2.5/spl times/10/sup -2/ nA//spl mu/m/sup 2/ at 90% of breakdown; low surface leakage current density (/spl sim/4.2 pA//spl mu/m) was achieved with wet chemical etching and SiO/sub 2/ passivation. An 18 /spl times/ 18 APD array with uniform distributions of breakdown voltage, dark current, and multiplication gain has also been demonstrated. The APDs in the array achieved 3-dB bandwidth of /spl sim/8 GHz at low gain and a gain-bandwidth product of /spl sim/120 GHz.     

10-gb/s operation of an In/sub 0.53/Ga/sub 0.47/As p-i-n photodiode on metamorphic InGaP buffered semi-insulating GaAs substrate

The SONET OC-192 receiving performance of In/sub 0.53/Ga/sub 0.47/As p-i-n photodiode grown on linearly graded metamorphic In/sub x/Ga/sub 1-x/P buffered GaAs substrate is reported. With a low-cost TO-46 package, such a device exhibits a frequency bandwidth up to 8 GHz, a bit-error rate (BER) of 10/sup -9/ at 10 Gb/s, a sensitivity of -17.8 dBm, and a noise equivalent power of 3.4/spl times/10/sup -15/ W/Hz/sup 1/2/ owing to its ultralow dark current of 3.6/spl times/10/sup -7/ A/cm/sup 2/. Eye diagram analysis at 10 Gb/s without transimpedance amplification reveals a statistically distributed Q-factor of 8.21, corresponding to a minimum BER of 1.1/spl times/10/sup -16/ at receiving power of -6 dBm.     

High-performance nonvolatile HfO/sub 2/ nanocrystal memory

In this letter, we demonstrate high-performance nonvolatile HfO/sub 2/ nanocrystal memory utilizing spinodal phase separation of Hf-silicate thin film by 900/spl deg/C rapid thermal annealing. With this technique, a remarkably high nanocrystal density of as high as 0.9 /spl sim/ 1.9 /spl times/ 10/sup 12/ cm/sup -2/ with an average size <10 nm can be easily achieved. Because HfO/sub 2/ nanocrystals are well embedded inside an SiO/sub 2/-rich matrix and due to their sufficiently deep energy level, we, for the first time, have demonstrated superior characteristics of the nanocrystal memories in terms of a considerably large memory window, high-speed program/erase (P/E) (1 /spl mu/s/0.1 ms), long retention time greater than 10/sup 8/ s for 10% charge loss, and excellent endurance after 10/sup 6/ P/E cycles.     

Low-frequency noise in submicrometer MOSFETs with HfO/sub 2/, HfO/sub 2//Al/sub 2/O/sub 3/ and HfAlO/sub x/ gate stacks

Low-frequency noise measurements were performed on p- and n-channel MOSFETs with HfO/sub 2/, HfAlO/sub x/ and HfO/sub 2//Al/sub 2/O/sub 3/ as the gate dielectric materials. The gate length varied from 0.135 to 0.36 /spl mu/m with 10.02 /spl mu/m gate width. The equivalent oxide thicknesses were: HfO/sub 2/ 23 /spl Aring/, HfAlO/sub x/ 28.5 /spl Aring/ and HfO/sub 2//Al/sub 2/O/sub 3/ 33 /spl Aring/. In addition to the core structures with only about 10 /spl Aring/ of oxide between the high-/spl kappa/ dielectric and silicon substrate, there were "double-gate oxide" structures where an interfacial oxide layer of 40 /spl Aring/ was grown between the high-/spl kappa/ dielectric and Si. DC analysis showed low gate leakage currents in the order of 10/sup -12/A(2-5/spl times/10/sup -5/ A/cm/sup 2/) for the devices and, in general, yielded higher threshold voltages and lower mobility values when compared to the corresponding SiO/sub 2/ devices. The unified number-mobility fluctuation model was used to account for the observed 1/f noise and to extract the oxide trap density, which ranged from 1.8/spl times/10/sup 17/ cm/sup -3/eV/sup -1/ to 1.3/spl times/10/sup 19/ cm/sup -3/eV/sup -1/, somewhat higher compared to conventional SiO/sub 2/ MOSFETs with the similar device dimensions. There was no evidence of single electron switching events or random telegraph signals. The aim of this paper is to present a general discussion on low-frequency noise characteristics of the three different high-/spl kappa//gate stacks, relative comparison among them and to the Si--SiO/sub 2/ system.     

BCB-bridged distributed wideband SPST switch using 0.25-/spl mu/m In/sub 0.5/Al/sub 0.5/As--In/sub 0.5/Ga/sub 0.5/As metamorphic HEMTs

In/sub 0.5/Al/sub 0.5/As--In/sub 0.5/Ga/sub 0.5/As metamorphic high-electron mobility transistor (mHEMT) dc-30 GHz distributed single-pole-single through (SPST) switches were designed and fabricated using the low-/spl kappa/ benzocyclobutene (BCB) bridged technology. The current gain cutoff frequency, and the electron transit time of In/sub 0.5/Al/sub 0.5/As--In/sub 0.5/Ga/sub 0.5/As mHEMTs have been investigated. By analyzing the extrinsic total delay time, the effective velocity of electrons can be estimated, and the average velocity is 2.3/spl times/10/sup 7/cm/s. The dc-30 GHz distributed wideband SPST switch exhibits an insertion loss of less than 5.5 dB, and an isolation larger than 30 dB, which is the first demonstration of the high-isolation of InAlAs-InGaAs mHEMTs monolithic switch. As to the power performance, this switch can handle the power up to 12 dBm at 2.4 GHz. After over 250 h of 85-85 (temperature =85/spl deg/C, humidity =85%) environmental evaluation, this BCB passivated and bridged microwave and monolithic integrated circuit switch demonstrates reliable RF characteristics without any significant performance change, which proves that this process using the low-/spl kappa/ BCB layer is attractive for millimeter-wave circuit applications.     

Reliability investigation of 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel

The authors have investigated the reliability performance of G-band (183 GHz) monolithic microwave integrated circuit (MMIC) amplifiers fabricated using 0.07-/spl mu/m T-gate InGaAs-InAlAs-InP HEMTs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel on 3-in wafers. Life test was performed at two temperatures (T/sub 1/ = 200 /spl deg/C and T/sub 2/ = 215 /spl deg/C), and the amplifiers were stressed at V/sub ds/ of 1 V and I/sub ds/ of 250 mA/mm in a N/sub 2/ ambient. The activation energy is as high as 1.7 eV, achieving a projected median-time-to-failure (MTTF) /spl ap/ 2 /spl times/ 10/sup 6/ h at a junction temperature of 125 /spl deg/C. MTTF was determined by 2-temperature constant current stress using /spl Delta/G/sub mp/ = -20% as the failure criteria. The difference of reliability performance between 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel and 0.1-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with In/sub 0.6/Ga/sub 0.4/As channel is also discussed. The achieved high-reliability result demonstrates a robust 0.07-/spl mu/m pseudomorphic InGaAs-InAlAs-InP HEMT MMICs production technology for G-band applications.     

Low-frequency noise in submicrometer MOSFETs with HfO/sub 2/, HfO/sub 2//Al/sub 2/O/sub 3/ and HfAlO/sub x/ gate stacks

Low-frequency noise measurements were performed on p- and n-channel MOSFETs with HfO/sub 2/, HfAlO/sub x/ and HfO/sub 2//Al/sub 2/O/sub 3/ as the gate dielectric materials. The gate length varied from 0.135 to 0.36 /spl mu/m with 10.02 /spl mu/m gate width. The equivalent oxide thicknesses were: HfO/sub 2/ 23 /spl Aring/, HfAlO/sub x/ 28.5 /spl Aring/ and HfO/sub 2//Al/sub 2/O/sub 3/ 33 /spl Aring/. In addition to the core structures with only about 10 /spl Aring/ of oxide between the high-K dielectric and silicon substrate, there were "double-gate oxide" structures where an interfacial oxide layer of 40 /spl Aring/ was grown between the high-K dielectric and Si. DC analysis showed low gate leakage currents in the order of 10/sup -12/ A(2-5 /spl times/ 10/sup -5/ A/cm/sup 2/) for the devices and, in general, yielded higher threshold voltages and lower mobility values when compared to the corresponding SiO/sub 2/ devices. The unified number-mobility fluctuation model was used to account for the observed 1/f noise and to extract the oxide trap density, which ranged from 1.8 /spl times/ 10/sup 17/ cm/sup -3/ eV/sup -1/ to 1, 3 /spl times/ 10/sup 19/ cm/sup -3/ eV/sup -1/ somewhat higher compared to conventional SiO/sub 2/ MOSFETs with the similar device dimensions. There was no evidence of single electron switching events or random telegraph signals. The aim of this paper is to present a general discussion on low-frequency noise characteristics of the three different high-K/gate stacks, relative comparison among them and to the Si-SiO/sub 2/ system.     

High breakdown voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode pHEMT with field-plate technology

A high breakdown voltage and a high turn-on voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode (E-mode) pseudomorphic HEMT (pHEMTs) with field-plate (FP) process is reported for the first time. Between gate and drain terminal, the transistor has a FP metal of 1 /spl mu/m, which is connected to a source terminal. The fabricated 0.5/spl times/150 /spl mu/m/sup 2/ device can be operated with gate voltage up to 1.6 V owing to its high Schottky turn-on voltage (V/sub ON/=0.85 V), which corresponds to a high drain-to-source current (I/sub ds/) of 420 mA/mm when drain-to-source voltage (V/sub ds/) is 3.5 V. By adopting the FP technology and large barrier height (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P layer design, the device achieved a high breakdown voltage of -47 V. The measured maximum transconductance, current gain cutoff frequency and maximum oscillation frequency are 370 mS/mm, 22 GHz , and 85 GHz, respectively. Under 5.2-GHz operation, a 15.2 dBm (220 mW/mm) and a 17.8 dBm (405 mW/mm) saturated output power can be achieved when drain voltage are 3.5 and 20 V. These characteristics demonstrate that the field-plated (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P E-mode pHEMTs have great potential for microwave power device applications.     

Characteristics of In/sub x/Al/sub 1-x/N-GaN high-electron mobility field-effect transistor

GaN-based field effect transistors commonly include an Al/sub x/Ga/sub 1-x/N barrier layer for confinement of a two-dimensional electron gas (2DEG) in the barrier/GaN interface. Some of the limitations of the Al/sub x/Ga/sub 1-x/N-GaN heterostructure can be, in principle, avoided by the use of In/sub x/Al/sub 1-x/N as an alternative barrier, which adds flexibility to the engineering of the polarization-induced charges by using tensile or compressive strain through varying the value of x. Here, the implementation and electrical characterization of an In/sub x/Al/sub 1-x/-GaN high electron mobility transistor with Indium content ranging from x=0.04 to x=0.15 is described. The measured 2DEG carrier concentration in the In/sub 0.04/Al/sub 0.96/N-GaN heterostructure reach 4/spl times/10/sup 13/ cm/sup -2/ at room temperature, and Hall mobility is 480 and 750 cm/sup 2//V /spl middot/ s at 300 and 10 K, respectively. The increase of Indium content in the barrier results in a shift of the transistor threshold voltage and of the peak transconductance toward positive gate values, as well as a decrease in the drain current. This is consistent with the reduction in polarization difference between GaN and In/sub x/Al/sub 1-x/N. Devices with a gate length of 0.7 /spl mu/m exhibit f/sub t/ and f/sub max/ values of 13 and 11 GHz, respectively.     

Recessed-gate AlGaN/GaN HFETs with lattice-matched InAlGaN quaternary alloy capping layers

In this paper, we present recessed AlGaN/GaN heterojunction field-effect transistors (HFETs) with lattice-matched InAlGaN capping layers, which reduce both ohmic contact resistance and series resistance between the AlGaN and the capping layer. The lattice-matched alloy epitaxial layer with both In and Al high compositions are successfully grown by metal-organic chemical vapor deposition. The grown lattice-matched In/sub 0.09/Al/sub 0.32/Ga/sub 0.59/N capping layer has close total polarization and bandgap to those of the underlying Al/sub 0.26/Ga/sub 0.74/N layer. The balanced polarization eliminates the depletion of electrons at the In/sub 0.09/Al/sub 0.32/Ga/sub 0.59/N/Al/sub 0.26/Ga/sub 0.74/N interface, which can reduce the series resistance across it. It is also noted that the fabricated HFET exhibits very low ohmic contact resistance of 1.0/spl times/10/sup -6/ /spl Omega//spl middot/cm/sup 2/ or less. Detailed analysis of the source resistance reveals that the series resistance at the In/sub 0.09/Al/sub 0.32/Ga/sub 0.59/N/Al/sub 0.26/Ga/sub 0.74/N interface is one fifth as low as the resistance at the conventional GaN/Al/sub 0.26/Ga/sub 0.74/N interface.     

Low resistance and reflective Mg-doped indium oxide-Ag ohmic contacts for flip-chip light-emitting diodes

We have investigated an Mg-doped In/sub x/O/sub y/(MIO)-Ag scheme for the formation of high-quality ohmic contacts to p-type GaN for flip-chip light-emitting diodes (LEDs). The as-deposited sample shows nonlinear current-voltage (I--V) characteristics. However, annealing the contacts at temperatures of 330/spl deg/C-530/spl deg/C for 1 min in air ambient results in linear I--V behaviors, producing specific contact resistances of 10/sup -4/--10/sup -5/ /spl Omega//spl middot/cm/sup 2/. In addition, blue LEDs fabricated with the MIO-Ag contact layers give forward-bias voltages of 3.13-3.15 V at an injection current of 20 mA. It is further shown that LEDs made with the MIO-Ag contact layers give higher output power compared with that with the Ag contact layer. This result strongly indicates that the MIO-Ag can be a promising scheme for the realization of high brightness LEDs for solid-state lighting application.