共查询到19条相似文献,搜索用时 62 毫秒
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传统的时钟低摆幅触发器由于工作方式和电路结构不够合理,使得电路的结点电容和开关活动性较大,增加了电路的开关功耗.本文通过改进传统的时钟低摆幅触发器的工作方式和电路结构,设计了一种新型的时钟低摆幅双边沿触发器--反馈保持型时钟低摆幅双边沿触发器(Feedback Keeper Low-swing Clock Double-edge-triggered Flip-flop-FK-LSCDFF).模拟结果表明所设计的触发器具有正确的逻辑功能,跟传统的时钟低摆幅双边沿触发器相比,降低近17%的功耗. 相似文献
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降低CCD的转移驱动电压摆幅对于减小器件的功耗有着积极的作用.通过对CCD电荷转移过程的原理进行分析,建立了CCD转移驱动电压摆幅的仿真模型,并从势垒注入、多晶硅电极间隙、栅介质层厚度等方面进行了仿真分析,找出了影响CCD转移驱动电压摆幅的关键因素,同时利用该模型得到了降低CCD转移驱动电压摆幅的优化条件.最后采用仿真结果进行了流片验证,CCD的驱动电压摆幅由原来的7V降低到了4V,验证了仿真结果的有效性. 相似文献
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低功耗非全摆幅互补传输管加法器 总被引:1,自引:1,他引:1
文章提出了一种新型传输管全加器,该全加器采用互补传输管逻辑(Complementary Pass-Transistor Logic)实现.与现有的CPL全加器相比:该全加器具有面积、进位速度和功耗上的优势:并且提供了进位传播信号的输出,可以更简单的构成旁路进位加法器(Carry SkipAdder).在此全加器基础上可以实现一种新型行波进位加法器(Ripple Carry Adder),其内部进位信号处于非全摆幅状态,具有高速低功耗的特点.HSPICE模拟表明:对4位加法器而言,其速度接近CMOS提前进位加法器(Carry Look ahead Adder),而功耗减小了61%.适用于高性能、低功耗的VLSI电路设计. 相似文献
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提出了一种具有高速全摆幅输出的BiCMOS缓冲器逻辑单元.该单元可以工作于1.5V,并且易于实现多输入扩展. 相似文献
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A high switching frequency voltage-mode buck converter with fast voltage-tracking speed and wide output voltage range has been proposed. A novel error amplifier (EA) is presented to achieve a high DC gain and get high phase margin, including a resistor and capacitor net, a unit gain block and a high gain block. The investigated converter has been fabricated with GF 0.35 μm CMOS process and can operate at 6 MHz with the output voltage range from 0.6 to 3.4 V. The experimental results show that the voltage-tracking speed can achieve 8.8 μs/V for up-tracking and 6 μs/V for down-tracking. Besides, the recovery time is less than 8 μs while the load current suddenly changes 400 mA. 相似文献
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通过Vth与VT(热电压)相互补偿原理,提出一种新型非带隙CMOS电压基准源,其输出基准电压具有极低温度系数.采用0.34μmFoundry18工艺模型和Candance Spectre EDA工具对电路进行模拟验证,获得以下结果:输出电压为552.845mV(T=27℃,VDD=3.3V),温度系数为1.98ppm/℃(-30℃℃~+130℃),功耗为21.85μw.电源电压从2.5V变到4.5V,输出电压的变化为0.15%(相对于VDD=3.3V时的输出).该电压基准源可望应用于高精度、低功耗IC系统的设计研发. 相似文献
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研究并设计了一款5 Gbit/s大摆幅电压模发送器,输出信号差分眼图高度可达1.2V.工作在1.2V电压下的输出驱动器由28个相同的子驱动器并联而成,且每个子驱动器都包含权重按照二进制关系递增的4个驱动单元,从而实现了去加重控制与阻抗校正相互独立.为了使输出驱动器的阻抗与传输线的特征阻抗匹配,提出了一种数模混合负反馈环路的阻抗自校正电路,对上拉和下拉部分电阻分别进行校正,实现了5%的校正精度和±40%的校正范围,且回波损耗(S11)在10 GHz时小于-15 dB.设计采用55 nm CMOS工艺流片,面积为320 μm×255 μm.数据率为5 Gbit/s时,功耗为51.81 mW,总的输出抖动为4.3 ps. 相似文献
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介绍了一种应用在相控阵雷达的有源通用诱饵发射机系统。分析了系统的组成和工作原理,重点介绍了采用的模块化设计技术、电磁兼容技术和液冷热设计等。 相似文献
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A multi-standard compatible transmitter with pre-emphasis for high speed serial links is presented. Based on the comparison between voltage mode(VM) and current mode(CM) output driver architectures,a low power CM output driver with reverse scaling and bias current filtering technique is proposed.A 2-tap pre-emphasis filter is used to reduce the intersymbol interference caused by the low-pass channel,and a high speed,low power combined serializer is implemented to convert 10 bit parallel data into a serial data stream.The whole transmitter is fabricated in 65 nm 1.2 V/2.5 V CMOS technology.It provides an eye height greater than 800 mV for data rates of both 2.5 Gb/s and 5 Gb/s.The output root mean square jitter of the transmitter at 5 Gb/s is only 9.94 ps without pre-emphasis.The transmitter consumes 41.2 mA at 5 Gb/s and occupies only 240×140μm~2. 相似文献
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调频广播发射技术的核心载体源自广播发射机,其中国内又主要以中波发射机为主.因此,研究中波广播发射机的故障是确保广播发射工作有序开展的先决条件,具有重要的现实意义.本文以国内广播电台应用广泛的DAM-50KW中波广播发射机为例,对维护功放模块的损坏问题和解决检测方法展开分析和总结. 相似文献
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A naturally commutated six-pulse cycloconverter working in the inverting mode is used to feed power to a single phase AC motor at 400 Hz. The motor is connected at the input side of the cycloconverter while the three-phase mains is connected at its output. Three-phase mains feeds power to the input side of the cycloconverter which is arranged as a tuned load at 400 Hz. The effect of the single-phase induction motor on system performance is discussed. The principle of voltage and frequency control for proper operation of the induction motor is presented. The results are experimentally verified. 相似文献
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A framework for a computationally efficient single‐carrier frequency‐division multiple access (SC‐FDMA) transmitter is proposed in this paper. Compared with a wide system bandwidth, the uplink allocation for each user is supposed to be relatively small because of multiple user access, which makes each user's signal vector to be sparse. When the localized subcarrier allocation is used for SC‐FDMA, the inverse fast fourier transform can take advantage of the sparse user input vector to reduce its complexity. The analytical and simulation results show that the proposed framework can provide a significant complexity reduction compared with the conventional SC‐FDMA transmitter. Copyright © 2011 John Wiley & Sons, Ltd. 相似文献