具有动态模式控制和斜波补偿的宽负载、多模式同步降压DC-DC转换器

A synchronous buck DC-DC converter with an adaptive multi-mode controller is proposed.In order to achieve high efficiency over its entire load range,pulse-width modulation(PWM),pulse-skip modulation(PSM) and pulse-frequency modulation(PFM) modes were integrated in the proposed DC-DC converter.With a highly accurate current sensor and a dynamic mode controller on chip,the converter can dynamically change among PWM, PSM and PFM control according to the load requirements.In addition,to avoid power device damage caused by inrush current at the start up state,a soft-start circuit is presented to suppress the inrush current.Furthermore,an adaptive slope compensation(SC) technique is proposed to stabilize the current programmed PWM controller for duty cycle passes over 50%,and improve the degraded load capability due to traditional slope compensation.The buck converter chip was simulated and manufactured under a 0.35μm standard CMOS process.Experimental results show that the chip can achieve 79%to 91%efficiency over the load range of 0.1 to 1000 mA.     

一种峰值电流型降压DC-DC转换电路的设计

设计了一款基于SMIC 0.35 μmBCD工艺的降压型DC-DC转换芯片,主 要应用于大 功率宽输入范围的电源管理系统。采用峰值电流型PWM控制方式提供优良的负载调整特 性和抗输入电源扰动能力;在电流采样的输出端添加斜坡补偿模块消除峰值电流模式引起 的次谐波振荡问题;设计高增益、大带宽的电压反馈误差放大器以提供大的负载调整率并 提高负载的瞬态响应能力;设计高单位增益带宽的PWM控制器以满足高开关频率工作的 要求,同时提高转换效率。此外,加入了一系列保护模块以维持芯片的正常工作。系统仿 真结果表明:在10 V的输入电压范围内, 稳定输出5.5 V电压,开关频率为330 kHz, 额定输出电流为1.5 A,在输入范围内的转换效率均在80%以上,典型应用下转换效率高 达90%。     

基于Bipolar工艺的峰值电流斜坡补偿电路设计

针对现代峰值电流控制模式DC-DC芯片中的亚谐波振荡及不稳定问题设计了一种基于Bipolar工艺的动态斜坡补偿电路。该电路能够产生随输入输出电压变化的补偿信号,以简单的电路结构实现了对采样电流的动态补偿。电路基于CSMC 2μm Bipolar工艺设计,Spectre仿真结果表明该补偿电路避免了因过补偿带来不良影响并使系统的动态响应提高了31.5%,提高了系统的稳定性。     

Design and implementation of adaptive slope compensation in current mode DC–DC onverter

To improve the compensation for the inherent instability in a current mode converter, the adaptive slope compensation, giving attention to the problems of the traditional compensation on compensation accuracy, loading capability and turning jitter, is presented. Based on the analysis of current loop, by detecting the input and output voltage, converting the adaptive slope compensation current, the compensation of the current loop is optimized successfully. It can not only improve the compensation accuracy but also eliminate the over compensation, the turning jitter and the poor loading capability in the reported slope compensation. A power supply chip with adaptive slope compensation has been fabricated in a 0.35 μm CMOS process. The measurement results show that the chip starts up and operates steadily with the constant current limit under conditions of 5 V input voltage, from 10% to 100% duty cycle.     

电流模式DC-DC自适应斜坡补偿的设计与实现

为了改进电流模式DC-DC固有不稳定性的补偿方法,本文提出了一种可以兼顾稳定性、带载能力、转换点抖动的自适应斜坡补偿方法。基于对电流环路的分析,通过检测输出电压与输入电压,转化为自适应的斜坡补偿电流,优化了电流环路的补偿方法。该方法提高了补偿的精确性,消除了过补偿以及传统斜坡补偿的带载能力与抖动问题。设计电路在一款基于0.35 m CMOS工艺的电源芯片中进行了验证,测试结果表明,电源电压为5V、占空比从10%~100%的调节过程中,电流限制阈值恒定,系统启动与工作状态稳定。     

Buck型DC/DC转换器自适应斜坡补偿电路设计

提出了一种可提高Buck型DC/DC转换器带载能力的斜坡补偿设计。针对电流模DC/DC转换器在大占空比下的不稳定性,以及采用斜坡补偿后系统带载能力下降等问题,通过产生分段线性斜坡补偿信号,既保证了系统的稳定性,又提高了系统的带载能力。该电路基于0.5 μm CMOS工艺设计,经Cadence仿真验证,达到了设计目标。     

电流模式BUCK型驱动电路斜率补偿研究

介绍了电流模式开关电源的原理和特点。针对电流模式下会引起振荡的现象,分析了系统不稳定的原因,论述了占空比、电感平均电流与系统不稳定之间的关系。并论述了通过斜率补偿解决系统振荡的基本原理。设计了一款基于max16834驱动芯片的高边降压型电路,给出了斜率补偿设计实例。实验结果表明,斜率补偿增强了系统的抗干扰性并提高了系统的稳定性。     

Buck型DC/DC转换器二次斜坡补偿电路设计

提出了一种应用于电流型DC/DC转化器的二次斜坡补偿电路的设计,该方法使补偿的斜率随着占空比动态变化,不仅提高了芯片的带载能力以及消除了占空比＞50％时出现的开环不稳定和亚谐波振荡和对噪声敏感等缺点。同时也避免了系统的过补偿和带载能力降低的问题。电路基于TSMC的0.35 μm BCD工艺设计,经Cadence仿真验证,达到设计目标。     

一种具有动态零点补偿的电流模DC-DC降压型转换器

To achieve fast transient response for a DC-DC buck converter,an adaptive zero compensation circuit is presented.The compensation resistance is dynamically adjusted according to the different output load conditions, and achieves an adequate system phase margin under the different conditions.An improved capacitor multiplier circuit is adopted to realize the minimized compensation capacitance size.In addition,analysis of the small-signal model shows the correctness of the mechanism of the proposed adaptive zero compensation technique.A currentmode DC-DC buck converter with the proposed structure has been implemented in a 0.35μm CMOS process,and the die size is only 800×1040μm~2.The experimental results show that the transient undershoot/overshoot voltage and the recovery times do not exceed 40 mV and 30μs for a load current variation from 100 mA to 1 A.     

Novel sliding valley current mode pulse train control for switching DC-DC converter

ABSTRACT

Multi valley current mode pulse train (MVC-PT) control technology can completely eliminate the low-frequency oscillation phenomenon of DC-DC switching converters operated in continuous conduction mode (CCM). However, this method needs to increase the number of preset value to broaden the output power range, which will increase the complexity and cost of the controller, and reduce the robustness of the system. Meanwhile, the output voltage ripple is uncontrollable and varied with the changes of the load. In this paper, a novel sliding valley current mode PT (SVC-PT) control technique is proposed to solve the above-mentioned problem. The SVC-PT operating principle and the deficiency of MVC-PT method are analysed in details. The approximate discrete-time models of SVC-PT and MVC-PT controlled switching DC-DC converters are constructed and compared. The comparison results verify that the proposed control method can thoroughly lessen the restriction of the controller on the output power range. Moreover, the control circuit is simplified and the output voltage ripple can be controlled. Finally, the simulation and experimental results are present to prove the feasibility and scientific of SVC-PT control technology.     

Primary side detection and peak current mode control in flyback converter

A new cycle-by-cycle control flyback converter with primary side detection and peak current mode control is proposed and its dynamic characteristics are analyzed.The flyback converter is verified by the OrCAD simulator.The main advantages of this converter over the conventional one are simplicity,small size,rapid regulating and no sensing control signals over the isolation barrier.The circuit is suitable for digital control implementations.     

峰值电流模升压变换器分段线性斜坡补偿设计

结合一款升压型直流-直流变换器,介绍了峰值电流模式中的斜坡补偿基本原理,提出了一种分段线性斜坡补偿电路。该电路提供的补偿信号在不同占空比空间具有不同的斜率,减小了斜坡补偿对系统带载能力、瞬态响应的负面影响。     

基于平均电流的双闭环APFC电路的设计

为有效消除电力电子设备的谐波干扰,基于UC3855设计了BOOST功率因数校正电路。主电路为减少功率损耗采用ZVT零电压辅助开关。控制电路采用双闭环平均电流模式。利用乘法器校正使输入电流接近正弦波并保持与电压同相位。通过小信号建模推导了电流环、电压环传递函数,配置了系统双环补偿校正网络的参数。最后通过MATLAB仿真和实验验证了设计的正确性。系统的动、稳态性能良好,功率因数接近为1。     

一种平均电流模式控制的单电感双输出型开关电源转换器

An integrated single-inductor dual-output （SIDO） switching DC-DC converter is presented. The outputs are specified with 1.2 V/400 mA and 1.8 V/200 mA. A decoupling small signal model is proposed to analyze the multi-loop system and to design the on-chip compensators. An average current control mode is introduced with lossless, continuous current detection. The converter has been fabricated in a 0.25μm 2P4M CMOS process. The power efficiency is 86% at a total output power of 840 mW while the output ripples are about 40 mV at an oscillator frequency of 600 kHz.     

A single-inductor dual-output switching converter with average current mode control

are about 40 mV at an oscillator frequency of 600 kHz.     

一种新型低功耗电流模式CMOS带隙基准设计

为了降低传统带隙基准源的功耗和面积,提出了一种新型基于电流模式高阶曲率修正的带隙基准电压源电路。通过改进的电流模式曲率校正方法实现高阶温度补偿,并且通过集电极电流差生成绝对温度成正比（PTAT）电流,而不是发射极面积差,因此所需电阻以及双极型晶体管（BJT）数量更少。采用标准0.35μm CMOS技术对提出电路进行了具体实现。测量结果显示,温度在-40～130°C之间时,电路温度系数为6.85 ppm/°C,且能产生508.5mV的基准电压。该带隙基准可在电源电压降至1.8 V的情况下工作,在100Hz时,测量所得的电路电源抑制为-65.2dB。在0.1-10 Hz频率范围内,噪声电压均方根输出为3.75 μV。相比其他类似电路,当供电电源为3.3V时,提出电路的整体静态电流消耗仅为9.8μA,面积仅为0.09 mm2。     

一种新型的应用于DC-DC转换器的斜率补偿设计

在分析峰值电流控制模式DC-DC转换器的稳定性基础上,提出了一种新型的四段式补偿法.该方法是根据输出占空比的大小进行不同程度的斜率补偿.结合所设计的峰值电流控制模式DC-DC转换器对该斜率补偿进行了分析.采用0.5μm CSMC DPDM工艺模型仿真并采用该工艺流片.由仿真和测试结果表明,设计的四段式斜率补偿电路在提高电路性能的同时可以有效地提高了系统的稳定性.     

Design of high efficiency dual-mode buck DC-DC converter

A buck DC-DC switching regulator with high efficiency is implemented by automatically altering the modulation mode according to load current,and it can operate with an input range of 4.5 to 30 V.At light load current,the converter operates in skip mode.The converter enters PWM mode operation with increasing load current.It reduces the switching loss at light load and standby state,which results in prolonging battery lifetime and stand-by time.Meanwhile, externally adjustable soft-start minimizes the inru...     

Design and implementation of current mode circuit for digital modulation

This paper proposes a new current-mode digital modulation circuit. The proposed circuit is MOS only hence, easily integrable. It employs an Extra X Current Conveyor (EX-CCII), two MOS transistors as switches, and a two MOS transistor-based active resistor. The amplitude shift keying/phase shift keying/frequency shift keying (ASK/PSK/FSK) modulator is obtained by proper selection of carriers (I_C1, I_C2). This circuit provides the current output signal at high output impedance, which is favorable for cascading. Also, the circuit is employing only MOS transistors, so it can be monolithically IC implementable. The effects of non-idealities and parasitics of the active element on the circuit performance are also investigated in detail. The functionality of the proposed digital modulator is verified through the Cadence Virtuoso tool using 0.18 μm Generic Process Design Kits parameters with the ±0.9 V supply voltage. The total area of the layout is 968.75 μm². Also, the experimental results are verified by using the IC AD-844 and IC CD4007.