组合逻辑电路中的软错误（Soft Error）生成模型的分析

在深亚微米集成电路设计领域,电路可靠性问题日益严重。这个问题的一个重要方面是组合逻辑电路的软错误。现有的关于软错误率的分析和模型表明电压脉冲宽度对电气掩蔽（Electrical Masking）以及锁存窗掩蔽（Latch Window Masking）两种效应都有很大的影响。电压脉冲的宽度通过影响这两种效应进而决定了电路的软错误率。但是这些分析和模型在这个问题上不够深入。在这篇文章中,我们首次提出一个脉冲生成的解析模型。这个模型表明,越过一个拐点后,电路中由射线粒子注入的电荷量同电压脉冲宽度之间存在指数关系。这个模型的平均误差约为2.6%。这个模型还揭示了逻辑门延时与软错误率之间的折中关系。这个关系是最近的一篇有关组合逻辑电路软错误率降低方法的论文的基础[19]。     

Characterizing,modeling, and analyzing soft error propagation in asynchronous and synchronous digital circuits

Soft errors, due to cosmic radiations, are one of the major challenges for reliable VLSI designs. In this paper, we present a symbolic framework to model soft errors in both synchronous and asynchronous designs. The proposed methodology utilizes Multiway Decision Graphs (MDGs) and glitch-propagation sets (GP sets) to obtain soft error rate (SER) estimation at gate level. This work helps mitigate design for testability (DFT) issues in relation to identifying the controllable and the observable circuit nodes, when the circuit is subject to soft errors. Also, this methodology allows designers to apply radiation tolerance techniques on reduced sets of internal nodes. To demonstrate the effectiveness of our technique, several ISCAS89 sequential and combinational benchmark circuits, and multiple asynchronous handshake circuits have been analyzed. Results indicate that the proposed technique is on average 4.29 times faster than the best contemporary state-of-the-art techniques. The proposed technique is capable to exhaustively identify soft error glitch propagation paths, which are then used to estimate the SER. To the best of our knowledge, this is the first time that a decision diagram based soft error identification approach is proposed for asynchronous circuits.     

A pre-silicon logic level security verification flow for higher-order masking schemes against glitches on FPGAs

Higher-order masking schemes have been proven in theory to be secure countermeasures against side-channel attacks in the algorithm level. The ISW framework is one of the most acceptable secure models of the existing higher-order masking schemes. However, a gap may exist between scheme and implementation. Several analyses have exhibited the weakness of masking in hardware designs on FPGAs. Firstly, we give the definition of leakage point and introduce three implementation logical flaws: glitch, EDA optimization and intermediate variable of scheme flaw. Secondly, we propose a leakage verification flow for implementing and verifying circuits realized higher-order masking schemes to avoid these leakage points. The flow provides an efficient evaluation method to locate and identify leakage points in masking hardware implementations. With the knowledge of the weaknesses of implementation, the implementation should be modified by corresponding methods to fix flaws, especially for glitch, which has been regarded as the main challenge of masking in hardware designs, we provide a method to remove the leakage point using Dijkstra algorithm with no extra time and area overheads. Finally, the design flow is evaluated on the implementation of Rivain&Prouff masking. Our experiments demonstrate how it automatically locates and protects the implementation. In addition, the experiments are also performed on flawed implementations due to EDA optimization and intermediate variables.     

Average SER Performance of Distributed Antenna Systems Over Shadowed Generalized-Gamma Channels for Different Modulation Schemes

Recently, much attention has been drawn to distributed antenna systems (DAS), which are proposed to improve the performance of mobile communication systems. This paper focuses on the analysis of the average symbol error rate (SER) of DAS over a generic composite channel. Initially, a new composite channel model is considered for DAS, which is a mixture of path loss, lognormal shadowing and generalized-Gamma fast fading. This composite channel model is a generic model, which includes many well-known composite channel models as special cases. Based on the channel model, the cumulative distribution function of the output signal-to-noise ratio is obtained by employing selective transmission scheme. Moreover, by averaging the channel conditions and the positions of the MS in the cell, an approximate expression of the average SER is derived, which is a unified form of expression for many commonly used modulation schemes. Numerical results show that the derived expression of the average SER can provide sufficient precision for evaluating the SER performance of DAS under different modulation schemes.     

Power estimation method for highly correlated input sequences underrealistic delay model

A new power estimation method is presented which considers spatio-temporal correlations among the primary inputs as well as the glitch effect under a realistic delay model. To deal with the glitch effect, the symbolic simulation technique is employed, and to take the correlations among the primary inputs into account, the authors employ a new technique which transforms correlation information into a logic structure, called `pre-logic'. Experimental results show that the estimation error of the proposed method is ~4% under a realistic delay model with highly correlated input streams     

Ser performance analysis of decode-and-forward cooperative scheme in satellite mobile channel

In this paper, Symbol-Error-Rate (SER) performance analysis is provided for a Decode-and-Forward (DF) cooperative scheme in satellite mobile channel environment. We present a satellite mobile cooperative communication system model and derive two generalized error probability expressions with Cyclical Redundancy Check (CRC) or not. We also derive and simulate SER of the proposed system over different satellite mobile channels. The results show that the analytical results are in great accordance with the ones obtained by simulation. Also, it was shown that, whether or not adopt CRC depends on the channel link quality between the source node and the relay node.     

SER PERFORMANCE ANALYSIS OF DECODE-AND-FORWARD COOPERATIVE SCHEME IN SATELLITE MOBILE CHANNEL

In this paper,Symbol-Error-Rate (SER) performance analysis is provided for a Decodeand-Forward (DF) cooperative scheme in satellite mobile channel environment.We present a satellite mobile cooperative communication system model and derive two generalized error probability expressions with Cyclical Redundancy Check (CRC) or not.We also derive and simulate SER of the proposed system over different satellite mobile channels.The results show that the analytical results are in great accordance with the ones obtained by simulation.Also,it was shown that,whether or not adopt CRC depends on the channel link quality between the source node and the relay node.     

Sequential Element Design With Built-In Soft Error Resilience

This paper presents a built-in soft error resilience (BISER) technique for correcting radiation-induced soft errors in latches and flip-flops. The presented error-correcting latch and flip-flop designs are power efficient, introduce minimal speed penalty, and employ reuse of on-chip scan design-for-testability and design-for-debug resources to minimize area overheads. Circuit simulations using a sub-90-nm technology show that the presented designs achieve more than a 20-fold reduction in cell-level soft error rate (SER). Fault injection experiments conducted on a microprocessor model further demonstrate that chip-level SER improvement is tunable by selective placement of the presented error-correcting designs. When coupled with error correction code to protect in-pipeline memories, the BISER flip-flop design improves chip-level SER by 10 times over an unprotected pipeline with the flip-flops contributing an extra 7-10.5% in power. When only soft errors in flips-flops are considered, the BISER technique improves chip-level SER by 10 times with an increased power of 10.3%. The error correction mechanism is configurable (i.e., can be turned on or off) which enables the use of the presented techniques for designs that can target multiple applications with a wide range of reliability requirements     

Cosmic-ray soft error rate characterization of a standard 0.6-μmCMOS process

Cosmic-ray soft errors from ground level to aircraft flight altitudes are caused mainly by neutrons. We derived an empirical model for estimation of soft error rate (SER). Test circuits were fabricated in a standard 0.6-μm CMOS process. The neutron SER dependence on the critical charge and supply voltage was measured. Time constants of the noise current were extracted from the measurements and compared with device simulations in three dimensions. The empirical model was calibrated and verified by independent SER measurements. The model is capable of predicting cosmic-ray neutron SER of any circuit manufactured in the same process as the test circuits. We predicted SER of a static memory cell     

考虑偏置温度不稳定性的软差错率分析

纳米工艺下,老化效应与软差错共同引发的集成电路可靠性问题至关重要。该文分析偏置温度不稳定性(BTI),包括负偏置温度不稳定性(NBTI)和正偏置温度不稳定性(PBTI)对软差错率的影响,提出从关键电荷值和延迟两个因素综合考虑。首先分析BTI效应下两个因素如何变化,推导了延迟受BTI影响的变化模型,介绍关键电荷的变化机理。然后探讨将两个因素结合到软差错率(SER)评估中,推导了融入关键电荷值的SER计算模型,提出将延迟的变化导入到电气屏蔽中的方法。基于ISCAS89基准电路上的实验验证了综合两种因素考虑BTI效应评估SER的有效性和准确性。     

酉空时调制系统中最大似然多符号差分检测的性能分析

在酉空时调制系统中,针对连续衰落信道下最大似然多符号差分检测给出了一种误符号率截断联合界的数值计算方法.采用Gauss-Chebyrshev求积公式对成对错误概率进行数值计算,并利用提取主要错误事件技术对误符号率的联合界进行了化简.数值与仿真结果表明,采用该方法计算出的截断联合界可以在低信噪比下提供误符号率的一个上界,在较高信噪比下获得它的良好估计.在性能分析基础上进一步提出了一种近似最大似然度量,分析与仿真说明,采用该度量的多符号差分检测算法的性能非常接近最大似然检测.     

Soft error modeling and remediation techniques in ASIC designs

Soft errors due to cosmic radiations are the main reliability threat during lifetime operation of digital systems. Fast and accurate estimation of soft error rate (SER) is essential in obtaining the reliability parameters of a digital system in order to balance reliability, performance, and cost of the system. Previous techniques for SER estimation are mainly based on fault injection and random simulations. In this paper, we present an analytical SER modeling technique for ASIC designs that can significantly reduce SER estimation time while achieving very high accuracy. This technique can be used for both combinational and sequential circuits. We also present an approach to obtain uncertainty bounds on estimated error propagation probability (EPP) values used in our SER modeling framework. Comparison of this method with the Monte-Carlo fault injection and simulation approach confirms the accuracy and speed-up of the presented technique for both the computed EPP values and uncertainty bounds.Based on our SER estimation framework, we also present efficient soft error hardening techniques based on selective gate resizing to maximize soft error suppression for the entire logic-level design while minimizing area and delay penalties. Experimental results confirm that these techniques are able to significantly reduce soft error rate with modest area and delay overhead.     

弱湍流信道MIMO-FSO系统误时隙率分析

分析了在弱湍流信道模型下基于开关键控(OOK)、脉冲位置调制(PPM)、差分脉冲位置调制(DPPM)和数字脉冲间隔调制(DPIM)方式的多输入多输出自由空间光(MIMO-FSO)通信系统模型。首先推导了各调制方式下单输入单输出(SISO)系统的误时隙率(SER)计算公式,以此作为参考,在独立同分布的条件下,推导出MIMO-FSO系统的平均SER计算公式,并用数值仿真的方法,分析了它们的平均SER性能。仿真结果表明,在弱湍流信道模型下,PPM可获得最好的SER性能,采用MIMO方法能有效提高FSO系统的平均SER性能。     

Optimal diversity combining based on linear estimation of rician fading channels

Optimal receiver diversity combining employing linear channel estimation is examined. Based on the statistical properties of least-squares (LS) and minimum mean square error (MMSE) channel estimation, an optimal diversity receiver for wireless systems employing practical linear channel estimation on Rician fading channels is proposed. The new receiver structure includes the conventional maximal ratio combining receiver as a special case. Exact analytical expressions for the symbol error rates (SERs) of LS and MMSE channel estimation aided optimal diversity combining are derived. It is shown that, if an optimal detector is used, an MPSK wireless system with MMSE channel estimation has the same SER when the MMSE channel estimation is replaced by LS estimation. This is an interesting counterexample to the common perception that channel estimation with smaller mean square error leads to smaller SER. Extensive simulation results validate the theoretical results.     

Computation of Posterior Marginals on Aggregated State Models for Soft Source Decoding

Optimum soft decoding of sources compressed with variable length codes and quasi-arithmetic codes, transmitted over noisy channels, can be performed on a bit/symbol trellis. However, the number of states of the trellis is a quadratic function of the sequence length leading to a decoding complexity which is not tractable for practical applications. The decoding complexity can be significantly reduced by using an aggregated state model, while still achieving close to optimum performance in terms of bit error rate and frame error rate. However, symbol a posteriori probabilities can not be directly derived on these models and the symbol error rate (SER) may not be minimized. This paper describes a two-step decoding algorithm that achieves close to optimal decoding performance in terms of SER on aggregated state models. A performance and complexity analysis of the proposed algorithm is given.     

Moment Generating Function Based Performance Analysis of Maximal-Ratio Combining Diversity Receivers in the Generalized-K Fading Channels

In this paper, we have analyzed the performance of maximal ratio combing (MRC) diversity receiver of the wireless communication systems over the composite fading environment, which is modelled by using the generalized-K distribution. However, this distribution has been considered as a versatile distribution for the precise modelling of a great variety of the short-term fading in conjunction with the long-term fading (shadow fading) channel conditions. In this proposed analysis, we have derived the mathematical expression for the moment generating function (MGF) of the generalized-K fading channel model that is used to evaluate a novel closed-form expression of the average bit error rate for (BER) the binary phase-shift keying /binary frequency-shift keying and average symbol error rate (SER) for the rectangular quadrature amplitude modulation scheme. We have also derived the mathematical expressions for the outage probability as well as the channel capacity for the generalized-K fading channel model.     

Soft Error Mitigation Through Selective Addition of Functionally Redundant Wires

We introduce a logic-level soft error mitigation methodology for combinational circuits. The proposed method exploits the existence of logic implications in a design, and is based on selective addition of pertinent functionally redundant wires to the circuit. We demonstrate that the addition of functionally redundant wires reduces the probability that a single-event transient (SET) error will reach a primary output, and, by extension, the soft error rate (SER) of the circuit. We discuss three methods for identifying candidate functionally redundant wires, and we outline the necessary conditions for adding them to the circuit. We then present an algorithm that assesses the SET sensitization probability reduction achieved by candidate functionally redundant wires, and selects an appropriate subset that, when added to the design, minimizes its SER. Experimental results on ISCAS'89 benchmark circuits demonstrate that the proposed soft error mitigation methodology yields a significant SER reduction at the expense of commensurate hardware, power, and delay overhead.     

Performance analysis and power allocation for decode‐and‐forward cooperative communications over Rician fading channel

This paper derives the asymptotic symbol error rate (SER) and outage probability of decode‐and‐forward (DF) cooperative communications over Rician fading channels. How to optimally allocate the total power is also addressed when the performance metric in terms of SER or outage probability is taken into consideration. Analysis reveals the insights that Rician factor has a great impact on the system performance as compared with the channel variance, and the relay–destination channel quality is of importance. In addition, the source–relay channel condition is irrelevant to the optimal power allocation design. Simulation and numerical evaluation substantiate the tightness of the asymptotic expressions in the high‐SNR regions and demonstrate the accuracy of our theoretical analysis. Copyright © 2011 John Wiley & Sons, Ltd.     

估计误差下DF协作系统性能分析

信道估计误差是引起无线通信系统性能衰弱的重要因素之一。分析了瑞利信道条件下估计误差对译码前传协作系统性能的影响。推导并给出了估计误差条件下正交幅度调制信号译码前传协作系统码元错误概率的解析表达式和上界表达式,并分析了不同信道的方差对协作系统性能的影响。仿真结果显示,存在估计误差时,码元错误概率性能并未随着信噪比的增大而提高。同时发现,中继-目的链路的较大方差较源-中继链路显著改善码元错误概率性能。     

Reducing vulnerability to soft errors in sub-100 nm content addressable memory circuits

We first study the impacts of soft errors on various types of CAM for different feature sizes. After presenting a soft error immune CAM cell, SSB-RCAM, we propose two kinds of reliable CAM, DCF-RCAM and DCK-RCAM.In addition, we present an ignore mechanism to protect dual cell redundancy CAMs against soft errors. Experimental results indicate that the 11T-NOR CAM cell has an advantage in soft error immunity. Based on 11T-NOR, the proposed reliable CAMs reduce the SER by about 81% on average with acceptable overheads. The SER of dual cell redundancy CAMs can also be decreased using the ignore mechanism in specific applications.