陷阱俘获存储器中电荷积累过程对保持特性的影响

本文通过数值模拟的方法对陷阱俘获存储器单元在多次擦写过程中的电荷积累过程进行了分析。由于多次擦写后陷阱电荷的积累,电荷之间的复合过程成为一个重要的问题。分析结果显示擦写过程中积累的空穴会对存储器的保持特性产生影响,同时在分析器件保持特性的时候电荷之间的复合机制必须加以考虑。     

A novel modified charge pumping method for trapped charge characterization in nanometer-scale devices

A new modified method based on the charge pumping technique is proposed and adopted to extract the lateral profiles of oxide charges in an advanced MOSFET.A 0.12μm SONOS device with 50 nm threshold voltage peak is designed and utilized to demonstrate the proposed method.The trapped charge distribution with a narrow peak can be precisely characterized with this method,which shows good consistency with the measured threshold voltage.     

Experimental and Simulation Analysis of Program/Retention Transients in Silicon Nitride-Based NVM Cells

A new characterization technique and an improved model for charge injection and transport through ONO gate stacks are used to investigate the program/retention sequence of silicon nitride-based (SONOS/TANOS) nonvolatile memories. The model accounts for drift–diffusion transport in the conduction band of silicon nitride (SiN). A priori assumptions on the spatial distribution of the charge at the beginning of the program/retention operations are not needed. We show that the carrier transport in the SiN layer impacts the spatial distribution of the trapped charge and, consequently, several aspects of program and retention transients. A few model improvements allow us to reconcile the apparent discrepancy between the values of silicon nitride trap energies extracted from program and retention experiments, thus reducing the number of model parameters.      

Comparative Study of Quick Electron Detrapping and Random Telegraph Signal and Their Dependences on Random Discrete Dopant in Sub-40-nm NAND Flash Memory

In sub-40-nm Flash memory, random discrete dopant (RDD) effect modulates post program/erase (P/E) cycling $V_{t}$ instabilities through quick electron detrapping (QED) as well as random telegraph signal (RTS). In this letter, for the first time, we discuss the QED phenomenon and its physical origin by comparison with RTS phenomenon. P/E cycling stress not only aggravates the RTS but also generates the new phenomenon of QED which results from transiently trapped charges at near-interface defects during program. By applying a new test algorithm, we could successfully extract the QED component from RTS, both of which are modulated by RDD effect and worsen tail bits in multilevel-cell Flash memory.      

Influence of metal gate and capping film stress on TANOS cell performance

In this work it is shown that film stress in the gate stack of TANOS NAND memories plays an important role for cell device performance and reliability. Tensile stress induced by a TiN metal gate deteriorates TANOS cell retention compared to TaN gate material. However, the erase saturation level as well as cell endurance is improved by the use of a TiN gate. This trade-off between retention and erase saturation for TANOS cells is elaborated in detail.     

BE-TANOS: Feasibility and technology limitations

The aim of this work is to investigate the physical mechanisms behind the write/erase and retention performances of band gap engineering (BE) layers used as tunnel oxide in charge trap memory stack. The investigation of the BE layers alone will be completed with the analyses of its integration within a TANOS (TaN/Alumina/Nitride/Oxide/Silicon) stack, pointing out the correlation between electrical performance and reliability limits.Good write/erase/retention performances can be achieved with BE tunnel oxide by using silicon nitride layer integrated in SiO₂-Si₃N₄-SiO₂ stack, as long as all different mechanisms are taken into account in optimizing stack composition: hole injection which improves erase efficiency, charge trapping and de-trapping from the thin silicon nitride which causes program instabilities and initial charge loss which does not significantly impact long term retention. All these phenomena make very crucial the BE tunnel process control and difficult its use for multi-level application.     

Cycling degradation in TANOS stack

The aim of this work is to investigate the physical mechanisms behind TANOS (TaN/Alumina/Nitride/Oxide/Silicon) cycling degradation. A comparison of the degradation induced in the TANOS stack by unipolar or bipolar stress has allowed the separation the different degradation contributions. A comparison with standard floating gate (FG) stack has also been carried out to confirm these degradation mechanisms. Finally, different stack configurations are reported, showing the key factors affecting the degradation and giving trends for improving cycling degradation.     

基于陷落电荷效应的非晶硅TFT的开态电流模型

对非晶硅薄膜晶体管,提出基于陷落电荷和自由电荷分析的新方法。考虑到带隙中指数分布的深能态和带尾态,给出了基于阈值电压的开启区电流模型。定义阈值电压为栅氧/半导体界面处陷落于深能级陷阱态的电荷与陷落于带尾态的电荷相等时所对应的栅压。电流模型中,引入一陷落电荷参数β,此参数建立了电子的带迁移率与有效迁移率之间的关系。最后,将电流模型同时与Pao-Sah模型和实验数据进行比较和验证,结果表现出很好的一致性。     

FLOTOXEEPROM擦写过程中隧道氧化层陷阱俘获电荷的研究

本文首先从理论上分析FLOTOX EEPROM隧道氧化层中陷阱俘获电荷对注入电场和存储管阈值电压的影响,然后给出了在不同擦写条件下FLOTOX EEPROM存储管的阈值电压与擦写周期关系的实验结果,接着分析了在反复擦写过程中陷阱俘获电荷的产生现象.对于低的擦写电压,擦除阈值减少,在隧道氧化层中产生了负的陷阱俘获电荷;对于高的擦写电压,擦除阈值增加,产生了正陷阱俘获电荷.这一结果与SiO₂中电荷的俘获——解俘获动态模型相吻合.     

The nature of charge trapping responsible for thin-oxide breakdown under a dynamic field stress

The trapping of positive and negative charges in silicon dioxide was studied as a function of injection current density and pulse width during dynamic high-field/high-current stress. Trapping of negative charges in oxide under dynamic stress conditions was found to give an accumulated charge to breakdown (Qbd) that was independent of stressing current density if the total injected charge per pulse was kept constant. However, the trapping of positive charges increased significantly as current density was increased. Under dynamic stress with fixed current density, the trapping of negative charge in the oxide increased with increasing pulse width while the trapping of positive charge was independent of pulse width. The experimental data for dynamically stressed devices suggest a strong correlation between the breakdown of thin oxides and the amount of negative charge trapped in them.     

电荷泵法研究FLASH擦工作时带带隧穿引起的界面损伤

FL ASH在擦操作的过程中 ,带带隧穿产生的空穴注入将会在 Si O2 / Si O2 界面和氧化层中产生带电中心 (包括界面态和陷阱 ) ,影响电路的可靠性 .利用电荷泵方法 ,通过应力前后电荷泵电流的改变确定出界面态和陷阱电荷的空间分布 ,为 FL ASH单元设计与改进可靠性 ,提供了理论和实验基础     

Measurements and modelling of thermal step current in GaN/SiO2/Si structure

In this work, we report results of measurement of space charge in GaN/SiO₂/Si structure by means of thermal step method (TSM) and capacitance-voltage (C-V). TSM is a non destructive method for quantifying and localizing the electric charges in insulating materials. Its principle consists to apply a low thermal step to a short-circuited or dc-biased sample and to record a current response, which depends on the charge present in the device. The C-V characteristics show an almost metal-oxide-semiconductor (MOS) behaviour and retention of charges after forward bias sweeping. The space charge dynamics in the structure are followed under low applied dc voltages. Results show a significant inversion of the TSM currents above applied voltage of 200 mV. A theoretical model is then presented in order to estimate the amount of the trapped charges and to interpret the variation of the TS currents as a function of the applied gate voltages.     

Quantification of Temperature-Dependent Charge Separation and Recombination Dynamics in Non-Fullerene Organic Photovoltaics

Transient optical spectroscopy is used to quantify the temperature-dependence of charge separation and recombination dynamics in P3TEA:SF-PDI₂ and PM6:Y6, two non-fullerene organic photovoltaic (OPV) systems with a negligible driving force and high photocurrent quantum yields. By tracking the intensity of the transient electroabsorption response that arises upon interfacial charge separation in P3TEA:SF-PDI₂, a free charge generation rate constant of ≈2.4 × 10¹⁰ s⁻¹ is observed at room temperature, with an average energy of ≈230 meV stored between the interfacial charge pairs. Thermally activated charge separation is also observed in PM6:Y6, and a faster charge separation rate of ≈5.5 × 10¹⁰ s⁻¹ is estimated at room temperature, which is consistent with the higher device efficiency. When both blends are cooled down to cryogenic temperature, the reduced charge separation rate leads to increasing charge recombination either directly at the donor-acceptor interface or via the emissive singlet exciton state. A kinetic model is used to rationalize the results, showing that although photogenerated charges have to overcome a significant Coulomb potential to generate free carriers, OPV blends can achieve high photocurrent generation yields given that the thermal dissociation rate of charges outcompetes the recombination rate.     

Two-dimensional analytical model of double-gate tunnel FETs with interface trapped charges including effects of channel mobile charge carriers

A two-dimensional analytical model of double-gate(DG) tunneling field-effect transistors(TFETs) with interface trapped charges is proposed in this paper. The influence of the channel mobile charges on the potential profile is also taken into account in order to improve the accuracy of the models. On the basis of potential profile, the electric field is derived and the expression for the drain current is obtained by integrating the BTBT generation rate. The model can be used to study the impact of interface trapped charges on the surface potential, the shortest tunneling length, the drain current and the threshold voltage for varying interface trapped charge densities, length of damaged region as well as the structural parameters of the DG TFET and can also be utilized to design the charge trapped memory devices based on TFET. The biggest advantage of this model is that it is more accurate, and in its expression there are no fitting parameters with small calculating amount. Very good agreements for both the potential, drain current and threshold voltage are observed between the model calculations and the simulated results.     

Influence of equilibrium charge reservoir formation on photo generated charge transport in TiO2/organic devices

Charge transport measurements have been performed using the photo induced charge extraction by linearly increasing voltage (photo-CELIV) technique on indium tin oxide/titanium dioxide/poly(3-hexylthiophene):[6,6]-phenyl C61 butyric acid methyl ester/copper (ITO/TiO₂/P3HT:PCBM/Cu) devices. By adjusting the offset voltage such that holes are accumulated at the ITO/TiO₂ contact we obtain space charge limited current (SCLC) extraction in the dark. Using photo-generation the current response is limited by SCLC extraction at low carrier concentrations but becomes purely recombination limited at high photo-generated carrier concentration. A 1-D drift diffusion model has been developed to simulate our results and we show that the hole blocking ITO/TiO₂ contact is responsible for the SCLC behavior. The highly reduced recombination of charges seen in P3HT:PCBM devices is necessary to obtain the large extraction current transients that are seen in the experimental measurements. By comparing the simulated dark CELIV and photo-CELIV we show that photo-generated extraction is more sensitive towards changes in the surface recombination velocity.     

A Temperature-Accelerated Method to Evaluate Data Retention of Resistive Switching Nonvolatile Memory

A switching model of conductivity modulation by a charge trapping process is proposed to describe the resistive switching in nonvolatile metal-insulator-metal (MIM) memory. Based on a quantitative detrapping analysis, retention is explained by the thermal release time of trapped charges, which is determined by trap depth and temperature. A characteristic temperature is defined at which a significant loss of retention would occur. A temperature-accelerated test is devised to measure the characteristic temperature and to give an early input on the worst-case retention for a given technology. The viability of this method is demonstrated using MIM memory.     

结晶聚合物驻极体中的跳跃电流和电荷储存

推导了聚合物和聚合物驻极体中的跳跃电流公式。依据这些公式导出了聚合物驻极体等温放电的理论公式，用驻极体等温衰减的数据估算出电子跳跃的步距约为10^-8m，用X光衍射实验测得的聚合物中结晶区的线度也是10^-8m量极。这从实验上支持上述公式的成立。理论和实验都证明稳态地储存的电荷几乎都被驻极体中的结晶区的能带所俘获。     

VDMOS异常峰值电流产生原因研究

研究了VDMOS器件存在异常峰值电流的原因,提出了解释此现象的理论。异常峰值电流的大小由VDMOS元胞在P+body区之间neck区的界面状态决定。一般MOSFET不具有此特殊结构,因而不具有此异常峰值电流现象。为了验证上述理论,采用TCAD(ISE),模拟了氧化物陷阱电荷和界面态电荷对异常峰值电流的影响程度。研究结果表明,氧化物陷阱电荷和界面态电荷显著影响neck区域的复合电流,是产生异常峰值电流最主要的原因。     

In-situ investigation of interfacial effects on charge accumulation and extraction in organic solar cells based on transient photocurrent studies

In organic solar cells, the interfacial and bulk photovoltaic processes are typically coupled based on charge transport and accumulation. In this article, we demonstrated that the in situ transient photocurrent measurements can be a powerful approach to separately investigate the interfacial effects on interfacial and bulk photovoltaic process. Based on this method, the effects of interfacial dipoles on charge extraction, accumulation, and recombination are solely studied by comparing Ca and Al devices with standard architecture of ITO/PEDOT/P3HT:PCBM/cathode. We observe that stronger interfacial dipoles can significantly decrease the charge extraction time and consequently increase the charge extraction efficiency. More importantly, stronger interfacial dipoles can also decrease the charge accumulation within the bulk photovoltaic layer. Furthermore, our experimental results indicate that the bulk-accumulated charges can act as recombination centers under device-operating condition, resulting in the recombination loss in photogenerated carriers. Clearly, our studies of transient photocurrents elucidated the charge extraction, accumulation, and recombination in OSCs.