外加磁场对激光焊接熔深的影响

研究了外加磁场对激光焊接熔深的影响,结果表明,外加磁场对熔深存在一个最佳值,外加磁场达到该最佳值时,激光焊接熔深大大增加,当外加磁场过强或过弱时,熔深都有显著下降。     

Coherent quasiparticle transport in grain boundary junctions employing high-Tc superconductors

Magneto-fluctuations of the normal resistance R_N have been reproducibly observed in YBa₂Cu₃O_7−δ biepitaxial grain boundary junctions at low temperatures. We attribute them to mesoscopic transport in narrow channels across the grain boundary line, occurring even in the presence of large voltage drops. The Thouless energy appears to be the relevant energy scale. Possible implications on the understanding of coherent transport of quasiparticles in high critical temperature superconductors (HTS) and of the dissipation mechanisms are discussed.     

笼统注入时弱凝胶穿透深度分析

弱凝胶驱油技术能够大幅提高采收率,已成为油田三次采油的一项重要技术。根据达西定律和质量守恒定律,建立了线性和径向流条件下弱凝胶在不同渗透率岩心里的穿透深度的数学模型,该模型可用于分析笼统注入条件下影响弱凝胶选择性进入地层能力的因素。结果表明,弱凝胶在低渗透层的穿透深度随渗透率级差增大而减少,随阻力系数增大而增加;在相同条件下,线性流时在低渗透层的穿透深度低于径向流。这些结论对弱凝胶的现场应用具有重要的指导意义。     

Low cost bulk-silicon CDMOS technology and enhanced dv/dt high voltage driver circuit for PDP data driver IC

In this paper, a 256-channel data driver IC for plasma display panels (PDPs) is proposed. A new low cost 0.5 μm bulk-silicon CDMOS (CMOS and DMOS) technology is developed, resulting in the improvement of input data frequency up to 120 MHz and reduction of die cost about 20% compared with the conventional one. A novel high voltage driver circuit is also presented to optimize dv/dt of the output signal from 1.2 to 0.2 V/ns. The proposed circuit can avoid unwanted turning on of the pLEDMOS transistors in output stage and cut down the power dissipation by 12% compared with the conventional one. The application results show rising and falling times of the output stage are 45 and 84 ns, respectively.     

Low temperature sintering properties of Y-doped BaTiO3 ceramics by BaB2O4 sintering aid

The sintering process of semiconducting Y-doped BaTiO₃ ceramics added with BaB₂O₄ as low temperature sintering aid were investigated. When the low temperature sintering aid BaB₂O₄ added Y-doped BaTiO₃ ceramics prepared by Sol-Gel method, the sintering temperature of BaTiO₃-based ceramics would be greatly decreased, and also widen sintering range. Y-doped BaTiO₃ ceramics with BaB₂O₄ addition can be obtained at 1050 °C. Ceramics samples with room temperature resistivity 60-80 Ω cm, ratio of the maximum resistivity to minimum resistance (Rmax/Rmin) 10⁴ and temperature coefficient of resistivity (α) 10%/°C were obtained.     

热作用致人前列腺增生组织的光穿透深度变化

为了研究热作用下人良性前列腺增生(BPH)组织对532nm,670nm,830nm和1064nm的光穿透深度的变化及其差异。采用了双积分球测量系统以及反向倍增法获取组织的光学特性。得到的实验结果为:在20℃~80℃的温度范围内,BPH组织对532nm,670nm,830nm和1064nm的光穿透深度都是随着激光波长的增大而增大,随着热作用温度的变化而改变的。随着热作用温度的升高,BPH组织对1064nm的光穿透深度的变化显著地较其对532nm,670nm,830nm的光穿透深度的变化都要大得多。其对532nm,670nm,830nm和1064nm的光穿透深度的最大值分别在50℃,50℃,50℃和70℃,其值分别为0.404mm,0.539mm,0.699mm和5.917mm;最小值分别在20℃,20℃,80℃和60℃,其值分别为0.251mm,0.449mm,0.621mm和1.542mm。该测量结果可为激光的光热治疗BPH提供一点有益的参考。     

Low sensitivity to temperature compressive-strained structure quantum well laser Ga1−xInxAs1−yNy/GaAs

The objective is to exploit the properties of the GaInNAs/GaAs alloy compressive strain structure to design a laser diode likely to meet the needs of optical communications. Modelling concerns mainly the study of the potentialities of thermal stability and dynamic response offered by these new techniques of electric and optical confinement. Band structure is modelled and typical quantum well properties are illustrated. A thorough study of the structural parameters is undertaken to take into account from the design criteria the temperature sensitivity. Minimising the Auger coefficient in the order of 10⁻²⁹ cm⁶/s appears to allow achieving efficient laser diodes production.     

Impact of technology scaling on thermal behavior of leakage current in sub-quarter micron MOSFETs: perspective of low temperature current testing

The increase in the off-state current for sub-quarter micron CMOS technologies is making conventional I_DDQ testing ineffective. Since natural process variation together with low-V_TH devices can significantly increase the absolute leakage value and the variation, choosing a single threshold for I_DDQ testing is impractical. One of the potential solutions is the cooling of the chip during current testing. In this paper we analyze the impact of CMOS technology scaling on the thermal behavior of different leakage current mechanisms in n-MOSFETs and estimate the effectiveness of low temperature I_DDQ testing. We found that the conventional single threshold low temperature I_DDQ testing is not effective for sub-quarter micron CMOS technologies and propose the low temperature ΔI_DDQ test method. The difference between pass and fail current limits was estimated more than 200× for 0.13-μm CMOS technology.     

On the temperature dependence of series resistance and interface states in Al/SiO2/p-Si (MIS) Schottky diodes

The capacitance-voltage-temperature (C-V-T) and conductance-voltage-temperature (G/w-V-T) characteristics of metal-semiconductor (Al/p-Si) Schottky diodes with thermal growth interfacial layer were investigated by considering series resistance effect in the wide temperature range (80-400 K). It is found that in the presence of series resistance, the forward bias C-V plots exhibit a peak, and experimentally shows that the peak positions shift towards higher positive voltages with increasing temperature, and the peak value of the capacitance has a maximum at 80 K. The C-V and (G/w-V) characteristics confirm that the N_ss and R_s of the diode are important parameters that strongly influence the electric parameters in (Al/SiO₂/p-Si) MIS Schottky diodes. The crossing of the G/w-V curves appears as an abnormality when seen with respect to the conventional behaviour of the ideal MS or MIS Schottky diode. It is thought that the presence of a series resistance keeps this intersection hidden and unobservable in homogeneous Schottky diodes, but it appears in the case of inhomogeneous Schottky diode. In addition, the high frequency (C_m) and conductance (G_m/w) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance.     

Evaluation of plasma damage in ultra-low-k materials with cap film using “extracted k-value” method

An “extracted k-value” method has been developed for evaluating postdevice-process damage in ultra-low-k materials inside a multi-layer structure. It is found that an in-depth analysis with using X-ray reflectivity (XRR) is very effective for recognizing the nature of the damage. With these methods, it is investigated that the damage generated in porous methylsilsesquioxane (MSQ) during cap-film deposition and the effect of subsequent process for the improvement.     

Frequency and temperature dependence of the dielectric and AC electrical conductivity in (Ni/Au)/AlGaN/AlN/GaN heterostructures

The dielectric properties and AC electrical conductivity (σ_ac)of the (Ni/Au)/Al_0.22Ga_0.78N/AlN/GaN heterostructures, with and without the SiN_x passivation, have been investigated by capacitance-voltage and conductance-voltage measurements in the wide frequency (5kHz-5 MHz) and temperature (80-400 K) range. The experimental values of the dielectric constant (ε′), dielectric loss (ε′′), loss tangent (tanδ), σ_ac and the real and imaginary part of the electric modulus (M′ and M′′) were found to be a strong function of frequency and temperature. A decrease in the values of ε′ and ε′′ was observed, in which they both showed an increase in frequency and temperature. The values of M′ and M′′ increase with increasing frequency and temperature. The σ_ac increases with increasing frequency, while it decreases with increasing temperature. It can be concluded, therefore, that the interfacial polarization can occur more easily at low frequencies and temperatures with the number of interface states density located at the metal/semiconductor interface. It contributes to the ε′ and σ_ac.     

Towards frozen organic PN junctions at room temperature using high-Tg polymeric electrolytes

Light-emitting electrochemical cells (LECs) based on a semiconducting polymer blended with lithium salt and novel polyelectrolytes have been studied. Random copolymers of poly(ethylene glycol) methyl ether methacrylate have been developed in order to increase their glass transition temperature (T_g) above room temperature. Devices have been optimized and successfully turned on upon heating. Cooling devices under applied voltage bias down to room temperature leads to frozen PN junctions. The relaxation of these junctions over voltage-free storage is studied. The higher the T_g, the longer the shelf-life of the junctions. This research opens the route to room temperature stable organic PN junctions for use in organic electronic devices such as light-emitting diodes, photovoltaic solar cells and other organic electronic devices.     

Role of residual stress on crack penetration and deflection at a bimaterial interface in a 4-point bend test

The four-point bend (4PB) test has emerged as a method of choice in the semiconductor industry for obtaining bimaterial interface adhesion data. When measuring the interface adhesion using 4PB test, it is essential to obtain a crack through the interface of interest. In our previous work the effect of finite flaw size, boundary conditions and film thickness on the crack deflection or penetration at a bimaterial interface was studied, and it was determined that prior work on semi-infinite media cannot be directly used in the case of 4PB test. In this paper, we briefly discuss the origins and development of residual stress, and will expand our previous work to include the role these residual stresses play on the competition between deflection and penetration energy release rates of a bimaterial interface and the extent of which the previous assumption of two semi-infinite media can be accepted.     

Optical, electrical and structural properties of spin-on MSQ low-k dielectrics over a wide temperature range

Looking onto application of low-k and ultra low-k materials within FEOL, high temperature load is one of the major challenges. But also temperature ranges below standard curing conditions are of special interest, e.g. for integration of transparent low-k materials into optical devices due to their small refractive index. In this work the development of the optical, electrical and structural properties of two spin-on MSQ low-k dielectrics over a low-temperature range has been investigated. Incorporation of porosity due to porogen removal for LK2000 causes a different behaviour of the electrical and optical parameters compared to ACCUGLASS™ within the low-temperature range. Both materials show unstable properties which normalize by getting closer to the standard curing conditions. Hydrophobizity of the surfaces is developing at curing temperatures of 400 °C and higher, what agrees to the lowering of the leakage current density. Optical, electrical and structural parameters fluctuate very sensitive on changing the curing temperature, so usage of those materials within a low-temperature range requires a very stable curing process to achieve reproducible material properties.     

Carbon nanotubes grown from nickel catalyst pretreated with H2/N2 plasma

To find the possibility of using a low-temperature process in growing carbon nanotubes (CNTs), nickel catalyst converted from film into particles by microwave H₂/N₂ plasma and the following CNT growth are all kept at a low temperature of 250 °C. The flat panel display industry requests low-temperature rather than the traditional high-temperature process for CNT growth. It was found that H₂/N₂ proportion is very sensitive to nickel morphology and the subsequent CNT growth. Better nickel and CNTs morphology are obtained for the proportion H₂/N₂=3/1 than those for the generally used pure hydrogen environment. The process pressure selection during pretreatment can determine whether CNTs are grown or not. The diameter of growing CNTs is proportional to nickel particle size. Field emission results support field amplification coefficient claim. The long tube length and high tube density of growing CNTs demonstrate low threshold electric field. This work shows the potential to use H₂/N₂ instead of pure hydrogen plasma in growing qualified CNTs applied in display industry.     

Low glass transition temperature hole transport material in enhanced-performance solid-state dye-sensitized solar cell

A new triarylamine-based hole transport materials (HTM) with branched side chain giving low glass transition temperature (T_g) is synthesized and incorporated into a solid state dye sensitized solar cell. This designing of molecular structure of HTM for lowering the T_g along with viscosity and surface tension of the casting solution effectively increases the pore-filling fraction (PFF) as the cell is heated during the fabrication, leading to an 8 fold increasing in cell efficiency over cells without heat treatment. We relate the cell performance improvement not only due to the PFF of TiO₂ by the (HTM), but also because of morphological and thickness changes in the hole transport material (HTM) capping layer.     

Effects of temperature on series resistance determination of electrodeposited Cr/n-Si/Au-Sb Schottky structures

Temperature dependences of the series resistance in the Cr/n-Si/Au-Sb Schottky structures prepared by electrodeposition method have been studied using current-voltage (I-V) characteristics in the 80-320 K temperature range by steps of 20 K. However, the values of series resistance obtained from Cheung functions were compared with each other, and it was seen that there is a good agreement between the values of the series resistance. A modified Norde’s function combined with conventional forward I-V method was used to extract the parameters including barrier height and the series resistance. The barrier height and series resistance obtained from Norde’s function were compared with those from Cheung functions. The values of barrier height and series resistance have very different especially towards to the lower temperatures. This is attributed to non-ideal I-V characteristics of the Cr/n-Si/Au-Sb Schottky structure and non-pure thermionic emission theory due to the low temperature effects.     

A comparative study of depth profiling of interface states using charge pumping and low frequency noise measurement in SiO2/HfO2 gate stack nMOSFETs

Charge pumping and low frequency noise measurements for depth profiling have been studied systematically using a set of gate stacks with various combinations of IL and HfO₂ thicknesses. The distribution of generated traps after HCI and PBTI stress was also investigated. The drain-current power spectral density made up all of the traps of IL in 0 < z < T_IL and the traps of HfO₂ in T_IL < z < T_HK. The traps near the Si/SiO₂ interface dominated the 1/f noise at higher frequencies, which is common in SiO₂ dielectrics. For the HfO₂/SiO₂ gate stack, however, the magnitude of the 1/f noise did not significantly change after HCI and PBTI because of more traps in the bulk HfO₂ film than at the bottom of the interface.     

Improvement of TEOS-chemical mechanical polishing performance by control of slurry temperature

Effects of slurry temperature on the chemical mechanical polishing (CMP) performance of tetra-ethyl ortho-silicate (TEOS) film with silica and ceria slurries were investigated. The change of slurry properties as a function of different slurry temperatures was also studied to obtain higher removal rates and smoother surface morphology. The changes observed with increasing temperature are as follows: the pH showed a slight tendency to decrease, the conductivity of the slurry showed a tendency to increase, the particle size in the slurry decreased, and the zeta potential of the slurry decreased with temperature. The removal rates linearly increased and maintained at the temperature of about 40 °C. The hydroxyl (OH⁻) groups increased in the slurry as the slurry temperature increased and then they diffused into the TEOS film. The surface of the TEOS film became hydro-carbonated by the diffused hydroxyl groups. The hydro-carbonated surface of TEOS film could be removed more easily. Better surface morphology of TEOS films could be obtained at 40 °C of silica slurry and at 90 °C of ceria slurry. It is found that the CMP performance of TEOS film could be significantly improved or controlled by change of slurry temperature with the same slurry.     

Low temperature Si2H6 Si epitaxy in-situ doped with AsH3/SiH4

The use of disilane (Si₂H₆) as a silicon source for epitaxial deposition was investigated for both very low pressure chemical vapor deposition (thermal CVD) and plasma enhanced chemical vapor deposition (PECVD) from 600 to 800° C. The growth rates observed for temperatures at or below 750° C were at least an order of magnitude higher than those observed for silane (SiH₄) using similar deposition conditions. An argon plasma was used to sputter clean the silicon surface, in-situ, immediately before the deposition. It was found that a low dc bias on the substrate during the argon sputter cleaning process helped remove carbon and oxide from the surface of the silicon substrate. A 16 min Ar sputter clean at 650° C, 2.5 W rf power, and •50 V dc bias resulted in a carbon and oxygen concentration at the epilayer-substrate of less than 4 × 10¹⁸/cm³ and 2 × 10¹⁸/cm³, respectively. In situ arsenic doping during disilane epitaxial growth was carried out by thermal CVD and PECVD using arsine (AsH₃) diluted in silane (SiH₄) at 800° C. The results were compared to similar experiments using only SiH₄ as the silicon source. Up to 500 ppm of arsine was diluted in the reactant gas and it was found that the Si₂H₆ growth rates were insensitive to the arsine concentraton in the gas phase.